* [RFC][PATCH] powerpc/CoreNet64: compile with CONFIG_E{5, 6}500_CPU well
@ 2013-11-20 8:35 Tiejun Chen
2013-11-20 16:41 ` [RFC][PATCH] powerpc/CoreNet64: compile with CONFIG_E{5,6}500_CPU well Scott Wood
0 siblings, 1 reply; 6+ messages in thread
From: Tiejun Chen @ 2013-11-20 8:35 UTC (permalink / raw)
To: scottwood; +Cc: linuxppc-dev
CONFIG_ALTIVEC is always enabled for CoreNet64. And if we
select CONFIG_E{5,6}500_CPU this may introduce -mcpu=e500mc64
into $CFLAGS. But Altivec and Spe options not allowed with
e500mc64, so :
CC arch/powerpc/lib/xor_vmx.o
arch/powerpc/lib/xor_vmx.c:1:0: error: AltiVec not supported in this target
make[1]: *** [arch/powerpc/lib/xor_vmx.o] Error 1
make: *** [arch/powerpc/lib] Error 2
Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com>
---
arch/powerpc/lib/Makefile | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index 95a20e1..641a77d 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -40,5 +40,8 @@ obj-y += code-patching.o
obj-y += feature-fixups.o
obj-$(CONFIG_FTR_FIXUP_SELFTEST) += feature-fixups-test.o
+# Altivec and Spe options not allowed with e500mc64 in GCC.
+ifeq ($(call cc-option-yn,-mcpu=e500mc64),n)
obj-$(CONFIG_ALTIVEC) += xor_vmx.o
CFLAGS_xor_vmx.o += -maltivec -mabi=altivec
+endif
--
1.7.9.5
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [RFC][PATCH] powerpc/CoreNet64: compile with CONFIG_E{5,6}500_CPU well 2013-11-20 8:35 [RFC][PATCH] powerpc/CoreNet64: compile with CONFIG_E{5, 6}500_CPU well Tiejun Chen @ 2013-11-20 16:41 ` Scott Wood 2013-11-20 18:47 ` [RFC][PATCH] powerpc/CoreNet64: compile with CONFIG_E{5, 6}500_CPU well Kumar Gala 2013-11-21 8:59 ` [RFC][PATCH] powerpc/CoreNet64: compile with CONFIG_E{5, 6}500_CPU well "“tiejun.chen”" 0 siblings, 2 replies; 6+ messages in thread From: Scott Wood @ 2013-11-20 16:41 UTC (permalink / raw) To: Tiejun Chen; +Cc: linuxppc-dev On Wed, 2013-11-20 at 16:35 +0800, Tiejun Chen wrote: > CONFIG_ALTIVEC is always enabled for CoreNet64. In the defconfig perhaps, but this isn't a generally true statement. > And if we select CONFIG_E{5,6}500_CPU this may introduce -mcpu=e500mc64 > into $CFLAGS. But Altivec and Spe options not allowed with > e500mc64, so : Sigh. > CC arch/powerpc/lib/xor_vmx.o > arch/powerpc/lib/xor_vmx.c:1:0: error: AltiVec not supported in this target > make[1]: *** [arch/powerpc/lib/xor_vmx.o] Error 1 > make: *** [arch/powerpc/lib] Error 2 > > Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com> > --- > arch/powerpc/lib/Makefile | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile > index 95a20e1..641a77d 100644 > --- a/arch/powerpc/lib/Makefile > +++ b/arch/powerpc/lib/Makefile > @@ -40,5 +40,8 @@ obj-y += code-patching.o > obj-y += feature-fixups.o > obj-$(CONFIG_FTR_FIXUP_SELFTEST) += feature-fixups-test.o > > +# Altivec and Spe options not allowed with e500mc64 in GCC. > +ifeq ($(call cc-option-yn,-mcpu=e500mc64),n) > obj-$(CONFIG_ALTIVEC) += xor_vmx.o > CFLAGS_xor_vmx.o += -maltivec -mabi=altivec > +endif This does not seem like the right fix. What if GCC supports both -mcpu=e500mc64 and -mcpu=e6500, and we're using the latter? Or for that matter, if we're using -mcpu=whatever-ibm-chip-has-this? Plus, wouldn't you need to do something to prevent code in that file from being called? -Scott ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [RFC][PATCH] powerpc/CoreNet64: compile with CONFIG_E{5, 6}500_CPU well 2013-11-20 16:41 ` [RFC][PATCH] powerpc/CoreNet64: compile with CONFIG_E{5,6}500_CPU well Scott Wood @ 2013-11-20 18:47 ` Kumar Gala 2013-11-20 22:03 ` [RFC][PATCH] powerpc/CoreNet64: compile with CONFIG_E{5,6}500_CPU well Scott Wood 2013-11-21 8:59 ` [RFC][PATCH] powerpc/CoreNet64: compile with CONFIG_E{5, 6}500_CPU well "“tiejun.chen”" 1 sibling, 1 reply; 6+ messages in thread From: Kumar Gala @ 2013-11-20 18:47 UTC (permalink / raw) To: Scott Wood; +Cc: Tiejun Chen, linuxppc-dev On Nov 20, 2013, at 10:41 AM, Scott Wood <scottwood@freescale.com> = wrote: > On Wed, 2013-11-20 at 16:35 +0800, Tiejun Chen wrote: >> CONFIG_ALTIVEC is always enabled for CoreNet64. >=20 > In the defconfig perhaps, but this isn't a generally true statement. >=20 >> And if we select CONFIG_E{5,6}500_CPU this may introduce = -mcpu=3De500mc64 >> into $CFLAGS. But Altivec and Spe options not allowed with >> e500mc64, so : >=20 > Sigh. >=20 >> CC arch/powerpc/lib/xor_vmx.o >> arch/powerpc/lib/xor_vmx.c:1:0: error: AltiVec not supported in this = target >> make[1]: *** [arch/powerpc/lib/xor_vmx.o] Error 1 >> make: *** [arch/powerpc/lib] Error 2 >>=20 >> Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com> >> --- >> arch/powerpc/lib/Makefile | 3 +++ >> 1 file changed, 3 insertions(+) >>=20 >> diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile >> index 95a20e1..641a77d 100644 >> --- a/arch/powerpc/lib/Makefile >> +++ b/arch/powerpc/lib/Makefile >> @@ -40,5 +40,8 @@ obj-y +=3D code-patching.o >> obj-y +=3D feature-fixups.o >> obj-$(CONFIG_FTR_FIXUP_SELFTEST) +=3D feature-fixups-test.o >>=20 >> +# Altivec and Spe options not allowed with e500mc64 in GCC. >> +ifeq ($(call cc-option-yn,-mcpu=3De500mc64),n) >> obj-$(CONFIG_ALTIVEC) +=3D xor_vmx.o >> CFLAGS_xor_vmx.o +=3D -maltivec -mabi=3Daltivec >> +endif >=20 > This does not seem like the right fix. What if GCC supports both > -mcpu=3De500mc64 and -mcpu=3De6500, and we're using the latter? Or = for that > matter, if we're using -mcpu=3Dwhatever-ibm-chip-has-this? >=20 > Plus, wouldn't you need to do something to prevent code in that file > from being called? >=20 > -Scott Why does -mcpu=3De500mc64 get you spe enabled? It shouldn=92t as no = e500mc or greater part has spe. Can you try using -mno-spe -maltivec? - k= ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [RFC][PATCH] powerpc/CoreNet64: compile with CONFIG_E{5,6}500_CPU well 2013-11-20 18:47 ` [RFC][PATCH] powerpc/CoreNet64: compile with CONFIG_E{5, 6}500_CPU well Kumar Gala @ 2013-11-20 22:03 ` Scott Wood 0 siblings, 0 replies; 6+ messages in thread From: Scott Wood @ 2013-11-20 22:03 UTC (permalink / raw) To: Kumar Gala; +Cc: Tiejun Chen, linuxppc-dev On Wed, 2013-11-20 at 12:47 -0600, Kumar Gala wrote: > On Nov 20, 2013, at 10:41 AM, Scott Wood <scottwood@freescale.com> wrot= e: >=20 > > On Wed, 2013-11-20 at 16:35 +0800, Tiejun Chen wrote: > >> CONFIG_ALTIVEC is always enabled for CoreNet64. > >=20 > > In the defconfig perhaps, but this isn't a generally true statement. > >=20 > >> And if we select CONFIG_E{5,6}500_CPU this may introduce -mcpu=3De50= 0mc64 > >> into $CFLAGS. But Altivec and Spe options not allowed with > >> e500mc64, so : > >=20 > > Sigh. > >=20 > >> CC arch/powerpc/lib/xor_vmx.o > >> arch/powerpc/lib/xor_vmx.c:1:0: error: AltiVec not supported in this= target > >> make[1]: *** [arch/powerpc/lib/xor_vmx.o] Error 1 > >> make: *** [arch/powerpc/lib] Error 2 > >>=20 > >> Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com> > >> --- > >> arch/powerpc/lib/Makefile | 3 +++ > >> 1 file changed, 3 insertions(+) > >>=20 > >> diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile > >> index 95a20e1..641a77d 100644 > >> --- a/arch/powerpc/lib/Makefile > >> +++ b/arch/powerpc/lib/Makefile > >> @@ -40,5 +40,8 @@ obj-y +=3D code-patching.o > >> obj-y +=3D feature-fixups.o > >> obj-$(CONFIG_FTR_FIXUP_SELFTEST) +=3D feature-fixups-test.o > >>=20 > >> +# Altivec and Spe options not allowed with e500mc64 in GCC. > >> +ifeq ($(call cc-option-yn,-mcpu=3De500mc64),n) > >> obj-$(CONFIG_ALTIVEC) +=3D xor_vmx.o > >> CFLAGS_xor_vmx.o +=3D -maltivec -mabi=3Daltivec > >> +endif > >=20 > > This does not seem like the right fix. What if GCC supports both > > -mcpu=3De500mc64 and -mcpu=3De6500, and we're using the latter? Or f= or that > > matter, if we're using -mcpu=3Dwhatever-ibm-chip-has-this? > >=20 > > Plus, wouldn't you need to do something to prevent code in that file > > from being called? > >=20 > > -Scott >=20 > Why does -mcpu=3De500mc64 get you spe enabled? It shouldn=E2=80=99t as= no e500mc or greater part has spe. Can you try using -mno-spe -maltivec= ? I don't think SPE is relevant. The problem is that GCC refuses to allow -maltivec to be combined with -mcpu=3De500mc64. -mno-spe doesn't make a difference. -Scott ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [RFC][PATCH] powerpc/CoreNet64: compile with CONFIG_E{5, 6}500_CPU well 2013-11-20 16:41 ` [RFC][PATCH] powerpc/CoreNet64: compile with CONFIG_E{5,6}500_CPU well Scott Wood 2013-11-20 18:47 ` [RFC][PATCH] powerpc/CoreNet64: compile with CONFIG_E{5, 6}500_CPU well Kumar Gala @ 2013-11-21 8:59 ` "“tiejun.chen”" 2013-11-21 17:42 ` [RFC][PATCH] powerpc/CoreNet64: compile with CONFIG_E{5,6}500_CPU well Scott Wood 1 sibling, 1 reply; 6+ messages in thread From: "“tiejun.chen”" @ 2013-11-21 8:59 UTC (permalink / raw) To: Scott Wood; +Cc: linuxppc-dev On 11/21/2013 12:41 AM, Scott Wood wrote: > On Wed, 2013-11-20 at 16:35 +0800, Tiejun Chen wrote: >> CONFIG_ALTIVEC is always enabled for CoreNet64. > > In the defconfig perhaps, but this isn't a generally true statement. > Yes, but I think we should avoid this probable scenario :) >> And if we select CONFIG_E{5,6}500_CPU this may introduce -mcpu=e500mc64 >> into $CFLAGS. But Altivec and Spe options not allowed with >> e500mc64, so : > > Sigh. > >> CC arch/powerpc/lib/xor_vmx.o >> arch/powerpc/lib/xor_vmx.c:1:0: error: AltiVec not supported in this target >> make[1]: *** [arch/powerpc/lib/xor_vmx.o] Error 1 >> make: *** [arch/powerpc/lib] Error 2 >> >> Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com> >> --- >> arch/powerpc/lib/Makefile | 3 +++ >> 1 file changed, 3 insertions(+) >> >> diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile >> index 95a20e1..641a77d 100644 >> --- a/arch/powerpc/lib/Makefile >> +++ b/arch/powerpc/lib/Makefile >> @@ -40,5 +40,8 @@ obj-y += code-patching.o >> obj-y += feature-fixups.o >> obj-$(CONFIG_FTR_FIXUP_SELFTEST) += feature-fixups-test.o >> >> +# Altivec and Spe options not allowed with e500mc64 in GCC. >> +ifeq ($(call cc-option-yn,-mcpu=e500mc64),n) >> obj-$(CONFIG_ALTIVEC) += xor_vmx.o >> CFLAGS_xor_vmx.o += -maltivec -mabi=altivec >> +endif > > This does not seem like the right fix. What if GCC supports both > -mcpu=e500mc64 and -mcpu=e6500, and we're using the latter? Or for that I can understand what you mean, but in current kernel, -mcpu=e500mc64 should be excluded from -mcpu=e6500, arch/powerpc/Makefile: E5500_CPU := $(call cc-option,-mcpu=e500mc64,-mcpu=powerpc64) CFLAGS-$(CONFIG_E5500_CPU) += $(E5500_CPU) CFLAGS-$(CONFIG_E6500_CPU) += $(call cc-option,-mcpu=e6500,$(E5500_CPU)) But unfortunately, another place also use the same option, lib/raid6/Makefile: raid6_pq-$(CONFIG_ALTIVEC) += altivec1.o altivec2.o altivec4.o altivec8.o ... ifeq ($(CONFIG_ALTIVEC),y) altivec_flags := -maltivec -mabi=altivec endif Looks we have to do something in this common Makefile file as well, but it may be a bit ugly if still judge some cpu-specific flags... So what about this version? diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile index 607acf5..872a85c 100644 --- a/arch/powerpc/Makefile +++ b/arch/powerpc/Makefile @@ -127,7 +127,12 @@ CFLAGS-$(CONFIG_POWER5_CPU) += $(call cc-option,-mcpu=power5) CFLAGS-$(CONFIG_POWER6_CPU) += $(call cc-option,-mcpu=power6) CFLAGS-$(CONFIG_POWER7_CPU) += $(call cc-option,-mcpu=power7) +# Altivec and Spe options not allowed with e500mc64 in GCC. +ifeq ($(CONFIG_ALTIVEC),) E5500_CPU := $(call cc-option,-mcpu=e500mc64,-mcpu=powerpc64) +else +E5500_CPU := -mcpu=powerpc64 +endif CFLAGS-$(CONFIG_E5500_CPU) += $(E5500_CPU) CFLAGS-$(CONFIG_E6500_CPU) += $(call cc-option,-mcpu=e6500,$(E5500_CPU)) Tiejun > matter, if we're using -mcpu=whatever-ibm-chip-has-this? > > Plus, wouldn't you need to do something to prevent code in that file > from being called? > > -Scott > > > > ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [RFC][PATCH] powerpc/CoreNet64: compile with CONFIG_E{5,6}500_CPU well 2013-11-21 8:59 ` [RFC][PATCH] powerpc/CoreNet64: compile with CONFIG_E{5, 6}500_CPU well "“tiejun.chen”" @ 2013-11-21 17:42 ` Scott Wood 0 siblings, 0 replies; 6+ messages in thread From: Scott Wood @ 2013-11-21 17:42 UTC (permalink / raw) To: "“tiejun.chen”"; +Cc: linuxppc-dev On Thu, 2013-11-21 at 16:59 +0800, "=E2=80=9Ctiejun.chen=E2=80=9D" wrote: > On 11/21/2013 12:41 AM, Scott Wood wrote: > > On Wed, 2013-11-20 at 16:35 +0800, Tiejun Chen wrote: > >> +# Altivec and Spe options not allowed with e500mc64 in GCC. > >> +ifeq ($(call cc-option-yn,-mcpu=3De500mc64),n) > >> obj-$(CONFIG_ALTIVEC) +=3D xor_vmx.o > >> CFLAGS_xor_vmx.o +=3D -maltivec -mabi=3Daltivec > >> +endif > > > > This does not seem like the right fix. What if GCC supports both > > -mcpu=3De500mc64 and -mcpu=3De6500, and we're using the latter? Or f= or that >=20 > I can understand what you mean, but in current kernel, -mcpu=3De500mc64= should be=20 > excluded from -mcpu=3De6500, >=20 > arch/powerpc/Makefile: >=20 > E5500_CPU :=3D $(call cc-option,-mcpu=3De500mc64,-mcpu=3Dpowerpc64) > CFLAGS-$(CONFIG_E5500_CPU) +=3D $(E5500_CPU) > CFLAGS-$(CONFIG_E6500_CPU) +=3D $(call cc-option,-mcpu=3De6500,$(E5500_= CPU)) But your patch doesn't test what options we're actually using. You tested what options the compiler supports. > But unfortunately, another place also use the same option, >=20 > lib/raid6/Makefile: >=20 > raid6_pq-$(CONFIG_ALTIVEC) +=3D altivec1.o altivec2.o altivec4.o altive= c8.o > ... > ifeq ($(CONFIG_ALTIVEC),y) > altivec_flags :=3D -maltivec -mabi=3Daltivec > endif >=20 > Looks we have to do something in this common Makefile file as well, but= it may=20 > be a bit ugly if still judge some cpu-specific flags... >=20 > So what about this version? >=20 > diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile > index 607acf5..872a85c 100644 > --- a/arch/powerpc/Makefile > +++ b/arch/powerpc/Makefile > @@ -127,7 +127,12 @@ CFLAGS-$(CONFIG_POWER5_CPU) +=3D $(call cc-option,= -mcpu=3Dpower5) > CFLAGS-$(CONFIG_POWER6_CPU) +=3D $(call cc-option,-mcpu=3Dpower6) > CFLAGS-$(CONFIG_POWER7_CPU) +=3D $(call cc-option,-mcpu=3Dpower7) >=20 > +# Altivec and Spe options not allowed with e500mc64 in GCC. > +ifeq ($(CONFIG_ALTIVEC),) > E5500_CPU :=3D $(call cc-option,-mcpu=3De500mc64,-mcpu=3Dpowerpc64) > +else > +E5500_CPU :=3D -mcpu=3Dpowerpc64 > +endif > CFLAGS-$(CONFIG_E5500_CPU) +=3D $(E5500_CPU) > CFLAGS-$(CONFIG_E6500_CPU) +=3D $(call cc-option,-mcpu=3De6500,$(E550= 0_CPU)) Reverse the if/else so it uses positive logic, and remove the irrelevant SPE from the comment, but otherwise I guess it's OK. -Scott ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2013-11-21 17:43 UTC | newest]
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2013-11-20 8:35 [RFC][PATCH] powerpc/CoreNet64: compile with CONFIG_E{5, 6}500_CPU well Tiejun Chen
2013-11-20 16:41 ` [RFC][PATCH] powerpc/CoreNet64: compile with CONFIG_E{5,6}500_CPU well Scott Wood
2013-11-20 18:47 ` [RFC][PATCH] powerpc/CoreNet64: compile with CONFIG_E{5, 6}500_CPU well Kumar Gala
2013-11-20 22:03 ` [RFC][PATCH] powerpc/CoreNet64: compile with CONFIG_E{5,6}500_CPU well Scott Wood
2013-11-21 8:59 ` [RFC][PATCH] powerpc/CoreNet64: compile with CONFIG_E{5, 6}500_CPU well "“tiejun.chen”"
2013-11-21 17:42 ` [RFC][PATCH] powerpc/CoreNet64: compile with CONFIG_E{5,6}500_CPU well Scott Wood
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