linuxppc-dev.lists.ozlabs.org archive mirror
 help / color / mirror / Atom feed
From: Gavin Shan <shangw@linux.vnet.ibm.com>
To: linuxppc-dev@lists.ozlabs.org
Cc: Gavin Shan <shangw@linux.vnet.ibm.com>
Subject: [PATCH 2/4] powerpc/eeh: Cache AER capability in EEH dev
Date: Wed, 25 Dec 2013 16:58:54 +0800	[thread overview]
Message-ID: <1387961936-20451-2-git-send-email-shangw@linux.vnet.ibm.com> (raw)
In-Reply-To: <1387961936-20451-1-git-send-email-shangw@linux.vnet.ibm.com>

When fixing AER registers on PowerNV platform, we need the position
of AER capability for each PCI device. The patch caches that to
EEH device during probe time. Also, the patch figures the EEH device
is associated with the upstream port of PCIe bridge or not, which
is useful while fixing AER registers on PowerNV platform.

Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
---
 arch/powerpc/include/asm/eeh.h               |    8 +++++---
 arch/powerpc/platforms/powernv/eeh-powernv.c |    5 ++++-
 2 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
index 4b709bf..92c2ec6 100644
--- a/arch/powerpc/include/asm/eeh.h
+++ b/arch/powerpc/include/asm/eeh.h
@@ -86,9 +86,10 @@ struct eeh_pe {
  */
 #define EEH_DEV_BRIDGE		(1 << 0)	/* PCI bridge		*/
 #define EEH_DEV_ROOT_PORT	(1 << 1)	/* PCIe root port	*/
-#define EEH_DEV_DS_PORT		(1 << 2)	/* Downstream port	*/
-#define EEH_DEV_IRQ_DISABLED	(1 << 3)	/* Interrupt disabled	*/
-#define EEH_DEV_DISCONNECTED	(1 << 4)	/* Removing from PE	*/
+#define EEH_DEV_US_PORT		(1 << 2)	/* Upstream port	*/
+#define EEH_DEV_DS_PORT		(1 << 3)	/* Downstream port	*/
+#define EEH_DEV_IRQ_DISABLED	(1 << 4)	/* Interrupt disabled	*/
+#define EEH_DEV_DISCONNECTED	(1 << 5)	/* Removing from PE	*/
 
 #define EEH_DEV_SYSFS		(1 << 8)	/* Sysfs created        */
 
@@ -99,6 +100,7 @@ struct eeh_dev {
 	int pe_config_addr;		/* PE config address		*/
 	u32 config_space[16];		/* Saved PCI config space	*/
 	u8 pcie_cap;			/* Saved PCIe capability	*/
+	int aer_cap;			/* Saved AER capability		*/
 	struct eeh_pe *pe;		/* Associated PE		*/
 	struct list_head list;		/* Form link list in the PE	*/
 	struct pci_controller *phb;	/* Associated PHB		*/
diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c b/arch/powerpc/platforms/powernv/eeh-powernv.c
index 73b9814..df54b76 100644
--- a/arch/powerpc/platforms/powernv/eeh-powernv.c
+++ b/arch/powerpc/platforms/powernv/eeh-powernv.c
@@ -128,9 +128,12 @@ static int powernv_eeh_dev_probe(struct pci_dev *dev, void *flag)
 		edev->mode |= EEH_DEV_BRIDGE;
 	if (pci_is_pcie(dev)) {
 		edev->pcie_cap = pci_pcie_cap(dev);
-
+		edev->aer_cap = pci_find_ext_capability(dev,
+						PCI_EXT_CAP_ID_ERR);
 		if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT)
 			edev->mode |= EEH_DEV_ROOT_PORT;
+		else if (pci_pcie_type(dev) == PCI_EXP_TYPE_UPSTREAM)
+			edev->mode |= EEH_DEV_US_PORT;
 		else if (pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM)
 			edev->mode |= EEH_DEV_DS_PORT;
 	}
-- 
1.7.10.4

  reply	other threads:[~2013-12-25  8:59 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-12-25  8:58 [PATCH 1/4] powerpc/eeh: Add restore_bars operation Gavin Shan
2013-12-25  8:58 ` Gavin Shan [this message]
2013-12-25  8:58 ` [PATCH 3/4] powerpc/powernv: Detect PHB chip revision Gavin Shan
2013-12-25  8:58 ` [PATCH 4/4] powerpc/eeh: Eliminate AER gap Gavin Shan
2013-12-27 22:20 ` [PATCH 1/4] powerpc/eeh: Add restore_bars operation Benjamin Herrenschmidt
2014-01-01  3:29   ` Gavin Shan

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1387961936-20451-2-git-send-email-shangw@linux.vnet.ibm.com \
    --to=shangw@linux.vnet.ibm.com \
    --cc=linuxppc-dev@lists.ozlabs.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).