[PATCH] ASoC: fsl_sai: Fix one bug for hardware limitation.

[PATCH] ASoC: fsl_sai: Fix one bug for hardware limitation.

[Xiubo Li]

This is maybe one bug or a limitation of the hardware that the {T,R}CR2's
Synchronous Mode bits must be set as late as possible, or the SAI device
maybe hanged up, and there has not any explaination about this limitation
in the SAI Data Sheet.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
---
 sound/soc/fsl/fsl_sai.c | 31 ++++++++++++++++++++++---------
 1 file changed, 22 insertions(+), 9 deletions(-)

diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index af80246..59228a10 100644
--- a/sound/soc/fsl/fsl_sai.c
+++ b/sound/soc/fsl/fsl_sai.c
@@ -62,6 +62,7 @@ static int fsl_sai_set_dai_sysclk_tr(struct snd_soc_dai *cpu_dai,
 		reg_cr2 = FSL_SAI_RCR2;
 
 	val_cr2 = sai_readl(sai, sai->base + reg_cr2);
+
 	switch (clk_id) {
 	case FSL_SAI_CLK_BUS:
 		val_cr2 &= ~FSL_SAI_CR2_MSEL_MASK;
@@ -82,6 +83,7 @@ static int fsl_sai_set_dai_sysclk_tr(struct snd_soc_dai *cpu_dai,
 	default:
 		return -EINVAL;
 	}
+
 	sai_writel(sai, val_cr2, sai->base + reg_cr2);
 
 	return 0;
@@ -138,14 +140,13 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai *cpu_dai,
 	val_cr4 = sai_readl(sai, sai->base + reg_cr4);
 
 	if (sai->big_endian_data)
-		val_cr4 |= FSL_SAI_CR4_MF;
-	else
 		val_cr4 &= ~FSL_SAI_CR4_MF;
+	else
+		val_cr4 |= FSL_SAI_CR4_MF;
 
 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 	case SND_SOC_DAIFMT_I2S:
 		val_cr4 |= FSL_SAI_CR4_FSE;
-		val_cr4 |= FSL_SAI_CR4_FSP;
 		break;
 	default:
 		return -EINVAL;
@@ -185,9 +186,6 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai *cpu_dai,
 		return -EINVAL;
 	}
 
-	if (fsl_dir == FSL_FMT_RECEIVER)
-		val_cr2 |= FSL_SAI_CR2_SYNC;
-
 	sai_writel(sai, val_cr2, sai->base + reg_cr2);
 	sai_writel(sai, val_cr4, sai->base + reg_cr4);
 
@@ -253,10 +251,11 @@ static int fsl_sai_hw_params(struct snd_pcm_substream *substream,
 	val_cr5 |= FSL_SAI_CR5_WNW(word_width);
 	val_cr5 |= FSL_SAI_CR5_W0W(word_width);
 
+	val_cr5 &= ~FSL_SAI_CR5_FBT_MASK;
 	if (sai->big_endian_data)
-		val_cr5 |= FSL_SAI_CR5_FBT(word_width - 1);
-	else
 		val_cr5 |= FSL_SAI_CR5_FBT(0);
+	else
+		val_cr5 |= FSL_SAI_CR5_FBT(word_width - 1);
 
 	val_cr4 |= FSL_SAI_CR4_FRSZ(channels);
 	val_mr = ~0UL - ((1 << channels) - 1);
@@ -327,8 +326,22 @@ static int fsl_sai_startup(struct snd_pcm_substream *substream,
 		struct snd_soc_dai *cpu_dai)
 {
 	struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
+	u32 val_cr2;
+	int ret;
+
+	ret = clk_prepare_enable(sai->clk);
+	if (ret)
+		return ret;
+
+	val_cr2 = sai_readl(sai, sai->base + FSL_SAI_TCR2);
+	val_cr2 &= ~FSL_SAI_CR2_SYNC;
+	sai_writel(sai, val_cr2, sai->base + FSL_SAI_TCR2);
 
-	return clk_prepare_enable(sai->clk);
+	val_cr2 = sai_readl(sai, sai->base + FSL_SAI_RCR2);
+	val_cr2 |= FSL_SAI_CR2_SYNC;
+	sai_writel(sai, val_cr2, sai->base + FSL_SAI_RCR2);
+
+	return 0;
 }
 
 static void fsl_sai_shutdown(struct snd_pcm_substream *substream,
-- 
1.8.4

Re: [PATCH] ASoC: fsl_sai: Fix one bug for hardware limitation.

[Mark Brown]

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On Thu, Dec 26, 2013 at 10:57:22AM +0800, Xiubo Li wrote:
> This is maybe one bug or a limitation of the hardware that the {T,R}CR2's
> Synchronous Mode bits must be set as late as possible, or the SAI device
> maybe hanged up, and there has not any explaination about this limitation
> in the SAI Data Sheet.

If they really should be set as late as possible then I'd expect them to
be being set in the trigger function, that's what gets called as the
audio actually starts streaming.  This is moving it to the startup
function which is one of the first things that happens during audio
stream setup so presumably makes things worse.

Also...

> @@ -62,6 +62,7 @@ static int fsl_sai_set_dai_sysclk_tr(struct snd_soc_dai *cpu_dai,
>  		reg_cr2 = FSL_SAI_RCR2;
>  
>  	val_cr2 = sai_readl(sai, sai->base + reg_cr2);
> +
>  	switch (clk_id) {
>  	case FSL_SAI_CLK_BUS:
>  		val_cr2 &= ~FSL_SAI_CR2_MSEL_MASK;
> @@ -82,6 +83,7 @@ static int fsl_sai_set_dai_sysclk_tr(struct snd_soc_dai *cpu_dai,
>  	default:
>  		return -EINVAL;
>  	}
> +
>  	sai_writel(sai, val_cr2, sai->base + reg_cr2);
>  
>  	return 0;

These appear to be unrelated changes - please send as a separate patch
if they're useful.

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RE: [PATCH] ASoC: fsl_sai: Fix one bug for hardware limitation.

[Li.Xiubo]

Hi Mark,

> Subject: Re: [PATCH] ASoC: fsl_sai: Fix one bug for hardware limitation.
>=20
> On Thu, Dec 26, 2013 at 10:57:22AM +0800, Xiubo Li wrote:
> > This is maybe one bug or a limitation of the hardware that the {T,R}CR2=
's
> > Synchronous Mode bits must be set as late as possible, or the SAI devic=
e
> > maybe hanged up, and there has not any explaination about this limitati=
on
> > in the SAI Data Sheet.
>=20
> If they really should be set as late as possible then I'd expect them to
> be being set in the trigger function, that's what gets called as the
> audio actually starts streaming.  This is moving it to the startup
> function which is one of the first things that happens during audio
> stream setup so presumably makes things worse.
>=20

Yes, it is.

If everything is OK, I will send another new patch later.

Thanks,

---
Best Regards,
Xiubo