* [PATCH 1/2] powerpc/dts: fix lbc lack of error interrupt
@ 2014-01-07 6:26 Dongsheng Wang
2014-01-07 10:34 ` Mark Rutland
0 siblings, 1 reply; 2+ messages in thread
From: Dongsheng Wang @ 2014-01-07 6:26 UTC (permalink / raw)
To: scottwood, galak; +Cc: devicetree, linuxppc-dev, Wang Dongsheng
From: Wang Dongsheng <dongsheng.wang@freescale.com>
P1020, P1021, P1022, P1023 when the lbc get error, the error
interrupt will be triggered. The corresponding interrupt is
internal IRQ0. So system have to process the lbc IRQ0 interrupt.
The corresponding lbc general interrupt is internal IRQ3.
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
diff --git a/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi
index 68cc5e7..13f209f 100644
--- a/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi
@@ -36,7 +36,8 @@
#address-cells = <2>;
#size-cells = <1>;
compatible = "fsl,p1020-elbc", "fsl,elbc", "simple-bus";
- interrupts = <19 2 0 0>;
+ interrupts = <19 2 0 0
+ 16 2 0 0>;
};
/* controller at 0x9000 */
diff --git a/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
index adb82fd..cffc93e 100644
--- a/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
@@ -36,7 +36,8 @@
#address-cells = <2>;
#size-cells = <1>;
compatible = "fsl,p1021-elbc", "fsl,elbc", "simple-bus";
- interrupts = <19 2 0 0>;
+ interrupts = <19 2 0 0
+ 16 2 0 0>;
};
/* controller at 0x9000 */
diff --git a/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
index e179803..979670d 100644
--- a/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
@@ -40,7 +40,8 @@
* pin muxing when the DIU is enabled.
*/
compatible = "fsl,p1022-elbc", "fsl,elbc";
- interrupts = <19 2 0 0>;
+ interrupts = <19 2 0 0
+ 16 2 0 0>;
};
/* controller at 0x9000 */
diff --git a/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
index f1105bf..f5f5043 100644
--- a/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
@@ -36,7 +36,8 @@
#address-cells = <2>;
#size-cells = <1>;
compatible = "fsl,p1023-elbc", "fsl,elbc", "simple-bus";
- interrupts = <19 2 0 0>;
+ interrupts = <19 2 0 0
+ 16 2 0 0>;
};
/* controller at 0xa000 */
--
1.8.5
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH 1/2] powerpc/dts: fix lbc lack of error interrupt
2014-01-07 6:26 [PATCH 1/2] powerpc/dts: fix lbc lack of error interrupt Dongsheng Wang
@ 2014-01-07 10:34 ` Mark Rutland
0 siblings, 0 replies; 2+ messages in thread
From: Mark Rutland @ 2014-01-07 10:34 UTC (permalink / raw)
To: Dongsheng Wang
Cc: scottwood@freescale.com, devicetree@vger.kernel.org,
linuxppc-dev@lists.ozlabs.org, galak@codeaurora.org
On Tue, Jan 07, 2014 at 06:26:42AM +0000, Dongsheng Wang wrote:
> From: Wang Dongsheng <dongsheng.wang@freescale.com>
>
> P1020, P1021, P1022, P1023 when the lbc get error, the error
> interrupt will be triggered. The corresponding interrupt is
> internal IRQ0. So system have to process the lbc IRQ0 interrupt.
>
> The corresponding lbc general interrupt is internal IRQ3.
>
> Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
>
> diff --git a/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi
> index 68cc5e7..13f209f 100644
> --- a/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi
> @@ -36,7 +36,8 @@
> #address-cells = <2>;
> #size-cells = <1>;
> compatible = "fsl,p1020-elbc", "fsl,elbc", "simple-bus";
> - interrupts = <19 2 0 0>;
> + interrupts = <19 2 0 0
> + 16 2 0 0>;
Minor nit: please bracket individual list elements like so:
interrupts = <19 2 0 0>,
<16 2 0 0>;
Otherwise this looks fine to me.
Thanks,
Mark.
^ permalink raw reply [flat|nested] 2+ messages in thread
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