* [PATCH] ppc476: Enable a linker work around for IBM errata #46
@ 2014-02-24 7:00 Alistair Popple
2014-02-24 13:35 ` Josh Boyer
0 siblings, 1 reply; 3+ messages in thread
From: Alistair Popple @ 2014-02-24 7:00 UTC (permalink / raw)
To: benh; +Cc: Alistair Popple, linuxppc-dev
This patch adds an option to enable a work around for an icache bug on
476 that can cause execution of stale instructions when falling
through pages (IBM errata #46). It requires a recent version of
binutils which supports the --ppc476-workaround option.
The work around enables the appropriate linker options and ensures
that all module output sections are aligned to 4K page boundaries. The
work around is only required when building modules.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
---
arch/powerpc/Makefile | 5 +++++
arch/powerpc/platforms/44x/Kconfig | 14 ++++++++++++++
arch/powerpc/platforms/44x/ppc476_modules.lds | 15 +++++++++++++++
3 files changed, 34 insertions(+)
create mode 100644 arch/powerpc/platforms/44x/ppc476_modules.lds
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index 0f4344e..2b13616 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -158,6 +158,11 @@ CHECKFLAGS += -m$(CONFIG_WORD_SIZE) -D__powerpc__ -D__powerpc$(CONFIG_WORD_SIZE)
KBUILD_LDFLAGS_MODULE += arch/powerpc/lib/crtsavres.o
+ifeq ($(CONFIG_476FPE_ERR46),y)
+ KBUILD_LDFLAGS_MODULE += --ppc476-workaround \
+ -T $(srctree)/arch/powerpc/platforms/44x/ppc476_modules.lds
+endif
+
# No AltiVec or VSX instructions when building kernel
KBUILD_CFLAGS += $(call cc-option,-mno-altivec)
KBUILD_CFLAGS += $(call cc-option,-mno-vsx)
diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig
index d6c7506..b817bf58 100644
--- a/arch/powerpc/platforms/44x/Kconfig
+++ b/arch/powerpc/platforms/44x/Kconfig
@@ -324,6 +324,20 @@ config APM821xx
select IBM_EMAC_EMAC4
select IBM_EMAC_TAH
+config 476FPE_ERR46
+ depends on 476FPE
+ bool "Enable linker work around for PPC476FPE errata #46"
+ help
+ This option enables a work around for an icache bug on 476
+ that can cause execution of stale instructions when falling
+ through pages (IBM errata #46). It requires a recent version
+ of binutils which supports the --ppc476-workaround option.
+
+ The work around enables the appropriate linker options and
+ ensures that all module output sections are aligned to 4K
+ page boundaries. The work around is only required when
+ building modules.
+
# 44x errata/workaround config symbols, selected by the CPU models above
config IBM440EP_ERR42
bool
diff --git a/arch/powerpc/platforms/44x/ppc476_modules.lds b/arch/powerpc/platforms/44x/ppc476_modules.lds
new file mode 100644
index 0000000..9fec5d3
--- /dev/null
+++ b/arch/powerpc/platforms/44x/ppc476_modules.lds
@@ -0,0 +1,15 @@
+SECTIONS
+{
+ .text : ALIGN(4096)
+ {
+ *(.text .text.* .fixup)
+ }
+ .init.text : ALIGN(4096)
+ {
+ *(.init.text .init.text.*)
+ }
+ .exit.text : ALIGN(4096)
+ {
+ *(.exit.text .exit.text.*)
+ }
+}
--
1.7.10.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] ppc476: Enable a linker work around for IBM errata #46
2014-02-24 7:00 [PATCH] ppc476: Enable a linker work around for IBM errata #46 Alistair Popple
@ 2014-02-24 13:35 ` Josh Boyer
2014-02-24 23:52 ` Alistair Popple
0 siblings, 1 reply; 3+ messages in thread
From: Josh Boyer @ 2014-02-24 13:35 UTC (permalink / raw)
To: Alistair Popple; +Cc: linuxppc-dev
On Mon, Feb 24, 2014 at 2:00 AM, Alistair Popple <alistair@popple.id.au> wrote:
> This patch adds an option to enable a work around for an icache bug on
> 476 that can cause execution of stale instructions when falling
> through pages (IBM errata #46). It requires a recent version of
> binutils which supports the --ppc476-workaround option.
>
> The work around enables the appropriate linker options and ensures
> that all module output sections are aligned to 4K page boundaries. The
> work around is only required when building modules.
What happens if you're using 64K pages? Is the alignment 4K always,
or does it need to be aligned to PAGE_SIZE?
josh
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] ppc476: Enable a linker work around for IBM errata #46
2014-02-24 13:35 ` Josh Boyer
@ 2014-02-24 23:52 ` Alistair Popple
0 siblings, 0 replies; 3+ messages in thread
From: Alistair Popple @ 2014-02-24 23:52 UTC (permalink / raw)
To: Josh Boyer; +Cc: linuxppc-dev
On Mon, 24 Feb 2014 08:35:06 Josh Boyer wrote:
> On Mon, Feb 24, 2014 at 2:00 AM, Alistair Popple <alistair@popple.id.au>
wrote:
> > This patch adds an option to enable a work around for an icache bug on
> > 476 that can cause execution of stale instructions when falling
> > through pages (IBM errata #46). It requires a recent version of
> > binutils which supports the --ppc476-workaround option.
> >
> > The work around enables the appropriate linker options and ensures
> > that all module output sections are aligned to 4K page boundaries. The
> > work around is only required when building modules.
>
> What happens if you're using 64K pages? Is the alignment 4K always,
> or does it need to be aligned to PAGE_SIZE?
The work around inserts an extra instruction on 4K page boundaries. As a 64K
(or a 16K) page boundary is also a 4K page boundary the work around should
cover those page sizes as well.
- Alistair
> josh
^ permalink raw reply [flat|nested] 3+ messages in thread
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2014-02-24 7:00 [PATCH] ppc476: Enable a linker work around for IBM errata #46 Alistair Popple
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