From: Michael Ellerman <mpe@ellerman.id.au>
To: Joel Stanley <joel@jms.id.au>
Cc: paulus@samba.org, linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH 1/3] powerpc/kvm: Remove redundant save of SIER AND MMCR2
Date: Fri, 04 Jul 2014 12:16:49 +1000 [thread overview]
Message-ID: <1404440209.18906.1.camel@concordia> (raw)
In-Reply-To: <1404367956-19515-2-git-send-email-joel@jms.id.au>
On Thu, 2014-07-03 at 15:42 +0930, Joel Stanley wrote:
> These two registers are already saved in the block above. Aside from
> being unnecessary, by the time we get down to the second save location
> r8 no longer contains MMCR2, so we are clobbering the saved value with
> PMC5.
MMCR2 primarily consists of counter freeze bits. So restoring the value of PMC5
into MMCR2 will most likely have the effect of freezing counters.
Fixes: 72cde5a88d37 ("KVM: PPC: Book3S HV: Save/restore host PMU registers that are new in POWER8")
Cc: stable@vger.kernel.org
With the above added:
Acked-by: Michael Ellerman <mpe@ellerman.id.au>
cheers
next prev parent reply other threads:[~2014-07-04 2:16 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-03 6:12 [PATCH 0/3] POWER8 PMU bugfixes Joel Stanley
2014-07-03 6:12 ` [PATCH 1/3] powerpc/kvm: Remove redundant save of SIER AND MMCR2 Joel Stanley
2014-07-04 2:16 ` Michael Ellerman [this message]
2014-07-04 7:46 ` Paul Mackerras
2014-07-04 7:57 ` Alexander Graf
2014-07-03 6:12 ` [PATCH 2/3] powerpc/perf: Add PPMU_ARCH_207S define Joel Stanley
2014-07-04 2:34 ` Michael Ellerman
2014-07-03 6:12 ` [PATCH 3/3] powerpc/perf: Clear MMCR2 when enabling PMU Joel Stanley
2014-07-04 2:36 ` Michael Ellerman
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