From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org, paulus@samba.org
Subject: Re: [PATCH] powerpc: thp: Add write barrier after updating the valid bit
Date: Wed, 23 Jul 2014 07:55:12 +1000 [thread overview]
Message-ID: <1406066112.22200.28.camel@pasglop> (raw)
In-Reply-To: <8761iptebe.fsf@linux.vnet.ibm.com>
On Wed, 2014-07-23 at 00:23 +0530, Aneesh Kumar K.V wrote:
> > A better place for this would be right before the last write to the PMD
> > (that's also clearing BUSY) in __hash_page_thp(). Basically, it's the
> > normal lock ordering that's missing here, nothing specific to
> > mark_hpte_slot_valid() but instead, any state relative to the BUSY bit
> > in the PMD (including the actual hash writes in update_pp etc...)
> >
>
> IIUC updatepp already have required barriers. ie in updatepp we do tlbie
> which should take care of the ordering right ?
Only if it succeeds but that doesn't matter, I'd rather we get the
semantics right. The clearing of the busy bit is an unlock, it should
have the appropriate barriers like it does in other variants of hash
page.
>
> Now the reason i moved that spm_wmb() to mark_hpte_slot_valid was to
> pair it with smb_rmb() in get_hpte_slot_array().
Which is also probably in the wrong place. Care to explain to me the
exact relationship ?
Ben.
next prev parent reply other threads:[~2014-07-22 21:55 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-15 14:52 [PATCH] powerpc: thp: Add write barrier after updating the valid bit Aneesh Kumar K.V
2014-07-22 5:27 ` Benjamin Herrenschmidt
2014-07-22 18:53 ` Aneesh Kumar K.V
2014-07-22 21:55 ` Benjamin Herrenschmidt [this message]
2014-07-29 6:55 ` Aneesh Kumar K.V
2014-07-29 7:00 ` Benjamin Herrenschmidt
2014-07-29 10:37 ` Aneesh Kumar K.V
-- strict thread matches above, loose matches on Subject: below --
2014-07-15 14:51 Aneesh Kumar K.V
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