From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from e23smtp05.au.ibm.com (e23smtp05.au.ibm.com [202.81.31.147]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id DBD5D1A0483 for ; Wed, 23 Jul 2014 13:06:19 +1000 (EST) Received: from /spool/local by e23smtp05.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Wed, 23 Jul 2014 13:06:18 +1000 Received: from d23relay05.au.ibm.com (d23relay05.au.ibm.com [9.190.235.152]) by d23dlp02.au.ibm.com (Postfix) with ESMTP id D771B2BB005C for ; Wed, 23 Jul 2014 13:06:15 +1000 (EST) Received: from d23av02.au.ibm.com (d23av02.au.ibm.com [9.190.235.138]) by d23relay05.au.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id s6N2hNcx9437548 for ; Wed, 23 Jul 2014 12:43:23 +1000 Received: from d23av02.au.ibm.com (localhost [127.0.0.1]) by d23av02.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id s6N36EWY004774 for ; Wed, 23 Jul 2014 13:06:14 +1000 From: Alexey Kardashevskiy To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH v2 12/18] powerpc/iommu: Fix missing permission bits in iommu_put_tce_user_mode() Date: Wed, 23 Jul 2014 13:05:58 +1000 Message-Id: <1406084764-24685-13-git-send-email-aik@ozlabs.ru> In-Reply-To: <1406084764-24685-1-git-send-email-aik@ozlabs.ru> References: <1406084764-24685-1-git-send-email-aik@ozlabs.ru> Cc: Alexey Kardashevskiy , Paul Mackerras , Gavin Shan List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , This adds missing permission bits to the translated TCE. Signed-off-by: Alexey Kardashevskiy --- arch/powerpc/kernel/iommu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c index da04561..01ac319 100644 --- a/arch/powerpc/kernel/iommu.c +++ b/arch/powerpc/kernel/iommu.c @@ -1085,6 +1085,7 @@ int iommu_put_tce_user_mode(struct iommu_table *tbl, unsigned long entry, return -EFAULT; } hwaddr = (unsigned long) page_address(page) + offset; + hwaddr |= tce & (TCE_PCI_READ | TCE_PCI_WRITE); ret = iommu_tce_build(tbl, entry, hwaddr, direction); if (ret) -- 2.0.0