Re: [PATCH 1/2] powerpc/booke: Restrict SPE exception handlers to e200/e500 cores

[Scott Wood <scottwood@freescale.com>]

On Wed, 2014-08-06 at 11:39 +0300, Mihai Caraman wrote:
> SPE exception handlers are now defined for 32-bit e500mc cores even though
> SPE unit is not present and CONFIG_SPE is undefined.
> 
> Restrict SPE exception handlers to e200/e500 cores adding CONFIG_SPE_POSSIBLE
> and consequently guard __stup_ivors and __setup_cpu functions.
> 
> Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
> ---
>  arch/powerpc/kernel/cpu_setup_fsl_booke.S | 12 +++++++++++-
>  arch/powerpc/kernel/cputable.c            |  5 +++++
>  arch/powerpc/kernel/head_fsl_booke.S      | 18 +++++++++++++-----
>  arch/powerpc/platforms/Kconfig.cputype    |  6 +++++-
>  4 files changed, 34 insertions(+), 7 deletions(-)
> 
> diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
> index 4f1393d..44bb2c9 100644
> --- a/arch/powerpc/kernel/cpu_setup_fsl_booke.S
> +++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
> @@ -91,6 +91,7 @@ _GLOBAL(setup_altivec_idle)
>  
>  	blr
>  
> +#if defined(CONFIG_E500) && defined(CONFIG_PPC_E500MC)

When would you ever have CONFIG_PPC_E500MC without CONFIG_E500?

> diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
> index b497188..4f8930f 100644
> --- a/arch/powerpc/kernel/head_fsl_booke.S
> +++ b/arch/powerpc/kernel/head_fsl_booke.S
> @@ -613,6 +613,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV)
>  	mfspr	r10, SPRN_SPRG_RSCRATCH0
>  	b	InstructionStorage
>  
> +/* Define SPE handlers for e200 and e500v2 */
>  #ifdef CONFIG_SPE
>  	/* SPE Unavailable */
>  	START_EXCEPTION(SPEUnavailable)
> @@ -622,10 +623,10 @@ END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV)
>  	b	fast_exception_return
>  1:	addi	r3,r1,STACK_FRAME_OVERHEAD
>  	EXC_XFER_EE_LITE(0x2010, KernelSPE)
> -#else
> +#elif CONFIG_SPE_POSSIBLE

#elif defined(CONFIG_SPE_POSSIBLE)

Likewise elsewhere

-Scott