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Subject: Re: [PATCH 2/2] fsl_ifc: Support all 8 IFC chip selects
From: Scott Wood <scottwood@freescale.com>
To: Aaron Sierra <asierra@xes-inc.com>
Date: Tue, 19 Aug 2014 19:08:05 -0500
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Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
 linuxppc-dev@lists.ozlabs.org, Prabhakar
 Kushwaha <prabhakar@freescale.com>, Arnd Bergmann <arnd@arndb.de>
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On Fri, 2014-08-15 at 16:07 -0500, Aaron Sierra wrote:
> Freescale's QorIQ T Series processors support 8 IFC chip selects
> within a memory map backward compatible with previous P Series
> processors which supported only 4 chip selects.
> 
> Signed-off-by: Aaron Sierra <asierra@xes-inc.com>
> ---
>  include/linux/fsl_ifc.h | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/include/linux/fsl_ifc.h b/include/linux/fsl_ifc.h
> index 84d60cb..62762ff 100644
> --- a/include/linux/fsl_ifc.h
> +++ b/include/linux/fsl_ifc.h
> @@ -29,7 +29,7 @@
>  #include <linux/of_platform.h>
>  #include <linux/interrupt.h>
>  
> -#define FSL_IFC_BANK_COUNT 4
> +#define FSL_IFC_BANK_COUNT 8

First please modify fsl_ifc_nand.c to limit itself to the number of
banks it dynamically determines are present based on the IFC version.

-Scott