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Subject: Re: [PATCH v2] fsl_ifc: Support all 8 IFC chip selects
From: Scott Wood <scottwood@freescale.com>
To: Aaron Sierra <asierra@xes-inc.com>
Date: Tue, 26 Aug 2014 16:48:12 -0500
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Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
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On Tue, 2014-08-26 at 16:34 -0500, Aaron Sierra wrote:
> > > +static inline u32 fsl_ifc_version(struct fsl_ifc_regs *regs) {
> > > +	return ioread32be(&regs->ifc_rev) & FSL_IFC_VERSION_MASK;
> > > +}
> > > +
> > > +static inline int fsl_ifc_bank_count(struct fsl_ifc_regs *regs) {
> > > +	return (fsl_ifc_version(regs) == FSL_IFC_VERSION_1_0_0) ? 4 : 8;
> > > +}
> > 
> > Whitespace
> 
> Oops.
> 
> > Do we really need the bank count here, as opposed to just checking it in
> > probe()?  I also don't really care for reading the registers over and
> > over, even though it's not performance critical.
> 
> The bank count is used in fsl_ifc_nand.c and fsl_ifc.c, so I thought it
> was a good idea to have the version to bank count mapping defined in one
> place rather than two.

OK.

> > The reserved bits of the version register are defined as zero for
> > current versions -- I think just comparing ifc_rev to the version
> > constant, as is currently done, is fine.
> 
> I wasn't sure because the manuals I have only say that reserved values
> are zero at reset.

Well, we already have a version check that assumes they're zero, but if
you want to be especially safe I guess that's OK. :-)

-Scott