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From: Michael Neuling <mikey@neuling.org>
To: Gavin Shan <gwshan@linux.vnet.ibm.com>
Cc: cbe-oss-dev@lists.ozlabs.org, arnd@arndb.de, greg@kroah.com,
	linux-kernel@vger.kernel.org, linuxppc-dev@ozlabs.org,
	imunsie@au1.ibm.com, anton@samba.org, jk@ozlabs.org
Subject: Re: [PATCH 07/15] powerpc/powerpc: Add new PCIe functions for allocating cxl interrupts
Date: Mon, 22 Sep 2014 15:01:34 +1000	[thread overview]
Message-ID: <1411362094.984.15.camel@ale.ozlabs.ibm.com> (raw)
In-Reply-To: <20140919070939.GB27190@shangw>

<snip>
> >+struct device_node *pnv_pci_to_phb_node(struct pci_dev *dev)
> >+{
> >+	struct device_node *np;
> >+	struct property *prop =3D NULL;
> >+
> >+	np =3D of_node_get(pci_device_to_OF_node(dev));
> >+
> >+	/* Scan up the tree looking for the PHB node */
> >+	while (np) {
> >+		if ((prop =3D of_find_property(np, "ibm,opal-phbid", NULL)))
> >+			break;
> >+		np =3D of_get_next_parent(np);
> >+	}
> >+
> >+	if (!prop) {
> >+		of_node_put(np);
> >+		return NULL;
> >+	}
> >+
> >+	return np;
> >+}
> >+EXPORT_SYMBOL(pnv_pci_to_phb_node);
>=20
> Nitpick: I'm not sure it's better way. "struct pci_controller::dn" should
> always have valid "ibm,opal-phbid", so I guess the code could be like thi=
s
> way:
>=20
> 	struct pci_controller *hose =3D pci_bus_to_host(dev->bus);
>=20
> 	return hose->dn;

Nice.. that makes it much simpler.  I'll update.

<snip>
> >+
> >+#ifdef CONFIG_CXL_BASE
> >+int pnv_phb_to_cxl(struct pci_dev *dev)
> >+{
> >+	struct device_node *np;
> >+	struct pnv_ioda_pe *pe;
> >+	const u64 *prop64;
> >+	u64 phb_id;
> >+	int rc;
> >+
> >+	dev_info(&dev->dev, "switch PHB to CXL\n");
> >+
> >+	if (!(np =3D pnv_pci_to_phb_node(dev)))
> >+		return -ENODEV;
> >+
> >+	prop64 =3D of_get_property(np, "ibm,opal-phbid", NULL);
> >+
> >+	phb_id =3D be64_to_cpup(prop64);
> >+	dev_info(&dev->dev, "PHB-ID  : 0x%016llx\n", phb_id);
> >+
>=20
> The PHB ID would have been there: struct pnv_phb::opal_id. So
> I guess we needn't grab it from device-tree again :)

Nice, I'll update.

> >+	if (!(pe =3D pnv_ioda_get_pe(dev))) {
> >+		rc =3D -ENODEV;
> >+		goto out;
> >+	}
> >+	dev_info(&dev->dev, "     pe : %i\n", pe->pe_number);
>=20
> Perhaps you can reuse pe_info() here.

Yep, will do.

<snip>
> >+#ifdef CONFIG_CXL_BASE
> >+int pnv_cxl_ioda_msi_setup(struct pci_dev *dev, unsigned int hwirq,
> >+			   unsigned int virq)
> >+{
> >+	struct pci_controller *hose =3D pci_bus_to_host(dev->bus);
> >+	struct pnv_phb *phb =3D hose->private_data;
> >+	unsigned int xive_num =3D hwirq - phb->msi_base;
> >+	struct pnv_ioda_pe *pe;
> >+	int rc;
> >+
> >+	if (!(pe =3D pnv_ioda_get_pe(dev)))
> >+		return -ENODEV;
> >+
> >+	/* Assign XIVE to PE */
> >+	rc =3D opal_pci_set_xive_pe(phb->opal_id, pe->pe_number, xive_num);
> >+	if (rc) {
> >+		pr_warn("%s: OPAL error %d setting msi_base 0x%x hwirq 0x%x XIVE 0x%x=
 PE\n",
> >+			pci_name(dev), rc, phb->msi_base, hwirq, xive_num);
> >+		return -EIO;
> >+	}
>=20
> It seems current firmware doesn't support the OPAL API for PHB3.

The current public version of skiboot seems to be doing something here
in hw/phb3.c in phb3_set_ive_pe():

https://github.com/open-power/skiboot/blob/c34c4ef8c660e3e439365c8f5c06143f=
f00bc6bc/hw/phb3.c#L1096

I think we still need this.

Thanks again!
Mikey

  reply	other threads:[~2014-09-22  5:01 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-18  8:26 [PATCH 0/15] POWER8 Coherent Accelerator device driver Michael Neuling
2014-09-18  8:26 ` [PATCH 01/15] powerpc/cell: Move spu_handle_mm_fault() out of cell platform Michael Neuling
2014-09-18 10:00   ` Jeremy Kerr
2014-09-18 23:26     ` Michael Neuling
2014-09-26  3:57   ` Anton Blanchard
2014-09-18  8:26 ` [PATCH 02/15] powerpc/cell: Move data segment faulting code " Michael Neuling
2014-09-18 10:27   ` Jeremy Kerr
2014-09-18 23:45     ` Michael Neuling
2014-09-26  4:05   ` Anton Blanchard
2014-09-26 11:19     ` Michael Neuling
2014-09-29  8:30   ` Aneesh Kumar K.V
2014-09-30  4:40     ` Michael Neuling
2014-09-18  8:26 ` [PATCH 03/15] powerpc/msi: Improve IRQ bitmap allocator Michael Neuling
2014-09-19 20:16   ` Scott Wood
2014-09-19 20:19     ` Scott Wood
2014-09-22  8:26       ` Laurentiu Tudor
2014-09-22 23:50         ` Scott Wood
2014-09-22  8:25     ` Laurentiu Tudor
2014-09-22  8:29   ` Laurentiu Tudor
2014-09-22 22:59     ` Michael Neuling
2014-09-18  8:26 ` [PATCH 04/15] powerpc/mm: Export mmu_kernel_ssize and mmu_linear_psize Michael Neuling
2014-09-18  8:26 ` [PATCH 05/15] powerpc/powernv: Split out set MSI IRQ chip code Michael Neuling
2014-09-19  6:54   ` Gavin Shan
2014-09-22  4:31     ` Michael Neuling
2014-09-18  8:26 ` [PATCH 06/15] cxl: Add new header for call backs and structs Michael Neuling
2014-09-18  8:26 ` [PATCH 07/15] powerpc/powerpc: Add new PCIe functions for allocating cxl interrupts Michael Neuling
2014-09-19  7:09   ` Gavin Shan
2014-09-22  5:01     ` Michael Neuling [this message]
2014-09-18  8:26 ` [PATCH 08/15] powerpc/mm: Add new hash_page_mm() Michael Neuling
2014-09-29  8:50   ` Aneesh Kumar K.V
     [not found]     ` <1412054407.1733.77.camel@ale.ozlabs.ibm.com>
2014-09-30  6:13       ` Michael Neuling
2014-09-18  8:26 ` [PATCH 09/15] powerpc/opal: Add PHB to cxl mode call Michael Neuling
2014-09-26  4:35   ` Anton Blanchard
2014-09-18  8:26 ` [PATCH 10/15] powerpc/mm: Add hooks for cxl Michael Neuling
2014-09-26  4:33   ` Anton Blanchard
2014-09-26 11:33     ` Michael Neuling
2014-09-26 13:24       ` Anton Blanchard
2014-09-29  9:10   ` Aneesh Kumar K.V
2014-09-18  8:26 ` [PATCH 11/15] cxl: Add base builtin support Michael Neuling
2014-09-18  8:26 ` [PATCH 12/15] cxl: Driver code for powernv PCIe based cards for userspace access Michael Neuling
2014-09-18  8:26 ` [PATCH 13/15] cxl: Userspace header file Michael Neuling
2014-09-18  8:26 ` [PATCH 14/15] cxl: Add driver to Kbuild and Makefiles Michael Neuling
2014-09-18  8:27 ` [PATCH 15/15] cxl: Add documentation for userspace APIs Michael Neuling

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