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From: Michael Neuling <mikey@neuling.org>
To: Michael Ellerman <mpe@ellerman.id.au>
Cc: cbe-oss-dev@lists.ozlabs.org, arnd@arndb.de,
	"Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>,
	greg@kroah.com, linux-kernel@vger.kernel.org, imunsie@au.ibm.com,
	linuxppc-dev@ozlabs.org, anton@samba.org, jk@ozlabs.org
Subject: Re: [PATCH v2 02/17] powerpc/cell: Move data segment faulting code out of cell platform
Date: Thu, 02 Oct 2014 10:42:51 +1000	[thread overview]
Message-ID: <1412210571.19209.80.camel@ale.ozlabs.ibm.com> (raw)
In-Reply-To: <20141001064757.BFF88140174@ozlabs.org>

On Wed, 2014-10-01 at 16:47 +1000, Michael Ellerman wrote:
> On Tue, 2014-30-09 at 10:34:51 UTC, Michael Neuling wrote:
> > From: Ian Munsie <imunsie@au1.ibm.com>
> >=20
> > __spu_trap_data_seg() currently contains code to determine the VSID and=
 ESID
> > required for a particular EA and mm struct.
> >=20
> > This code is generically useful for other co-processors.  This moves th=
e code
> > of the cell platform so it can be used by other powerpc code.  It also =
adds 1TB
> > segment handling which Cell didn't have.
>=20
> I'm not loving this.
>=20
> For starters the name "copro_data_segment()" doesn't contain any verbs, a=
nd it
> doesn't tell me what it does.

Ok.

> If we give it a name that says what it does, we get copro_get_ea_esid_and=
_vsid().
> Or something equally ugly.

Ok

> And then in patch 10 you move the bulk of the logic into calculate_vsid()=
.

That was intentional on my part.  I want this patch to be clear that
we're moving this code out of cell.  Then I wanted the optimisations to
be in a separate patch.  It does mean we touch the code twice in this
series, but I was hoping it would make it easier to review.  Alas. :-)

> So instead can we:
>  - add a small helper that does the esid calculation, eg. calculate_esid(=
) ?
>  - factor out the vsid logic into a helper, calculate_vsid() ?
>  - rework the spu code to use those, dropping __spu_trap_data_seg()
>  - use the helpers in the cxl code

OK, I think I can do that.  I might change the name to something better
in this patch, but I'll leave these cleanups to the later patch 10.

Mikey

  parent reply	other threads:[~2014-10-02  0:42 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-30 10:34 [PATCH v2 0/17] POWER8 Coherent Accelerator device driver Michael Neuling
2014-09-30 10:34 ` [PATCH v2 01/17] powerpc/cell: Move spu_handle_mm_fault() out of cell platform Michael Neuling
2014-09-30 10:34 ` [PATCH v2 02/17] powerpc/cell: Move data segment faulting code " Michael Neuling
2014-10-01  6:47   ` Michael Ellerman
2014-10-01  6:51     ` Benjamin Herrenschmidt
2014-10-02  0:42     ` Michael Neuling [this message]
2014-10-01  9:45   ` Aneesh Kumar K.V
2014-10-01 11:10     ` Michael Neuling
2014-10-01  9:53   ` Aneesh Kumar K.V
2014-10-02  0:58     ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 03/17] powerpc/cell: Make spu_flush_all_slbs() generic Michael Neuling
2014-09-30 10:40   ` Arnd Bergmann
2014-10-01  7:13   ` Michael Ellerman
2014-10-01 10:51     ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 04/17] powerpc/msi: Improve IRQ bitmap allocator Michael Neuling
2014-10-01  7:13   ` Michael Ellerman
2014-10-02  2:01     ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 05/17] powerpc/mm: Export mmu_kernel_ssize and mmu_linear_psize Michael Neuling
2014-10-01  7:13   ` Michael Ellerman
2014-10-02  3:13     ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 06/17] powerpc/powernv: Split out set MSI IRQ chip code Michael Neuling
2014-10-02  1:57   ` Michael Ellerman
2014-10-02  5:22     ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 07/17] cxl: Add new header for call backs and structs Michael Neuling
2014-10-01 12:00   ` Michael Ellerman
2014-10-02  3:37     ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 08/17] powerpc/powerpc: Add new PCIe functions for allocating cxl interrupts Michael Neuling
2014-10-02  3:16   ` Michael Ellerman
2014-10-02  6:09     ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 09/17] powerpc/mm: Add new hash_page_mm() Michael Neuling
2014-10-01  9:43   ` Aneesh Kumar K.V
2014-10-02  7:10     ` Michael Neuling
2014-10-02  3:48   ` Michael Ellerman
2014-10-02  7:39     ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 10/17] powerpc/mm: Merge vsid calculation in hash_page() and copro_data_segment() Michael Neuling
2014-10-01  9:55   ` Aneesh Kumar K.V
2014-10-02  6:44     ` Michael Neuling
2014-09-30 10:35 ` [PATCH v2 11/17] powerpc/opal: Add PHB to cxl mode call Michael Neuling
2014-09-30 10:35 ` [PATCH v2 12/17] powerpc/mm: Add hooks for cxl Michael Neuling
2014-09-30 10:35 ` [PATCH v2 13/17] cxl: Add base builtin support Michael Neuling
2014-10-01 12:00   ` Michael Ellerman
2014-10-02  3:43     ` Michael Neuling
2014-09-30 10:35 ` [PATCH v2 14/17] cxl: Driver code for powernv PCIe based cards for userspace access Michael Neuling
2014-10-02  7:02   ` Michael Ellerman
2014-09-30 10:35 ` [PATCH v2 15/17] cxl: Userspace header file Michael Neuling
2014-10-02  6:02   ` Michael Ellerman
2014-10-02 10:28     ` Ian Munsie
2014-10-02 12:42       ` Benjamin Herrenschmidt
2014-09-30 10:35 ` [PATCH v2 16/17] cxl: Add driver to Kbuild and Makefiles Michael Neuling
2014-09-30 10:35 ` [PATCH v2 17/17] cxl: Add documentation for userspace APIs Michael Neuling

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