From: Michael Neuling <mikey@neuling.org>
To: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
Cc: cbe-oss-dev@lists.ozlabs.org, arnd@arndb.de, greg@kroah.com,
linux-kernel@vger.kernel.org, linuxppc-dev@ozlabs.org,
anton@samba.org, imunsie@au1.ibm.com, jk@ozlabs.org
Subject: Re: [PATCH v2 10/17] powerpc/mm: Merge vsid calculation in hash_page() and copro_data_segment()
Date: Thu, 02 Oct 2014 16:44:57 +1000 [thread overview]
Message-ID: <1412232297.6143.18.camel@ale.ozlabs.ibm.com> (raw)
In-Reply-To: <87wq8km7w0.fsf@linux.vnet.ibm.com>
On Wed, 2014-10-01 at 15:25 +0530, Aneesh Kumar K.V wrote:
> Michael Neuling <mikey@neuling.org> writes:
>=20
> > From: Ian Munsie <imunsie@au1.ibm.com>
> >
> > The vsid calculation between hash_page() and copro_data_segment() are v=
ery
> > similar. This merges these two different versions.
> >
> > Signed-off-by: Ian Munsie <imunsie@au1.ibm.com>
> > Signed-off-by: Michael Neuling <mikey@neuling.org>
> > ---
> > arch/powerpc/include/asm/mmu-hash64.h | 2 ++
> > arch/powerpc/mm/copro_fault.c | 45 ++++++--------------------
> > arch/powerpc/mm/hash_utils_64.c | 61 ++++++++++++++++++++++-----=
--------
> > 3 files changed, 50 insertions(+), 58 deletions(-)
> >
> > diff --git a/arch/powerpc/include/asm/mmu-hash64.h b/arch/powerpc/inclu=
de/asm/mmu-hash64.h
> > index f84e5a5..bf43fb0 100644
> > --- a/arch/powerpc/include/asm/mmu-hash64.h
> > +++ b/arch/powerpc/include/asm/mmu-hash64.h
> > @@ -322,6 +322,8 @@ extern int __hash_page_64K(unsigned long ea, unsign=
ed long access,
> > unsigned int local, int ssize);
> > struct mm_struct;
> > unsigned int hash_page_do_lazy_icache(unsigned int pp, pte_t pte, int =
trap);
> > +int calculate_vsid(struct mm_struct *mm, u64 ea,
> > + u64 *vsid, int *psize, int *ssize);
> > extern int hash_page_mm(struct mm_struct *mm, unsigned long ea, unsign=
ed long access, unsigned long trap);
> > extern int hash_page(unsigned long ea, unsigned long access, unsigned =
long trap);
> > int __hash_page_huge(unsigned long ea, unsigned long access, unsigned =
long vsid,
> > diff --git a/arch/powerpc/mm/copro_fault.c b/arch/powerpc/mm/copro_faul=
t.c
> > index 939abdf..ba8bf8e 100644
> > --- a/arch/powerpc/mm/copro_fault.c
> > +++ b/arch/powerpc/mm/copro_fault.c
> > @@ -94,45 +94,18 @@ EXPORT_SYMBOL_GPL(copro_handle_mm_fault);
> > =20
> > int copro_data_segment(struct mm_struct *mm, u64 ea, u64 *esid, u64 *v=
sid)
> > {
> > - int psize, ssize;
> > + int psize, ssize, rc;
> > =20
> > *esid =3D (ea & ESID_MASK) | SLB_ESID_V;
> > =20
> > - switch (REGION_ID(ea)) {
> > - case USER_REGION_ID:
> > - pr_devel("copro_data_segment: 0x%llx -- USER_REGION_ID\n", ea);
> > -#ifdef CONFIG_PPC_MM_SLICES
> > - psize =3D get_slice_psize(mm, ea);
> > -#else
> > - psize =3D mm->context.user_psize;
> > -#endif
> > - ssize =3D user_segment_size(ea);
> > - *vsid =3D (get_vsid(mm->context.id, ea, ssize)
> > - << slb_vsid_shift(ssize)) | SLB_VSID_USER;
> > - break;
> > - case VMALLOC_REGION_ID:
> > - pr_devel("copro_data_segment: 0x%llx -- VMALLOC_REGION_ID\n", ea);
> > - if (ea < VMALLOC_END)
> > - psize =3D mmu_vmalloc_psize;
> > - else
> > - psize =3D mmu_io_psize;
> > - ssize =3D mmu_kernel_ssize;
> > - *vsid =3D (get_kernel_vsid(ea, mmu_kernel_ssize)
> > - << SLB_VSID_SHIFT) | SLB_VSID_KERNEL;
> > - break;
> > - case KERNEL_REGION_ID:
> > - pr_devel("copro_data_segment: 0x%llx -- KERNEL_REGION_ID\n", ea);
> > - psize =3D mmu_linear_psize;
> > - ssize =3D mmu_kernel_ssize;
> > - *vsid =3D (get_kernel_vsid(ea, mmu_kernel_ssize)
> > - << SLB_VSID_SHIFT) | SLB_VSID_KERNEL;
> > - break;
> > - default:
> > - /* Future: support kernel segments so that drivers can use the
> > - * CoProcessors */
> > - pr_debug("invalid region access at %016llx\n", ea);
> > - return 1;
> > - }
> > + rc =3D calculate_vsid(mm, ea, vsid, &psize, &ssize);
> > + if (rc)
> > + return rc;
> > + if (REGION_ID(ea) =3D=3D USER_REGION_ID)
> > + *vsid =3D (*vsid << slb_vsid_shift(ssize)) | SLB_VSID_USER;
> > + else
> > + *vsid =3D (*vsid << SLB_VSID_SHIFT) | SLB_VSID_KERNEL;
> > +
> > *vsid |=3D mmu_psize_defs[psize].sllp |
> > ((ssize =3D=3D MMU_SEGSIZE_1T) ? SLB_VSID_B_1T : 0);
> > =20
> > diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_uti=
ls_64.c
> > index 0a5c8c0..3fa81ca 100644
> > --- a/arch/powerpc/mm/hash_utils_64.c
> > +++ b/arch/powerpc/mm/hash_utils_64.c
> > @@ -983,6 +983,38 @@ static void check_paca_psize(unsigned long ea, str=
uct mm_struct *mm,
> > }
> > }
> > =20
> > +int calculate_vsid(struct mm_struct *mm, u64 ea,
> > + u64 *vsid, int *psize, int *ssize)
> > +{
> > + switch (REGION_ID(ea)) {
> > + case USER_REGION_ID:
> > + pr_devel("%s: 0x%llx -- USER_REGION_ID\n", __func__, ea);
> > + *psize =3D get_slice_psize(mm, ea);
> > + *ssize =3D user_segment_size(ea);
> > + *vsid =3D get_vsid(mm->context.id, ea, *ssize);
> > + return 0;
> > + case VMALLOC_REGION_ID:
> > + pr_devel("%s: 0x%llx -- VMALLOC_REGION_ID\n", __func__, ea);
> > + if (ea < VMALLOC_END)
> > + *psize =3D mmu_vmalloc_psize;
> > + else
> > + *psize =3D mmu_io_psize;
> > + *ssize =3D mmu_kernel_ssize;
> > + *vsid =3D get_kernel_vsid(ea, mmu_kernel_ssize);
> > + return 0;
> > + case KERNEL_REGION_ID:
> > + pr_devel("%s: 0x%llx -- KERNEL_REGION_ID\n", __func__, ea);
> > + *psize =3D mmu_linear_psize;
> > + *ssize =3D mmu_kernel_ssize;
> > + *vsid =3D get_kernel_vsid(ea, mmu_kernel_ssize);
> > + return 0;
> > + default:
> > + pr_debug("%s: invalid region access at %016llx\n", __func__, ea);
> > + return 1;
> > + }
> > +}
> > +EXPORT_SYMBOL_GPL(calculate_vsid);
> > +
> > /* Result code is:
> > * 0 - handled
> > * 1 - normal page fault
> > @@ -993,7 +1025,7 @@ int hash_page_mm(struct mm_struct *mm, unsigned lo=
ng ea, unsigned long access, u
> > {
> > enum ctx_state prev_state =3D exception_enter();
> > pgd_t *pgdir;
> > - unsigned long vsid;
> > + u64 vsid;
> > pte_t *ptep;
> > unsigned hugeshift;
> > const struct cpumask *tmp;
> > @@ -1003,35 +1035,20 @@ int hash_page_mm(struct mm_struct *mm, unsigned=
long ea, unsigned long access, u
> > DBG_LOW("%s(ea=3D%016lx, access=3D%lx, trap=3D%lx\n",
> > __func__, ea, access, trap);
> > =20
> > - /* Get region & vsid */
> > - switch (REGION_ID(ea)) {
> > - case USER_REGION_ID:
> > + /* Get region */
> > + if (REGION_ID(ea) =3D=3D USER_REGION_ID) {
> > user_region =3D 1;
> > if (! mm) {
> > DBG_LOW(" user region with no mm !\n");
> > rc =3D 1;
> > goto bail;
> > }
> > - psize =3D get_slice_psize(mm, ea);
> > - ssize =3D user_segment_size(ea);
> > - vsid =3D get_vsid(mm->context.id, ea, ssize);
> > - break;
> > - case VMALLOC_REGION_ID:
> > + } else
> > mm =3D &init_mm;
> > - vsid =3D get_kernel_vsid(ea, mmu_kernel_ssize);
> > - if (ea < VMALLOC_END)
> > - psize =3D mmu_vmalloc_psize;
> > - else
> > - psize =3D mmu_io_psize;
> > - ssize =3D mmu_kernel_ssize;
> > - break;
> > - default:
> > - /* Not a valid range
> > - * Send the problem up to do_page_fault=20
> > - */
> > - rc =3D 1;
>=20
>=20
> That part is different now. We now handle kernel_region_id in case of
> hash_page. Earlier we used consider it a problem.=20
Yeah, that's going to be the kernel linear mapping. We should probably
continue to barf as we shouldn't fault on that. Thanks.
I'll fix.
Mikey
>=20
> > + rc =3D calculate_vsid(mm, ea, &vsid, &psize, &ssize);
> > + if (rc)
> > goto bail;
> > - }
> > +
> > DBG_LOW(" mm=3D%p, mm->pgdir=3D%p, vsid=3D%016lx\n", mm, mm->pgd, vsi=
d);
> > =20
> > /* Bad address. */
> > --=20
> > 1.9.1
> >
> > --
> > To unsubscribe from this list: send the line "unsubscribe linux-kernel"=
in
> > the body of a message to majordomo@vger.kernel.org
> > More majordomo info at http://vger.kernel.org/majordomo-info.html
> > Please read the FAQ at http://www.tux.org/lkml/
>=20
next prev parent reply other threads:[~2014-10-02 6:44 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-30 10:34 [PATCH v2 0/17] POWER8 Coherent Accelerator device driver Michael Neuling
2014-09-30 10:34 ` [PATCH v2 01/17] powerpc/cell: Move spu_handle_mm_fault() out of cell platform Michael Neuling
2014-09-30 10:34 ` [PATCH v2 02/17] powerpc/cell: Move data segment faulting code " Michael Neuling
2014-10-01 6:47 ` Michael Ellerman
2014-10-01 6:51 ` Benjamin Herrenschmidt
2014-10-02 0:42 ` Michael Neuling
2014-10-01 9:45 ` Aneesh Kumar K.V
2014-10-01 11:10 ` Michael Neuling
2014-10-01 9:53 ` Aneesh Kumar K.V
2014-10-02 0:58 ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 03/17] powerpc/cell: Make spu_flush_all_slbs() generic Michael Neuling
2014-09-30 10:40 ` Arnd Bergmann
2014-10-01 7:13 ` Michael Ellerman
2014-10-01 10:51 ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 04/17] powerpc/msi: Improve IRQ bitmap allocator Michael Neuling
2014-10-01 7:13 ` Michael Ellerman
2014-10-02 2:01 ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 05/17] powerpc/mm: Export mmu_kernel_ssize and mmu_linear_psize Michael Neuling
2014-10-01 7:13 ` Michael Ellerman
2014-10-02 3:13 ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 06/17] powerpc/powernv: Split out set MSI IRQ chip code Michael Neuling
2014-10-02 1:57 ` Michael Ellerman
2014-10-02 5:22 ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 07/17] cxl: Add new header for call backs and structs Michael Neuling
2014-10-01 12:00 ` Michael Ellerman
2014-10-02 3:37 ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 08/17] powerpc/powerpc: Add new PCIe functions for allocating cxl interrupts Michael Neuling
2014-10-02 3:16 ` Michael Ellerman
2014-10-02 6:09 ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 09/17] powerpc/mm: Add new hash_page_mm() Michael Neuling
2014-10-01 9:43 ` Aneesh Kumar K.V
2014-10-02 7:10 ` Michael Neuling
2014-10-02 3:48 ` Michael Ellerman
2014-10-02 7:39 ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 10/17] powerpc/mm: Merge vsid calculation in hash_page() and copro_data_segment() Michael Neuling
2014-10-01 9:55 ` Aneesh Kumar K.V
2014-10-02 6:44 ` Michael Neuling [this message]
2014-09-30 10:35 ` [PATCH v2 11/17] powerpc/opal: Add PHB to cxl mode call Michael Neuling
2014-09-30 10:35 ` [PATCH v2 12/17] powerpc/mm: Add hooks for cxl Michael Neuling
2014-09-30 10:35 ` [PATCH v2 13/17] cxl: Add base builtin support Michael Neuling
2014-10-01 12:00 ` Michael Ellerman
2014-10-02 3:43 ` Michael Neuling
2014-09-30 10:35 ` [PATCH v2 14/17] cxl: Driver code for powernv PCIe based cards for userspace access Michael Neuling
2014-10-02 7:02 ` Michael Ellerman
2014-09-30 10:35 ` [PATCH v2 15/17] cxl: Userspace header file Michael Neuling
2014-10-02 6:02 ` Michael Ellerman
2014-10-02 10:28 ` Ian Munsie
2014-10-02 12:42 ` Benjamin Herrenschmidt
2014-09-30 10:35 ` [PATCH v2 16/17] cxl: Add driver to Kbuild and Makefiles Michael Neuling
2014-09-30 10:35 ` [PATCH v2 17/17] cxl: Add documentation for userspace APIs Michael Neuling
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