From: Michael Neuling <mikey@neuling.org>
To: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
Cc: cbe-oss-dev@lists.ozlabs.org, arnd@arndb.de, greg@kroah.com,
linux-kernel@vger.kernel.org, linuxppc-dev@ozlabs.org,
anton@samba.org, imunsie@au1.ibm.com, jk@ozlabs.org
Subject: Re: [PATCH v2 09/17] powerpc/mm: Add new hash_page_mm()
Date: Thu, 02 Oct 2014 17:10:04 +1000 [thread overview]
Message-ID: <1412233804.6143.24.camel@ale.ozlabs.ibm.com> (raw)
In-Reply-To: <8761g4nn12.fsf@linux.vnet.ibm.com>
On Wed, 2014-10-01 at 15:13 +0530, Aneesh Kumar K.V wrote:
> Michael Neuling <mikey@neuling.org> writes:
>=20
> > From: Ian Munsie <imunsie@au1.ibm.com>
> >
> > This adds a new function hash_page_mm() based on the existing hash_page=
().
> > This version allows any struct mm to be passed in, rather than assuming
> > current. This is useful for servicing co-processor faults which are no=
t in the
> > context of the current running process.
> >
> > We need to be careful here as the current hash_page() assumes current i=
n a few
> > places.
>=20
> It would be nice to document the rules here. So when we try to add a hash
> page entry, and if that result in demotion of the segment are we suppose =
to
> flush slbs ?=20
Yeah, we found it sucky to understand. The current documentation is
"buy benh a beer and ask him" which doesn't scale very well unless
you're benh and you like beer.
> Also why would one want to hash anything other
> than current->mm ? How will this get called ?=20
We are calling this on behalf of a co-processor (eg cxl). The mm this
is currently associated with may not be running on a cpu. =20
> May be they are explained in later patches. But can we also explain it
> here.=20
Ok, I'll add something (mpe had the same question).
Mikey
>=20
> >
> > Signed-off-by: Ian Munsie <imunsie@au1.ibm.com>
> > Signed-off-by: Michael Neuling <mikey@neuling.org>
> > ---
> > arch/powerpc/include/asm/mmu-hash64.h | 1 +
> > arch/powerpc/mm/hash_utils_64.c | 22 ++++++++++++++--------
> > 2 files changed, 15 insertions(+), 8 deletions(-)
> >
> > diff --git a/arch/powerpc/include/asm/mmu-hash64.h b/arch/powerpc/inclu=
de/asm/mmu-hash64.h
> > index 6d0b7a2..f84e5a5 100644
> > --- a/arch/powerpc/include/asm/mmu-hash64.h
> > +++ b/arch/powerpc/include/asm/mmu-hash64.h
> > @@ -322,6 +322,7 @@ extern int __hash_page_64K(unsigned long ea, unsign=
ed long access,
> > unsigned int local, int ssize);
> > struct mm_struct;
> > unsigned int hash_page_do_lazy_icache(unsigned int pp, pte_t pte, int =
trap);
> > +extern int hash_page_mm(struct mm_struct *mm, unsigned long ea, unsign=
ed long access, unsigned long trap);
> > extern int hash_page(unsigned long ea, unsigned long access, unsigned =
long trap);
> > int __hash_page_huge(unsigned long ea, unsigned long access, unsigned =
long vsid,
> > pte_t *ptep, unsigned long trap, int local, int ssize,
> > diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_uti=
ls_64.c
> > index bbdb054..0a5c8c0 100644
> > --- a/arch/powerpc/mm/hash_utils_64.c
> > +++ b/arch/powerpc/mm/hash_utils_64.c
> > @@ -904,7 +904,7 @@ void demote_segment_4k(struct mm_struct *mm, unsign=
ed long addr)
> > return;
> > slice_set_range_psize(mm, addr, 1, MMU_PAGE_4K);
> > copro_flush_all_slbs(mm);
> > - if (get_paca_psize(addr) !=3D MMU_PAGE_4K) {
> > + if ((get_paca_psize(addr) !=3D MMU_PAGE_4K) && (current->mm =3D=3D mm=
)) {
> > get_paca()->context =3D mm->context;
> > slb_flush_and_rebolt();
> > }
> > @@ -989,26 +989,24 @@ static void check_paca_psize(unsigned long ea, st=
ruct mm_struct *mm,
> > * -1 - critical hash insertion error
> > * -2 - access not permitted by subpage protection mechanism
> > */
> > -int hash_page(unsigned long ea, unsigned long access, unsigned long tr=
ap)
> > +int hash_page_mm(struct mm_struct *mm, unsigned long ea, unsigned long=
access, unsigned long trap)
> > {
> > enum ctx_state prev_state =3D exception_enter();
> > pgd_t *pgdir;
> > unsigned long vsid;
> > - struct mm_struct *mm;
> > pte_t *ptep;
> > unsigned hugeshift;
> > const struct cpumask *tmp;
> > int rc, user_region =3D 0, local =3D 0;
> > int psize, ssize;
> > =20
> > - DBG_LOW("hash_page(ea=3D%016lx, access=3D%lx, trap=3D%lx\n",
> > - ea, access, trap);
> > + DBG_LOW("%s(ea=3D%016lx, access=3D%lx, trap=3D%lx\n",
> > + __func__, ea, access, trap);
> > =20
> > /* Get region & vsid */
> > switch (REGION_ID(ea)) {
> > case USER_REGION_ID:
> > user_region =3D 1;
> > - mm =3D current->mm;
> > if (! mm) {
> > DBG_LOW(" user region with no mm !\n");
> > rc =3D 1;
> > @@ -1104,7 +1102,8 @@ int hash_page(unsigned long ea, unsigned long acc=
ess, unsigned long trap)
> > WARN_ON(1);
> > }
> > #endif
> > - check_paca_psize(ea, mm, psize, user_region);
> > + if (current->mm =3D=3D mm)
> > + check_paca_psize(ea, mm, psize, user_region);
> > =20
> > goto bail;
> > }
> > @@ -1145,7 +1144,8 @@ int hash_page(unsigned long ea, unsigned long acc=
ess, unsigned long trap)
> > }
> > }
> > =20
> > - check_paca_psize(ea, mm, psize, user_region);
> > + if (current->mm =3D=3D mm)
> > + check_paca_psize(ea, mm, psize, user_region);
> > #endif /* CONFIG_PPC_64K_PAGES */
> > =20
> > #ifdef CONFIG_PPC_HAS_HASH_64K
> > @@ -1180,6 +1180,12 @@ bail:
> > exception_exit(prev_state);
> > return rc;
> > }
> > +EXPORT_SYMBOL_GPL(hash_page_mm);
> > +
> > +int hash_page(unsigned long ea, unsigned long access, unsigned long tr=
ap)
> > +{
> > + return hash_page_mm(current->mm, ea, access, trap);
> > +}
> > EXPORT_SYMBOL_GPL(hash_page);
> > =20
> > void hash_preload(struct mm_struct *mm, unsigned long ea,
> > --=20
> > 1.9.1
> >
> > --
> > To unsubscribe from this list: send the line "unsubscribe linux-kernel"=
in
> > the body of a message to majordomo@vger.kernel.org
> > More majordomo info at http://vger.kernel.org/majordomo-info.html
> > Please read the FAQ at http://www.tux.org/lkml/
>=20
next prev parent reply other threads:[~2014-10-02 7:10 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-30 10:34 [PATCH v2 0/17] POWER8 Coherent Accelerator device driver Michael Neuling
2014-09-30 10:34 ` [PATCH v2 01/17] powerpc/cell: Move spu_handle_mm_fault() out of cell platform Michael Neuling
2014-09-30 10:34 ` [PATCH v2 02/17] powerpc/cell: Move data segment faulting code " Michael Neuling
2014-10-01 6:47 ` Michael Ellerman
2014-10-01 6:51 ` Benjamin Herrenschmidt
2014-10-02 0:42 ` Michael Neuling
2014-10-01 9:45 ` Aneesh Kumar K.V
2014-10-01 11:10 ` Michael Neuling
2014-10-01 9:53 ` Aneesh Kumar K.V
2014-10-02 0:58 ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 03/17] powerpc/cell: Make spu_flush_all_slbs() generic Michael Neuling
2014-09-30 10:40 ` Arnd Bergmann
2014-10-01 7:13 ` Michael Ellerman
2014-10-01 10:51 ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 04/17] powerpc/msi: Improve IRQ bitmap allocator Michael Neuling
2014-10-01 7:13 ` Michael Ellerman
2014-10-02 2:01 ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 05/17] powerpc/mm: Export mmu_kernel_ssize and mmu_linear_psize Michael Neuling
2014-10-01 7:13 ` Michael Ellerman
2014-10-02 3:13 ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 06/17] powerpc/powernv: Split out set MSI IRQ chip code Michael Neuling
2014-10-02 1:57 ` Michael Ellerman
2014-10-02 5:22 ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 07/17] cxl: Add new header for call backs and structs Michael Neuling
2014-10-01 12:00 ` Michael Ellerman
2014-10-02 3:37 ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 08/17] powerpc/powerpc: Add new PCIe functions for allocating cxl interrupts Michael Neuling
2014-10-02 3:16 ` Michael Ellerman
2014-10-02 6:09 ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 09/17] powerpc/mm: Add new hash_page_mm() Michael Neuling
2014-10-01 9:43 ` Aneesh Kumar K.V
2014-10-02 7:10 ` Michael Neuling [this message]
2014-10-02 3:48 ` Michael Ellerman
2014-10-02 7:39 ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 10/17] powerpc/mm: Merge vsid calculation in hash_page() and copro_data_segment() Michael Neuling
2014-10-01 9:55 ` Aneesh Kumar K.V
2014-10-02 6:44 ` Michael Neuling
2014-09-30 10:35 ` [PATCH v2 11/17] powerpc/opal: Add PHB to cxl mode call Michael Neuling
2014-09-30 10:35 ` [PATCH v2 12/17] powerpc/mm: Add hooks for cxl Michael Neuling
2014-09-30 10:35 ` [PATCH v2 13/17] cxl: Add base builtin support Michael Neuling
2014-10-01 12:00 ` Michael Ellerman
2014-10-02 3:43 ` Michael Neuling
2014-09-30 10:35 ` [PATCH v2 14/17] cxl: Driver code for powernv PCIe based cards for userspace access Michael Neuling
2014-10-02 7:02 ` Michael Ellerman
2014-09-30 10:35 ` [PATCH v2 15/17] cxl: Userspace header file Michael Neuling
2014-10-02 6:02 ` Michael Ellerman
2014-10-02 10:28 ` Ian Munsie
2014-10-02 12:42 ` Benjamin Herrenschmidt
2014-09-30 10:35 ` [PATCH v2 16/17] cxl: Add driver to Kbuild and Makefiles Michael Neuling
2014-09-30 10:35 ` [PATCH v2 17/17] cxl: Add documentation for userspace APIs Michael Neuling
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1412233804.6143.24.camel@ale.ozlabs.ibm.com \
--to=mikey@neuling.org \
--cc=aneesh.kumar@linux.vnet.ibm.com \
--cc=anton@samba.org \
--cc=arnd@arndb.de \
--cc=cbe-oss-dev@lists.ozlabs.org \
--cc=greg@kroah.com \
--cc=imunsie@au1.ibm.com \
--cc=jk@ozlabs.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linuxppc-dev@ozlabs.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).