From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Ian Munsie <imunsie@au1.ibm.com>
Cc: cbe-oss-dev <cbe-oss-dev@lists.ozlabs.org>,
Michael Neuling <mikey@neuling.org>, arnd <arnd@arndb.de>,
"Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>,
linux-kernel <linux-kernel@vger.kernel.org>,
linuxppc-dev <linuxppc-dev@ozlabs.org>, anton <anton@samba.org>,
greg <greg@kroah.com>, jk <jk@ozlabs.org>
Subject: Re: [PATCH v2 15/17] cxl: Userspace header file.
Date: Thu, 02 Oct 2014 22:42:02 +1000 [thread overview]
Message-ID: <1412253722.28143.17.camel@pasglop> (raw)
In-Reply-To: <1412243942-sup-5336@delenn.ozlabs.ibm.com>
On Thu, 2014-10-02 at 20:28 +1000, Ian Munsie wrote:
> Hey Michael,
>
> Excerpts from Michael Ellerman's message of 2014-10-02 16:02:37 +1000:
> > > +/* ioctls */
> > > +struct cxl_ioctl_start_work {
> > > + __u64 wed;
> > > + __u64 amr;
> > > + __u64 reserved1;
> > > + __u32 reserved2;
> > > + __s16 num_interrupts; /* -1 = use value from afu descriptor */
> > > + __u16 process_element; /* returned from kernel */
> > > + __u64 reserved3;
> > > + __u64 reserved4;
> > > + __u64 reserved5;
> > > + __u64 reserved6;
> >
> > Why so many reserved fields?
>
> The first two are reserved for the context save area (reserved1) and
> size (reserved2) of the "shared" (AKA time sliced) virtualisation model,
> which we don't yet support. That only leaves us with four reserved
> fields for anything that we haven't thought of or that the hardware team
> hasn't come up with yet ;-)
>
> > What mechanism is there that will allow you to ever unreserve them?
> >
> > ie. how does a new userspace detect that the kernel it's running on supports
> > new fields?
>
> The ioctl will return -EINVAL if any of them are set to non-zero values,
> so userspace can easily tell if it's running on an old kernel.
Not good enough in my experience. Throw in a flags field I'd say..
> > Or conversely how does a new kernel detect that userspace has passed it a
> > meaningful value in one of the previously reserved fields?
>
> They would have to be non-zero (certainly true of the context save
> area's size), or one could turn into a flags field or api version.
If you go that way you need to negociate as well latest compatible
etc...
> > > +#define CXL_MAGIC 0xCA
> > > +#define CXL_IOCTL_START_WORK _IOWR(CXL_MAGIC, 0x00, struct cxl_ioctl_start_work)
> >
> > What happened to 0x1 ?
>
> That was used to dynamically program the FPGA with a new AFU image, but
> we don't have anything to test it on yet and I'm not convinced that the
> procedure won't change by the time we do, so we pulled the code.
>
> We can repack the ioctl numbers easily enough... Will do :)
>
> > > +enum cxl_event_type {
> > > + CXL_EVENT_READ_FAIL = -1,
> >
> > I don't see this used?
>
> That was used in the userspace library to mark it's buffer as bad if the
> read() call failed for whatever reason... but you're right - it isn't
> used by the kernel and doesn't belong in this header. Will remove.
>
> > > +struct cxl_event_header {
> > > + __u32 type;
> > > + __u16 size;
> > > + __u16 process_element;
> > > + __u64 reserved1;
> > > + __u64 reserved2;
> > > + __u64 reserved3;
> > > +};
> >
> > Again lots of reserved fields?
>
> Figured it was better to have a bit more than we expect we might need
> just in case... We can reduce this if you feel it is excessive?
>
> In an earlier version of the code the kernel would fill out the header
> and not clear an event if a buffer was passed in that was too small, so
> userspace could realloc a larger buffer and try again. This made the API
> a bit more complex and our internal users weren't too keen on it, so we
> decided to use a fixed-size buffer and make it larger than we strictly
> needed so we have plenty of room for further expansion.
>
> > Rather than having the header included in every event, would it be clearer if
> > the cxl_event was:
> >
> > struct cxl_event {
> > struct cxl_event_header header;
> > union {
> > struct cxl_event_afu_interrupt irq;
> > struct cxl_event_data_storage fault;
> > struct cxl_event_afu_error afu_err;
> > };
> > };
>
> Sounds like a good idea to me :)
>
> Cheers,
> -Ian
next prev parent reply other threads:[~2014-10-02 12:42 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-30 10:34 [PATCH v2 0/17] POWER8 Coherent Accelerator device driver Michael Neuling
2014-09-30 10:34 ` [PATCH v2 01/17] powerpc/cell: Move spu_handle_mm_fault() out of cell platform Michael Neuling
2014-09-30 10:34 ` [PATCH v2 02/17] powerpc/cell: Move data segment faulting code " Michael Neuling
2014-10-01 6:47 ` Michael Ellerman
2014-10-01 6:51 ` Benjamin Herrenschmidt
2014-10-02 0:42 ` Michael Neuling
2014-10-01 9:45 ` Aneesh Kumar K.V
2014-10-01 11:10 ` Michael Neuling
2014-10-01 9:53 ` Aneesh Kumar K.V
2014-10-02 0:58 ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 03/17] powerpc/cell: Make spu_flush_all_slbs() generic Michael Neuling
2014-09-30 10:40 ` Arnd Bergmann
2014-10-01 7:13 ` Michael Ellerman
2014-10-01 10:51 ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 04/17] powerpc/msi: Improve IRQ bitmap allocator Michael Neuling
2014-10-01 7:13 ` Michael Ellerman
2014-10-02 2:01 ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 05/17] powerpc/mm: Export mmu_kernel_ssize and mmu_linear_psize Michael Neuling
2014-10-01 7:13 ` Michael Ellerman
2014-10-02 3:13 ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 06/17] powerpc/powernv: Split out set MSI IRQ chip code Michael Neuling
2014-10-02 1:57 ` Michael Ellerman
2014-10-02 5:22 ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 07/17] cxl: Add new header for call backs and structs Michael Neuling
2014-10-01 12:00 ` Michael Ellerman
2014-10-02 3:37 ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 08/17] powerpc/powerpc: Add new PCIe functions for allocating cxl interrupts Michael Neuling
2014-10-02 3:16 ` Michael Ellerman
2014-10-02 6:09 ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 09/17] powerpc/mm: Add new hash_page_mm() Michael Neuling
2014-10-01 9:43 ` Aneesh Kumar K.V
2014-10-02 7:10 ` Michael Neuling
2014-10-02 3:48 ` Michael Ellerman
2014-10-02 7:39 ` Michael Neuling
2014-09-30 10:34 ` [PATCH v2 10/17] powerpc/mm: Merge vsid calculation in hash_page() and copro_data_segment() Michael Neuling
2014-10-01 9:55 ` Aneesh Kumar K.V
2014-10-02 6:44 ` Michael Neuling
2014-09-30 10:35 ` [PATCH v2 11/17] powerpc/opal: Add PHB to cxl mode call Michael Neuling
2014-09-30 10:35 ` [PATCH v2 12/17] powerpc/mm: Add hooks for cxl Michael Neuling
2014-09-30 10:35 ` [PATCH v2 13/17] cxl: Add base builtin support Michael Neuling
2014-10-01 12:00 ` Michael Ellerman
2014-10-02 3:43 ` Michael Neuling
2014-09-30 10:35 ` [PATCH v2 14/17] cxl: Driver code for powernv PCIe based cards for userspace access Michael Neuling
2014-10-02 7:02 ` Michael Ellerman
2014-09-30 10:35 ` [PATCH v2 15/17] cxl: Userspace header file Michael Neuling
2014-10-02 6:02 ` Michael Ellerman
2014-10-02 10:28 ` Ian Munsie
2014-10-02 12:42 ` Benjamin Herrenschmidt [this message]
2014-09-30 10:35 ` [PATCH v2 16/17] cxl: Add driver to Kbuild and Makefiles Michael Neuling
2014-09-30 10:35 ` [PATCH v2 17/17] cxl: Add documentation for userspace APIs Michael Neuling
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