From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Dan Carpenter <dan.carpenter@oracle.com>
Cc: linuxppc-dev@lists.ozlabs.org
Subject: Re: [POWERPC] 4xx: EP405 boards support for arch/powerpc
Date: Mon, 20 Oct 2014 21:52:39 +1100 [thread overview]
Message-ID: <1413802359.18300.7.camel@pasglop> (raw)
In-Reply-To: <20141020090627.GA24768@mwanda>
On Mon, 2014-10-20 at 12:06 +0300, Dan Carpenter wrote:
> Hello Benjamin Herrenschmidt,
>
> The patch 619740384ceb: "[POWERPC] 4xx: EP405 boards support for
> arch/powerpc" from Dec 21, 2007, leads to the following static
> checker warning:
Ah, I even forgot I wrote that ... I'll have to dig out the docs of
that chip, maybe later this week. Thanks !
Cheers,
Ben.
> arch/powerpc/boot/4xx.c:567 ibm405gp_fixup_clocks()
> warn: shifting and masking to zero
>
> arch/powerpc/boot/4xx.c
> 562 fbdv = (pllmr & 0x1e000000) >> 25;
> 563 if (fbdv == 0)
> 564 fbdv = 16;
> 565 cbdv = ((pllmr & 0x00060000) >> 17) + 1; /* CPU:PLB */
> 566 opdv = ((pllmr & 0x00018000) >> 15) + 1; /* PLB:OPB */
> 567 ppdv = ((pllmr & 0x00001800) >> 13) + 1; /* PLB:PCI */
> ^^^^^^^^^^^^^^^^^^^^^^^^^
> This mask and shift means that ppdv is always 1.
>
> 568 epdv = ((pllmr & 0x00001800) >> 11) + 2; /* PLB:EBC */
> 569 udiv = ((cpc0_cr0 & 0x3e) >> 1) + 1;
> 570
> 571 /* check for 405GPr */
> 572 if ((mfpvr() & 0xfffffff0) == (0x50910951 & 0xfffffff0)) {
> 573 fwdvb = 8 - (pllmr & 0x00000007);
> 574 if (!(psr & 0x00001000)) /* PCI async mode enable == 0 */
> 575 if (psr & 0x00000020) /* New mode enable */
> 576 m = fwdvb * 2 * ppdv;
> 577 else
> 578 m = fwdvb * cbdv * ppdv;
>
> regards,
> dan carpenter
next prev parent reply other threads:[~2014-10-20 11:48 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-20 9:06 [POWERPC] 4xx: EP405 boards support for arch/powerpc Dan Carpenter
2014-10-20 10:52 ` Benjamin Herrenschmidt [this message]
2014-10-20 19:02 ` Wolfgang Denk
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