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From: Gavin Shan <gwshan@linux.vnet.ibm.com>
To: linuxppc-dev@ozlabs.org
Cc: Gavin Shan <gwshan@linux.vnet.ibm.com>
Subject: [PATCH 4/8] powerpc/powernv: Initialize M64 PE in time
Date: Wed, 12 Nov 2014 13:36:07 +1100	[thread overview]
Message-ID: <1415759771-11359-5-git-send-email-gwshan@linux.vnet.ibm.com> (raw)
In-Reply-To: <1415759771-11359-1-git-send-email-gwshan@linux.vnet.ibm.com>

The patch initializes PE instance when reserving PE number to
keep consistent things as we did before. Also, it replaces the
iteration on bridge's windows with the prefered way.

Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
---
 arch/powerpc/platforms/powernv/pci-ioda.c | 27 +++++++++++++++++++++------
 1 file changed, 21 insertions(+), 6 deletions(-)

diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
index cf90cce..7a7a688 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -91,6 +91,24 @@ static inline bool pnv_pci_is_mem_pref_64(unsigned long flags)
 		(IORESOURCE_MEM_64 | IORESOURCE_PREFETCH));
 }
 
+static void pnv_ioda_reserve_pe(struct pnv_phb *phb, int pe_no)
+{
+	if (!(pe_no >= 0 && pe_no < phb->ioda.total_pe)) {
+		pr_warn("%s: Invalid PE %d on PHB#%x\n",
+			__func__, pe_no, phb->hose->global_number);
+		return;
+	}
+
+	if (test_and_set_bit(pe_no, phb->ioda.pe_alloc)) {
+		pr_warn("%s: PE %d was assigned on PHB#%x\n",
+			__func__, pe_no, phb->hose->global_number);
+		return;
+	}
+
+	phb->ioda.pe_array[pe_no].phb = phb;
+	phb->ioda.pe_array[pe_no].pe_number = pe_no;
+}
+
 static int pnv_ioda_alloc_pe(struct pnv_phb *phb)
 {
 	unsigned long pe;
@@ -185,16 +203,15 @@ static void pnv_ioda2_reserve_m64_pe(struct pnv_phb *phb)
 	 * instead of root bus.
 	 */
 	list_for_each_entry(pdev, &phb->hose->bus->devices, bus_list) {
-		for (i = PCI_BRIDGE_RESOURCES;
-		     i <= PCI_BRIDGE_RESOURCE_END; i++) {
-			r = &pdev->resource[i];
+		for (i = 0; i < PCI_BRIDGE_RESOURCE_NUM; i++) {
+			r = &pdev->resource[PCI_BRIDGE_RESOURCES + i];
 			if (!r->parent ||
 			    !pnv_pci_is_mem_pref_64(r->flags))
 				continue;
 
 			base = (r->start - phb->ioda.m64_base) / sgsz;
 			for (step = 0; step < resource_size(r) / sgsz; step++)
-				set_bit(base + step, phb->ioda.pe_alloc);
+				pnv_ioda_reserve_pe(phb, base + step);
 		}
 	}
 }
@@ -287,8 +304,6 @@ done:
 	while ((i = find_next_bit(pe_alloc, phb->ioda.total_pe, i + 1)) <
 		phb->ioda.total_pe) {
 		pe = &phb->ioda.pe_array[i];
-		pe->phb = phb;
-		pe->pe_number = i;
 
 		if (!master_pe) {
 			pe->flags |= PNV_IODA_PE_MASTER;
-- 
1.8.3.2

  parent reply	other threads:[~2014-11-12  2:36 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-11-12  2:36 [PATCH 0/8] powerpc/powernv: PCI code cleanup Gavin Shan
2014-11-12  2:36 ` [PATCH 1/8] powerpc/powernv: Check PHB type in advance Gavin Shan
2014-11-12  2:36 ` [PATCH 2/8] powerpc/powernv: Fix condition to remove M64 Gavin Shan
2014-11-12  2:36 ` [PATCH 3/8] powerpc/powernv: Rename alloc_m64_pe() to reserve_m64_pe() Gavin Shan
2014-11-12  2:36 ` Gavin Shan [this message]
2014-11-12  2:36 ` [PATCH 5/8] powerpc/powernv: Set PELTV for compound PEs Gavin Shan
2014-11-12  2:36 ` [PATCH 6/8] powerpc/powernv: Simplify pnv_ioda_configure_pe() Gavin Shan
2014-11-12  2:36 ` [PATCH 7/8] powerpc/powernv: Bail upon invalid master PE Gavin Shan
2014-11-12  2:36 ` [PATCH 8/8] powerpc/powernv: Fix potential zero devisor Gavin Shan

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