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From: Gavin Shan <gwshan@linux.vnet.ibm.com>
To: linuxppc-dev@ozlabs.org
Cc: Gavin Shan <gwshan@linux.vnet.ibm.com>
Subject: [PATCH 8/8] powerpc/powernv: Fix potential zero devisor
Date: Wed, 12 Nov 2014 13:36:11 +1100	[thread overview]
Message-ID: <1415759771-11359-9-git-send-email-gwshan@linux.vnet.ibm.com> (raw)
In-Reply-To: <1415759771-11359-1-git-send-email-gwshan@linux.vnet.ibm.com>

If there're no PHBs under P5IOC2 HUB device tree node, we should
bail early to avoid zero devisor and allocating TCE tables.

Reported-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
---
 arch/powerpc/platforms/powernv/pci-p5ioc2.c | 28 ++++++++++++++++------------
 1 file changed, 16 insertions(+), 12 deletions(-)

diff --git a/arch/powerpc/platforms/powernv/pci-p5ioc2.c b/arch/powerpc/platforms/powernv/pci-p5ioc2.c
index 94ce348..3336fcb 100644
--- a/arch/powerpc/platforms/powernv/pci-p5ioc2.c
+++ b/arch/powerpc/platforms/powernv/pci-p5ioc2.c
@@ -196,6 +196,22 @@ void __init pnv_pci_init_p5ioc2_hub(struct device_node *np)
 	hub_id = be64_to_cpup(prop64);
 	pr_info(" HUB-ID : 0x%016llx\n", hub_id);
 
+	/* Count child PHBs and calculate TCE space per PHB */
+	for_each_child_of_node(np, phbn) {
+		if (of_device_is_compatible(phbn, "ibm,p5ioc2-pcix") ||
+		    of_device_is_compatible(phbn, "ibm,p5ioc2-pciex"))
+			phb_count++;
+	}
+
+	if (phb_count <= 0) {
+		pr_info(" No PHBs for Hub %s\n", np->full_name);
+		return;
+	}
+
+	tce_per_phb = __rounddown_pow_of_two(P5IOC2_TCE_MEMORY / phb_count);
+	pr_info(" Allocating %lld MB of TCE memory per PHB\n",
+		tce_per_phb >> 20);
+
 	/* Currently allocate 16M of TCE memory for every Hub
 	 *
 	 * XXX TODO: Make it chip local if possible
@@ -215,18 +231,6 @@ void __init pnv_pci_init_p5ioc2_hub(struct device_node *np)
 		return;
 	}
 
-	/* Count child PHBs */
-	for_each_child_of_node(np, phbn) {
-		if (of_device_is_compatible(phbn, "ibm,p5ioc2-pcix") ||
-		    of_device_is_compatible(phbn, "ibm,p5ioc2-pciex"))
-			phb_count++;
-	}
-
-	/* Calculate how much TCE space we can give per PHB */
-	tce_per_phb = __rounddown_pow_of_two(P5IOC2_TCE_MEMORY / phb_count);
-	pr_info(" Allocating %lld MB of TCE memory per PHB\n",
-		tce_per_phb >> 20);
-
 	/* Initialize PHBs */
 	for_each_child_of_node(np, phbn) {
 		if (of_device_is_compatible(phbn, "ibm,p5ioc2-pcix") ||
-- 
1.8.3.2

      parent reply	other threads:[~2014-11-12  2:36 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-11-12  2:36 [PATCH 0/8] powerpc/powernv: PCI code cleanup Gavin Shan
2014-11-12  2:36 ` [PATCH 1/8] powerpc/powernv: Check PHB type in advance Gavin Shan
2014-11-12  2:36 ` [PATCH 2/8] powerpc/powernv: Fix condition to remove M64 Gavin Shan
2014-11-12  2:36 ` [PATCH 3/8] powerpc/powernv: Rename alloc_m64_pe() to reserve_m64_pe() Gavin Shan
2014-11-12  2:36 ` [PATCH 4/8] powerpc/powernv: Initialize M64 PE in time Gavin Shan
2014-11-12  2:36 ` [PATCH 5/8] powerpc/powernv: Set PELTV for compound PEs Gavin Shan
2014-11-12  2:36 ` [PATCH 6/8] powerpc/powernv: Simplify pnv_ioda_configure_pe() Gavin Shan
2014-11-12  2:36 ` [PATCH 7/8] powerpc/powernv: Bail upon invalid master PE Gavin Shan
2014-11-12  2:36 ` Gavin Shan [this message]

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