[PATCH] [v2] power/fsl: add MDIO dt binding for FMan

[PATCH] [v2] power/fsl: add MDIO dt binding for FMan

[shh.xie]

From: Shaohui Xie <Shaohui.Xie@freescale.com>

This binding is for FMan MDIO, it covers FMan v2 & FMan v3.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
---
changes in V2:
addressed comments from Scott in V1.

 .../devicetree/bindings/powerpc/fsl/fman.txt       | 69 ++++++++++++++++++++++
 1 file changed, 69 insertions(+)

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/fman.txt b/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
index edeea16..1523a87 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
@@ -7,6 +7,7 @@ CONTENTS
   - FMan MURAM Node
   - FMan dTSEC/XGEC/mEMAC Node
   - FMan IEEE 1588 Node
+  - FMan MDIO Node
   - Example
 
 =============================================================================
@@ -357,6 +358,68 @@ ptp-timer@fe000 {
 };
 
 =============================================================================
+FMan MDIO Node
+
+DESCRIPTION
+
+The MDIO is a bus to which the PHY devices are connected.
+
+PROPERTIES
+
+- compatible
+		Usage: required
+		Value type: <stringlist>
+		Definition: A standard property.
+		Must include "fsl,fman-mdio" for 1 Gb/s MDIO from FMan v2.
+		Must include "fsl,fman-xmdio" for 10 Gb/s MDIO from FMan v2.
+		Must include "fsl,fman-memac-mdio" for 1/10 Gb/s MDIO from
+		FMan v3.
+
+- reg
+		Usage: required
+		Value type: <prop-encoded-array>
+		Definition: A standard property.
+
+- bus-frequency
+		Usage: optional
+		Value type: <u32>
+		Definition: Specifies external MDIO bus clock speed which is
+		different from MDIO standard 2.5MHz. Should be defined for SoCs
+		on which the standard one cannot work.
+
+- interrupts
+		Usage: optional
+		Value type: <prop-encoded-array>
+		Definition: Event interrupt of external MDIO controller.
+		1 Gb/s MDIO and 10 Gb/s MDIO has one interrupt respectively.
+
+- fsl,fman-internal-mdio
+		Usage: required for internal MDIO
+		Value type: boolean
+		Definition: Fman has internal MDIO for internal PCS(Physical
+		Coding Sublayer) PHYs and external MDIO for external PHYs.
+		The settings and programming routines for internal/external
+		MDIO are different. Must be included for internal MDIO.
+
+EXAMPLE
+
+Example for FMan v2 external MDIO:
+
+mdio@f1000 {
+	compatible = "fsl,fman-xmdio";
+	reg = <0xf1000 0x1000>;
+	bus-frequency = <20000>;
+};
+
+Example for FMan v3 internal MDIO:
+
+mdio@f1000 {
+	compatible = "fsl,fman-memac-mdio";
+	reg = <0xf1000 0x1000>;
+	fsl,fman-internal-mdio;
+};
+
+=============================================================================
 Example
 
 fman@400000 {
@@ -531,4 +594,10 @@ fman@400000 {
 		compatible = "fsl,fman-ptp-timer";
 		reg = <0xfe000 0x1000>;
 	};
+
+	mdio@f1000 {
+		compatible = "fsl,fman-xmdio";
+		reg = <0xf1000 0x1000>;
+		bus-frequency = <20000>;
+	};
 };
-- 
1.8.4.1

RE: [PATCH] [v2] power/fsl: add MDIO dt binding for FMan

[Shaohui Xie]

Ping.

Best Regards,=20
Shaohui Xie

> -----Original Message-----
> From: shh.xie@gmail.com [mailto:shh.xie@gmail.com]
> Sent: Friday, November 14, 2014 5:53 PM
> To: linuxppc-dev@lists.ozlabs.org; devicetree@vger.kernel.org; Wood
> Scott-B07421
> Cc: Medve Emilian-EMMEDVE1; Liberman Igal-B31950; Xie Shaohui-B21989
> Subject: [PATCH] [v2] power/fsl: add MDIO dt binding for FMan
>=20
> From: Shaohui Xie <Shaohui.Xie@freescale.com>
>=20
> This binding is for FMan MDIO, it covers FMan v2 & FMan v3.
>=20
> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
> ---
> changes in V2:
> addressed comments from Scott in V1.
>=20
>  .../devicetree/bindings/powerpc/fsl/fman.txt       | 69
> ++++++++++++++++++++++
>  1 file changed, 69 insertions(+)
>=20
> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
> b/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
> index edeea16..1523a87 100644
> --- a/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
> +++ b/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
> @@ -7,6 +7,7 @@ CONTENTS
>    - FMan MURAM Node
>    - FMan dTSEC/XGEC/mEMAC Node
>    - FMan IEEE 1588 Node
> +  - FMan MDIO Node
>    - Example
>=20
>=20
> =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
> =3D=3D=3D=3D
> @@ -357,6 +358,68 @@ ptp-timer@fe000 {
>  };
>=20
>=20
> =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
> =3D=3D=3D=3D
> +FMan MDIO Node
> +
> +DESCRIPTION
> +
> +The MDIO is a bus to which the PHY devices are connected.
> +
> +PROPERTIES
> +
> +- compatible
> +		Usage: required
> +		Value type: <stringlist>
> +		Definition: A standard property.
> +		Must include "fsl,fman-mdio" for 1 Gb/s MDIO from FMan v2.
> +		Must include "fsl,fman-xmdio" for 10 Gb/s MDIO from FMan v2.
> +		Must include "fsl,fman-memac-mdio" for 1/10 Gb/s MDIO from
> +		FMan v3.
> +
> +- reg
> +		Usage: required
> +		Value type: <prop-encoded-array>
> +		Definition: A standard property.
> +
> +- bus-frequency
> +		Usage: optional
> +		Value type: <u32>
> +		Definition: Specifies external MDIO bus clock speed which is
> +		different from MDIO standard 2.5MHz. Should be defined for
> SoCs
> +		on which the standard one cannot work.
> +
> +- interrupts
> +		Usage: optional
> +		Value type: <prop-encoded-array>
> +		Definition: Event interrupt of external MDIO controller.
> +		1 Gb/s MDIO and 10 Gb/s MDIO has one interrupt respectively.
> +
> +- fsl,fman-internal-mdio
> +		Usage: required for internal MDIO
> +		Value type: boolean
> +		Definition: Fman has internal MDIO for internal PCS(Physical
> +		Coding Sublayer) PHYs and external MDIO for external PHYs.
> +		The settings and programming routines for internal/external
> +		MDIO are different. Must be included for internal MDIO.
> +
> +EXAMPLE
> +
> +Example for FMan v2 external MDIO:
> +
> +mdio@f1000 {
> +	compatible =3D "fsl,fman-xmdio";
> +	reg =3D <0xf1000 0x1000>;
> +	bus-frequency =3D <20000>;
> +};
> +
> +Example for FMan v3 internal MDIO:
> +
> +mdio@f1000 {
> +	compatible =3D "fsl,fman-memac-mdio";
> +	reg =3D <0xf1000 0x1000>;
> +	fsl,fman-internal-mdio;
> +};
> +
> +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
> =3D=3D=3D=3D=3D
>  Example
>=20
>  fman@400000 {
> @@ -531,4 +594,10 @@ fman@400000 {
>  		compatible =3D "fsl,fman-ptp-timer";
>  		reg =3D <0xfe000 0x1000>;
>  	};
> +
> +	mdio@f1000 {
> +		compatible =3D "fsl,fman-xmdio";
> +		reg =3D <0xf1000 0x1000>;
> +		bus-frequency =3D <20000>;
> +	};
>  };
> --
> 1.8.4.1

Re: [PATCH] [v2] power/fsl: add MDIO dt binding for FMan

[Scott Wood]

On Fri, 2014-11-14 at 17:53 +0800, shh.xie@gmail.com wrote:
> From: Shaohui Xie <Shaohui.Xie@freescale.com>
> 
> This binding is for FMan MDIO, it covers FMan v2 & FMan v3.
> 
> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
> ---
> changes in V2:
> addressed comments from Scott in V1.
> 
>  .../devicetree/bindings/powerpc/fsl/fman.txt       | 69 ++++++++++++++++++++++
>  1 file changed, 69 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/fman.txt b/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
> index edeea16..1523a87 100644
> --- a/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
> +++ b/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
> @@ -7,6 +7,7 @@ CONTENTS
>    - FMan MURAM Node
>    - FMan dTSEC/XGEC/mEMAC Node
>    - FMan IEEE 1588 Node
> +  - FMan MDIO Node
>    - Example
>  
>  =============================================================================
> @@ -357,6 +358,68 @@ ptp-timer@fe000 {
>  };
>  
>  =============================================================================
> +FMan MDIO Node
> +
> +DESCRIPTION
> +
> +The MDIO is a bus to which the PHY devices are connected.
> +
> +PROPERTIES
> +
> +- compatible
> +		Usage: required
> +		Value type: <stringlist>
> +		Definition: A standard property.
> +		Must include "fsl,fman-mdio" for 1 Gb/s MDIO from FMan v2.
> +		Must include "fsl,fman-xmdio" for 10 Gb/s MDIO from FMan v2.
> +		Must include "fsl,fman-memac-mdio" for 1/10 Gb/s MDIO from
> +		FMan v3.
> +
> +- reg
> +		Usage: required
> +		Value type: <prop-encoded-array>
> +		Definition: A standard property.
> +
> +- bus-frequency
> +		Usage: optional
> +		Value type: <u32>
> +		Definition: Specifies external MDIO bus clock speed which is
> +		different from MDIO standard 2.5MHz. Should be defined for SoCs
> +		on which the standard one cannot work.
> +
> +- interrupts
> +		Usage: optional
> +		Value type: <prop-encoded-array>
> +		Definition: Event interrupt of external MDIO controller.
> +		1 Gb/s MDIO and 10 Gb/s MDIO has one interrupt respectively.
> +
> +- fsl,fman-internal-mdio
> +		Usage: required for internal MDIO
> +		Value type: boolean
> +		Definition: Fman has internal MDIO for internal PCS(Physical
> +		Coding Sublayer) PHYs and external MDIO for external PHYs.
> +		The settings and programming routines for internal/external
> +		MDIO are different. Must be included for internal MDIO.
> +
> +EXAMPLE
> +
> +Example for FMan v2 external MDIO:
> +
> +mdio@f1000 {
> +	compatible = "fsl,fman-xmdio";
> +	reg = <0xf1000 0x1000>;
> +	bus-frequency = <20000>;
> +};

So the bus frequency is only 20 KHz?  Or is the unit supposed to be
something other than Hz?

-Scott

RE: [PATCH] [v2] power/fsl: add MDIO dt binding for FMan

[Shaohui Xie]

PiAtLS0tLU9yaWdpbmFsIE1lc3NhZ2UtLS0tLQ0KPiBGcm9tOiBXb29kIFNjb3R0LUIwNzQyMQ0K
PiBTZW50OiBXZWRuZXNkYXksIE5vdmVtYmVyIDI2LCAyMDE0IDk6NTAgQU0NCj4gVG86IHNoaC54
aWVAZ21haWwuY29tDQo+IENjOiBsaW51eHBwYy1kZXZAbGlzdHMub3psYWJzLm9yZzsgZGV2aWNl
dHJlZUB2Z2VyLmtlcm5lbC5vcmc7IE1lZHZlDQo+IEVtaWxpYW4tRU1NRURWRTE7IExpYmVybWFu
IElnYWwtQjMxOTUwOyBYaWUgU2hhb2h1aS1CMjE5ODkNCj4gU3ViamVjdDogUmU6IFtQQVRDSF0g
W3YyXSBwb3dlci9mc2w6IGFkZCBNRElPIGR0IGJpbmRpbmcgZm9yIEZNYW4NCj4gDQo+IE9uIEZy
aSwgMjAxNC0xMS0xNCBhdCAxNzo1MyArMDgwMCwgc2hoLnhpZUBnbWFpbC5jb20gd3JvdGU6DQo+
ID4gRnJvbTogU2hhb2h1aSBYaWUgPFNoYW9odWkuWGllQGZyZWVzY2FsZS5jb20+DQo+ID4NCj4g
PiBUaGlzIGJpbmRpbmcgaXMgZm9yIEZNYW4gTURJTywgaXQgY292ZXJzIEZNYW4gdjIgJiBGTWFu
IHYzLg0KPiA+DQo+ID4gU2lnbmVkLW9mZi1ieTogU2hhb2h1aSBYaWUgPFNoYW9odWkuWGllQGZy
ZWVzY2FsZS5jb20+DQo+ID4gLS0tDQo+ID4gY2hhbmdlcyBpbiBWMjoNCj4gPiBhZGRyZXNzZWQg
Y29tbWVudHMgZnJvbSBTY290dCBpbiBWMS4NCj4gPg0KPiA+ICAuLi4vZGV2aWNldHJlZS9iaW5k
aW5ncy9wb3dlcnBjL2ZzbC9mbWFuLnR4dCAgICAgICB8IDY5DQo+ICsrKysrKysrKysrKysrKysr
KysrKysNCj4gPiAgMSBmaWxlIGNoYW5nZWQsIDY5IGluc2VydGlvbnMoKykNCj4gPg0KPiA+IGRp
ZmYgLS1naXQgYS9Eb2N1bWVudGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3MvcG93ZXJwYy9mc2wv
Zm1hbi50eHQNCj4gPiBiL0RvY3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy9wb3dlcnBj
L2ZzbC9mbWFuLnR4dA0KPiA+IGluZGV4IGVkZWVhMTYuLjE1MjNhODcgMTAwNjQ0DQo+ID4gLS0t
IGEvRG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVlL2JpbmRpbmdzL3Bvd2VycGMvZnNsL2ZtYW4udHh0
DQo+ID4gKysrIGIvRG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVlL2JpbmRpbmdzL3Bvd2VycGMvZnNs
L2ZtYW4udHh0DQo+ID4gQEAgLTcsNiArNyw3IEBAIENPTlRFTlRTDQo+ID4gICAgLSBGTWFuIE1V
UkFNIE5vZGUNCj4gPiAgICAtIEZNYW4gZFRTRUMvWEdFQy9tRU1BQyBOb2RlDQo+ID4gICAgLSBG
TWFuIElFRUUgMTU4OCBOb2RlDQo+ID4gKyAgLSBGTWFuIE1ESU8gTm9kZQ0KPiA+ICAgIC0gRXhh
bXBsZQ0KPiA+DQo+ID4NCj4gPiA9PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09
PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09DQo+ID4gPT09PT09PSBAQCAtMzU3LDYg
KzM1OCw2OCBAQCBwdHAtdGltZXJAZmUwMDAgeyAgfTsNCj4gPg0KPiA+DQo+ID4gPT09PT09PT09
PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09
PT09PQ0KPiA+ID09PT09PT0NCj4gPiArRk1hbiBNRElPIE5vZGUNCj4gPiArDQo+ID4gK0RFU0NS
SVBUSU9ODQo+ID4gKw0KPiA+ICtUaGUgTURJTyBpcyBhIGJ1cyB0byB3aGljaCB0aGUgUEhZIGRl
dmljZXMgYXJlIGNvbm5lY3RlZC4NCj4gPiArDQo+ID4gK1BST1BFUlRJRVMNCj4gPiArDQo+ID4g
Ky0gY29tcGF0aWJsZQ0KPiA+ICsJCVVzYWdlOiByZXF1aXJlZA0KPiA+ICsJCVZhbHVlIHR5cGU6
IDxzdHJpbmdsaXN0Pg0KPiA+ICsJCURlZmluaXRpb246IEEgc3RhbmRhcmQgcHJvcGVydHkuDQo+
ID4gKwkJTXVzdCBpbmNsdWRlICJmc2wsZm1hbi1tZGlvIiBmb3IgMSBHYi9zIE1ESU8gZnJvbSBG
TWFuIHYyLg0KPiA+ICsJCU11c3QgaW5jbHVkZSAiZnNsLGZtYW4teG1kaW8iIGZvciAxMCBHYi9z
IE1ESU8gZnJvbSBGTWFuIHYyLg0KPiA+ICsJCU11c3QgaW5jbHVkZSAiZnNsLGZtYW4tbWVtYWMt
bWRpbyIgZm9yIDEvMTAgR2IvcyBNRElPIGZyb20NCj4gPiArCQlGTWFuIHYzLg0KPiA+ICsNCj4g
PiArLSByZWcNCj4gPiArCQlVc2FnZTogcmVxdWlyZWQNCj4gPiArCQlWYWx1ZSB0eXBlOiA8cHJv
cC1lbmNvZGVkLWFycmF5Pg0KPiA+ICsJCURlZmluaXRpb246IEEgc3RhbmRhcmQgcHJvcGVydHku
DQo+ID4gKw0KPiA+ICstIGJ1cy1mcmVxdWVuY3kNCj4gPiArCQlVc2FnZTogb3B0aW9uYWwNCj4g
PiArCQlWYWx1ZSB0eXBlOiA8dTMyPg0KPiA+ICsJCURlZmluaXRpb246IFNwZWNpZmllcyBleHRl
cm5hbCBNRElPIGJ1cyBjbG9jayBzcGVlZCB3aGljaCBpcw0KPiA+ICsJCWRpZmZlcmVudCBmcm9t
IE1ESU8gc3RhbmRhcmQgMi41TUh6LiBTaG91bGQgYmUgZGVmaW5lZCBmb3INCj4gU29Dcw0KPiA+
ICsJCW9uIHdoaWNoIHRoZSBzdGFuZGFyZCBvbmUgY2Fubm90IHdvcmsuDQo+ID4gKw0KPiA+ICst
IGludGVycnVwdHMNCj4gPiArCQlVc2FnZTogb3B0aW9uYWwNCj4gPiArCQlWYWx1ZSB0eXBlOiA8
cHJvcC1lbmNvZGVkLWFycmF5Pg0KPiA+ICsJCURlZmluaXRpb246IEV2ZW50IGludGVycnVwdCBv
ZiBleHRlcm5hbCBNRElPIGNvbnRyb2xsZXIuDQo+ID4gKwkJMSBHYi9zIE1ESU8gYW5kIDEwIEdi
L3MgTURJTyBoYXMgb25lIGludGVycnVwdCByZXNwZWN0aXZlbHkuDQo+ID4gKw0KPiA+ICstIGZz
bCxmbWFuLWludGVybmFsLW1kaW8NCj4gPiArCQlVc2FnZTogcmVxdWlyZWQgZm9yIGludGVybmFs
IE1ESU8NCj4gPiArCQlWYWx1ZSB0eXBlOiBib29sZWFuDQo+ID4gKwkJRGVmaW5pdGlvbjogRm1h
biBoYXMgaW50ZXJuYWwgTURJTyBmb3IgaW50ZXJuYWwgUENTKFBoeXNpY2FsDQo+ID4gKwkJQ29k
aW5nIFN1YmxheWVyKSBQSFlzIGFuZCBleHRlcm5hbCBNRElPIGZvciBleHRlcm5hbCBQSFlzLg0K
PiA+ICsJCVRoZSBzZXR0aW5ncyBhbmQgcHJvZ3JhbW1pbmcgcm91dGluZXMgZm9yIGludGVybmFs
L2V4dGVybmFsDQo+ID4gKwkJTURJTyBhcmUgZGlmZmVyZW50LiBNdXN0IGJlIGluY2x1ZGVkIGZv
ciBpbnRlcm5hbCBNRElPLg0KPiA+ICsNCj4gPiArRVhBTVBMRQ0KPiA+ICsNCj4gPiArRXhhbXBs
ZSBmb3IgRk1hbiB2MiBleHRlcm5hbCBNRElPOg0KPiA+ICsNCj4gPiArbWRpb0BmMTAwMCB7DQo+
ID4gKwljb21wYXRpYmxlID0gImZzbCxmbWFuLXhtZGlvIjsNCj4gPiArCXJlZyA9IDwweGYxMDAw
IDB4MTAwMD47DQo+ID4gKwlidXMtZnJlcXVlbmN5ID0gPDIwMDAwPjsNCj4gPiArfTsNCj4gDQo+
IFNvIHRoZSBidXMgZnJlcXVlbmN5IGlzIG9ubHkgMjAgS0h6PyAgT3IgaXMgdGhlIHVuaXQgc3Vw
cG9zZWQgdG8gYmUNCj4gc29tZXRoaW5nIG90aGVyIHRoYW4gSHo/DQpbUy5IXSBpdCdzIG9ubHkg
YW4gZXhhbXBsZSwgaXQgY291bGQgYmUgZGlmZmVyZW50IG9uIHJlYWwgU29DcywgYnV0IHRoZXkg
YWx3YXlzIGxvd2VyIHRoYW4gdGhlIHN0YW5kYXJkIG9uZSwNClRoZSBzdGFuZGFyZCBvbmUgaXMg
Mi41TUh6LCBJIGhhdmUgdG8gdXNlIEh6IGZvciBpdC4NCg0KVGhhbmtzIQ0KU2hhb2h1aQ0K

RE: [PATCH] [v2] power/fsl: add MDIO dt binding for FMan

[Shaohui Xie]

UGluZy4NCg0KQmVzdCBSZWdhcmRzLCANClNoYW9odWkgWGllDQo+IC0tLS0tT3JpZ2luYWwgTWVz
c2FnZS0tLS0tDQo+IEZyb206IFhpZSBTaGFvaHVpLUIyMTk4OQ0KPiBTZW50OiBXZWRuZXNkYXks
IE5vdmVtYmVyIDI2LCAyMDE0IDEwOjExIEFNDQo+IFRvOiBXb29kIFNjb3R0LUIwNzQyMQ0KPiBD
YzogbGludXhwcGMtZGV2QGxpc3RzLm96bGFicy5vcmc7IGRldmljZXRyZWVAdmdlci5rZXJuZWwu
b3JnOyBNZWR2ZSBFbWlsaWFuLQ0KPiBFTU1FRFZFMTsgTGliZXJtYW4gSWdhbC1CMzE5NTANCj4g
U3ViamVjdDogUkU6IFtQQVRDSF0gW3YyXSBwb3dlci9mc2w6IGFkZCBNRElPIGR0IGJpbmRpbmcg
Zm9yIEZNYW4NCj4gDQo+ID4gLS0tLS1PcmlnaW5hbCBNZXNzYWdlLS0tLS0NCj4gPiBGcm9tOiBX
b29kIFNjb3R0LUIwNzQyMQ0KPiA+IFNlbnQ6IFdlZG5lc2RheSwgTm92ZW1iZXIgMjYsIDIwMTQg
OTo1MCBBTQ0KPiA+IFRvOiBzaGgueGllQGdtYWlsLmNvbQ0KPiA+IENjOiBsaW51eHBwYy1kZXZA
bGlzdHMub3psYWJzLm9yZzsgZGV2aWNldHJlZUB2Z2VyLmtlcm5lbC5vcmc7IE1lZHZlDQo+ID4g
RW1pbGlhbi1FTU1FRFZFMTsgTGliZXJtYW4gSWdhbC1CMzE5NTA7IFhpZSBTaGFvaHVpLUIyMTk4
OQ0KPiA+IFN1YmplY3Q6IFJlOiBbUEFUQ0hdIFt2Ml0gcG93ZXIvZnNsOiBhZGQgTURJTyBkdCBi
aW5kaW5nIGZvciBGTWFuDQo+ID4NCj4gPiBPbiBGcmksIDIwMTQtMTEtMTQgYXQgMTc6NTMgKzA4
MDAsIHNoaC54aWVAZ21haWwuY29tIHdyb3RlOg0KPiA+ID4gRnJvbTogU2hhb2h1aSBYaWUgPFNo
YW9odWkuWGllQGZyZWVzY2FsZS5jb20+DQo+ID4gPg0KPiA+ID4gVGhpcyBiaW5kaW5nIGlzIGZv
ciBGTWFuIE1ESU8sIGl0IGNvdmVycyBGTWFuIHYyICYgRk1hbiB2My4NCj4gPiA+DQo+ID4gPiBT
aWduZWQtb2ZmLWJ5OiBTaGFvaHVpIFhpZSA8U2hhb2h1aS5YaWVAZnJlZXNjYWxlLmNvbT4NCj4g
PiA+IC0tLQ0KPiA+ID4gY2hhbmdlcyBpbiBWMjoNCj4gPiA+IGFkZHJlc3NlZCBjb21tZW50cyBm
cm9tIFNjb3R0IGluIFYxLg0KPiA+ID4NCj4gPiA+ICAuLi4vZGV2aWNldHJlZS9iaW5kaW5ncy9w
b3dlcnBjL2ZzbC9mbWFuLnR4dCAgICAgICB8IDY5DQo+ID4gKysrKysrKysrKysrKysrKysrKysr
Kw0KPiA+ID4gIDEgZmlsZSBjaGFuZ2VkLCA2OSBpbnNlcnRpb25zKCspDQo+ID4gPg0KPiA+ID4g
ZGlmZiAtLWdpdCBhL0RvY3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy9wb3dlcnBjL2Zz
bC9mbWFuLnR4dA0KPiA+ID4gYi9Eb2N1bWVudGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3MvcG93
ZXJwYy9mc2wvZm1hbi50eHQNCj4gPiA+IGluZGV4IGVkZWVhMTYuLjE1MjNhODcgMTAwNjQ0DQo+
ID4gPiAtLS0gYS9Eb2N1bWVudGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3MvcG93ZXJwYy9mc2wv
Zm1hbi50eHQNCj4gPiA+ICsrKyBiL0RvY3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy9w
b3dlcnBjL2ZzbC9mbWFuLnR4dA0KPiA+ID4gQEAgLTcsNiArNyw3IEBAIENPTlRFTlRTDQo+ID4g
PiAgICAtIEZNYW4gTVVSQU0gTm9kZQ0KPiA+ID4gICAgLSBGTWFuIGRUU0VDL1hHRUMvbUVNQUMg
Tm9kZQ0KPiA+ID4gICAgLSBGTWFuIElFRUUgMTU4OCBOb2RlDQo+ID4gPiArICAtIEZNYW4gTURJ
TyBOb2RlDQo+ID4gPiAgICAtIEV4YW1wbGUNCj4gPiA+DQo+ID4gPg0KPiA+ID4gPT09PT09PT09
PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09
PT0NCj4gPiA+ID09ID09PT09PT0gQEAgLTM1Nyw2ICszNTgsNjggQEAgcHRwLXRpbWVyQGZlMDAw
IHsgIH07DQo+ID4gPg0KPiA+ID4NCj4gPiA+ID09PT09PT09PT09PT09PT09PT09PT09PT09PT09
PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09DQo+ID4gPiA9PQ0KPiA+ID4g
PT09PT09PQ0KPiA+ID4gK0ZNYW4gTURJTyBOb2RlDQo+ID4gPiArDQo+ID4gPiArREVTQ1JJUFRJ
T04NCj4gPiA+ICsNCj4gPiA+ICtUaGUgTURJTyBpcyBhIGJ1cyB0byB3aGljaCB0aGUgUEhZIGRl
dmljZXMgYXJlIGNvbm5lY3RlZC4NCj4gPiA+ICsNCj4gPiA+ICtQUk9QRVJUSUVTDQo+ID4gPiAr
DQo+ID4gPiArLSBjb21wYXRpYmxlDQo+ID4gPiArCQlVc2FnZTogcmVxdWlyZWQNCj4gPiA+ICsJ
CVZhbHVlIHR5cGU6IDxzdHJpbmdsaXN0Pg0KPiA+ID4gKwkJRGVmaW5pdGlvbjogQSBzdGFuZGFy
ZCBwcm9wZXJ0eS4NCj4gPiA+ICsJCU11c3QgaW5jbHVkZSAiZnNsLGZtYW4tbWRpbyIgZm9yIDEg
R2IvcyBNRElPIGZyb20gRk1hbiB2Mi4NCj4gPiA+ICsJCU11c3QgaW5jbHVkZSAiZnNsLGZtYW4t
eG1kaW8iIGZvciAxMCBHYi9zIE1ESU8gZnJvbSBGTWFuIHYyLg0KPiA+ID4gKwkJTXVzdCBpbmNs
dWRlICJmc2wsZm1hbi1tZW1hYy1tZGlvIiBmb3IgMS8xMCBHYi9zIE1ESU8gZnJvbQ0KPiA+ID4g
KwkJRk1hbiB2My4NCj4gPiA+ICsNCj4gPiA+ICstIHJlZw0KPiA+ID4gKwkJVXNhZ2U6IHJlcXVp
cmVkDQo+ID4gPiArCQlWYWx1ZSB0eXBlOiA8cHJvcC1lbmNvZGVkLWFycmF5Pg0KPiA+ID4gKwkJ
RGVmaW5pdGlvbjogQSBzdGFuZGFyZCBwcm9wZXJ0eS4NCj4gPiA+ICsNCj4gPiA+ICstIGJ1cy1m
cmVxdWVuY3kNCj4gPiA+ICsJCVVzYWdlOiBvcHRpb25hbA0KPiA+ID4gKwkJVmFsdWUgdHlwZTog
PHUzMj4NCj4gPiA+ICsJCURlZmluaXRpb246IFNwZWNpZmllcyBleHRlcm5hbCBNRElPIGJ1cyBj
bG9jayBzcGVlZCB3aGljaCBpcw0KPiA+ID4gKwkJZGlmZmVyZW50IGZyb20gTURJTyBzdGFuZGFy
ZCAyLjVNSHouIFNob3VsZCBiZSBkZWZpbmVkIGZvcg0KPiA+IFNvQ3MNCj4gPiA+ICsJCW9uIHdo
aWNoIHRoZSBzdGFuZGFyZCBvbmUgY2Fubm90IHdvcmsuDQo+ID4gPiArDQo+ID4gPiArLSBpbnRl
cnJ1cHRzDQo+ID4gPiArCQlVc2FnZTogb3B0aW9uYWwNCj4gPiA+ICsJCVZhbHVlIHR5cGU6IDxw
cm9wLWVuY29kZWQtYXJyYXk+DQo+ID4gPiArCQlEZWZpbml0aW9uOiBFdmVudCBpbnRlcnJ1cHQg
b2YgZXh0ZXJuYWwgTURJTyBjb250cm9sbGVyLg0KPiA+ID4gKwkJMSBHYi9zIE1ESU8gYW5kIDEw
IEdiL3MgTURJTyBoYXMgb25lIGludGVycnVwdCByZXNwZWN0aXZlbHkuDQo+ID4gPiArDQo+ID4g
PiArLSBmc2wsZm1hbi1pbnRlcm5hbC1tZGlvDQo+ID4gPiArCQlVc2FnZTogcmVxdWlyZWQgZm9y
IGludGVybmFsIE1ESU8NCj4gPiA+ICsJCVZhbHVlIHR5cGU6IGJvb2xlYW4NCj4gPiA+ICsJCURl
ZmluaXRpb246IEZtYW4gaGFzIGludGVybmFsIE1ESU8gZm9yIGludGVybmFsIFBDUyhQaHlzaWNh
bA0KPiA+ID4gKwkJQ29kaW5nIFN1YmxheWVyKSBQSFlzIGFuZCBleHRlcm5hbCBNRElPIGZvciBl
eHRlcm5hbCBQSFlzLg0KPiA+ID4gKwkJVGhlIHNldHRpbmdzIGFuZCBwcm9ncmFtbWluZyByb3V0
aW5lcyBmb3IgaW50ZXJuYWwvZXh0ZXJuYWwNCj4gPiA+ICsJCU1ESU8gYXJlIGRpZmZlcmVudC4g
TXVzdCBiZSBpbmNsdWRlZCBmb3IgaW50ZXJuYWwgTURJTy4NCj4gPiA+ICsNCj4gPiA+ICtFWEFN
UExFDQo+ID4gPiArDQo+ID4gPiArRXhhbXBsZSBmb3IgRk1hbiB2MiBleHRlcm5hbCBNRElPOg0K
PiA+ID4gKw0KPiA+ID4gK21kaW9AZjEwMDAgew0KPiA+ID4gKwljb21wYXRpYmxlID0gImZzbCxm
bWFuLXhtZGlvIjsNCj4gPiA+ICsJcmVnID0gPDB4ZjEwMDAgMHgxMDAwPjsNCj4gPiA+ICsJYnVz
LWZyZXF1ZW5jeSA9IDwyMDAwMD47DQo+ID4gPiArfTsNCj4gPg0KPiA+IFNvIHRoZSBidXMgZnJl
cXVlbmN5IGlzIG9ubHkgMjAgS0h6PyAgT3IgaXMgdGhlIHVuaXQgc3VwcG9zZWQgdG8gYmUNCj4g
PiBzb21ldGhpbmcgb3RoZXIgdGhhbiBIej8NCj4gW1MuSF0gaXQncyBvbmx5IGFuIGV4YW1wbGUs
IGl0IGNvdWxkIGJlIGRpZmZlcmVudCBvbiByZWFsIFNvQ3MsIGJ1dCB0aGV5IGFsd2F5cw0KPiBs
b3dlciB0aGFuIHRoZSBzdGFuZGFyZCBvbmUsIFRoZSBzdGFuZGFyZCBvbmUgaXMgMi41TUh6LCBJ
IGhhdmUgdG8gdXNlIEh6IGZvciBpdC4NCj4gDQo+IFRoYW5rcyENCj4gU2hhb2h1aQ0K

Re: [PATCH] [v2] power/fsl: add MDIO dt binding for FMan

[Scott Wood]

On Thu, 2014-12-18 at 06:53 -0600, Xie Shaohui-B21989 wrote:
> Ping.
> 
> Best Regards, 
> Shaohui Xie

I can't put patches in my -next until the merge window closes.

> > > > +EXAMPLE
> > > > +
> > > > +Example for FMan v2 external MDIO:
> > > > +
> > > > +mdio@f1000 {
> > > > +	compatible = "fsl,fman-xmdio";
> > > > +	reg = <0xf1000 0x1000>;
> > > > +	bus-frequency = <20000>;
> > > > +};
> > >
> > > So the bus frequency is only 20 KHz?  Or is the unit supposed to be
> > > something other than Hz?
> > [S.H] it's only an example, it could be different on real SoCs, but they always
> > lower than the standard one, The standard one is 2.5MHz, I have to use Hz for it.

Is there any SoC for which 20 kHz is the right frequency?  I just want
to make sure the example is realistic.

-Scott

RE: [PATCH] [v2] power/fsl: add MDIO dt binding for FMan

[Shaohui Xie]

PiAtLS0tLU9yaWdpbmFsIE1lc3NhZ2UtLS0tLQ0KPiBGcm9tOiBXb29kIFNjb3R0LUIwNzQyMQ0K
PiBTZW50OiBGcmlkYXksIERlY2VtYmVyIDE5LCAyMDE0IDY6MDEgQU0NCj4gVG86IFhpZSBTaGFv
aHVpLUIyMTk4OQ0KPiBDYzogbGludXhwcGMtZGV2QGxpc3RzLm96bGFicy5vcmc7IGRldmljZXRy
ZWVAdmdlci5rZXJuZWwub3JnOyBNZWR2ZSBFbWlsaWFuLQ0KPiBFTU1FRFZFMTsgTGliZXJtYW4g
SWdhbC1CMzE5NTANCj4gU3ViamVjdDogUmU6IFtQQVRDSF0gW3YyXSBwb3dlci9mc2w6IGFkZCBN
RElPIGR0IGJpbmRpbmcgZm9yIEZNYW4NCj4gDQo+IE9uIFRodSwgMjAxNC0xMi0xOCBhdCAwNjo1
MyAtMDYwMCwgWGllIFNoYW9odWktQjIxOTg5IHdyb3RlOg0KPiA+IFBpbmcuDQo+ID4NCj4gPiBC
ZXN0IFJlZ2FyZHMsDQo+ID4gU2hhb2h1aSBYaWUNCj4gDQo+IEkgY2FuJ3QgcHV0IHBhdGNoZXMg
aW4gbXkgLW5leHQgdW50aWwgdGhlIG1lcmdlIHdpbmRvdyBjbG9zZXMuDQo+IA0KPiA+ID4gPiA+
ICtFWEFNUExFDQo+ID4gPiA+ID4gKw0KPiA+ID4gPiA+ICtFeGFtcGxlIGZvciBGTWFuIHYyIGV4
dGVybmFsIE1ESU86DQo+ID4gPiA+ID4gKw0KPiA+ID4gPiA+ICttZGlvQGYxMDAwIHsNCj4gPiA+
ID4gPiArCWNvbXBhdGlibGUgPSAiZnNsLGZtYW4teG1kaW8iOw0KPiA+ID4gPiA+ICsJcmVnID0g
PDB4ZjEwMDAgMHgxMDAwPjsNCj4gPiA+ID4gPiArCWJ1cy1mcmVxdWVuY3kgPSA8MjAwMDA+Ow0K
PiA+ID4gPiA+ICt9Ow0KPiA+ID4gPg0KPiA+ID4gPiBTbyB0aGUgYnVzIGZyZXF1ZW5jeSBpcyBv
bmx5IDIwIEtIej8gIE9yIGlzIHRoZSB1bml0IHN1cHBvc2VkIHRvDQo+ID4gPiA+IGJlIHNvbWV0
aGluZyBvdGhlciB0aGFuIEh6Pw0KPiA+ID4gW1MuSF0gaXQncyBvbmx5IGFuIGV4YW1wbGUsIGl0
IGNvdWxkIGJlIGRpZmZlcmVudCBvbiByZWFsIFNvQ3MsIGJ1dA0KPiA+ID4gdGhleSBhbHdheXMg
bG93ZXIgdGhhbiB0aGUgc3RhbmRhcmQgb25lLCBUaGUgc3RhbmRhcmQgb25lIGlzIDIuNU1Ieiwg
SSBoYXZlDQo+IHRvIHVzZSBIeiBmb3IgaXQuDQo+IA0KPiBJcyB0aGVyZSBhbnkgU29DIGZvciB3
aGljaCAyMCBrSHogaXMgdGhlIHJpZ2h0IGZyZXF1ZW5jeT8gIEkganVzdCB3YW50IHRvIG1ha2UN
Cj4gc3VyZSB0aGUgZXhhbXBsZSBpcyByZWFsaXN0aWMuDQpbUy5IXSB0aGUgY2xvY2sgZGl2aWRl
ciBoYXMgYSBsaW1pdGF0aW9uIHRoYXQgdGhlIE1BWCB2YWx1ZSBpdCBjYW4gZ2V0IG9uIEZtYW4g
djIgaXMgMjU1ICgweGZmLCA4IGJpdHMpLA0KT24gRm1hbiB2MyBpcyA1MTEoMHgxZmYsIDkgYml0
cykuDQoNClNvIHRoZSBsb3dlc3QgZnJlcXVlbmN5IG9uIEZtYW4gdjIgaXM6IEZtYW5fY2xvY2sg
LyAoMiAqIDI1NSksDQpPbiBGbWFuIHYzIGlzOiBGbWFuX2Nsb2NrIC8gKCgyICogNTExKSArIDEp
Lg0KDQpUYWtlIGRlZmF1bHQgRm1hbiBmcmVxdWVuY3kgc2V0dGluZyBmcm9tIFNESzEuNyBhcyBl
eGFtcGxlLCB0aGUgbG93ZXN0IGNsb2NrIHVzZWQgZm9yIEZtYW4gdjIgaXMgNTgxTUh6LA0KVGhl
IGxvd2VzdCBjbG9jayBmb3IgRm1hbiB2MyBpcyA2MDBNSHouDQoNClRoZW4gdGhlIGxvd2VzdCBi
dXMgZnJlcXVlbmN5IGNhbiBnZXQgaXM6DQpGbWFuIHYyOiB+MTE0MEtIeg0KRm1hbiB2MzogfjU4
N0tIeg0KDQoyMEtIeiBpcyBub3QgcHJhY3RpY2UsIHdlIGRvbid0IGhhdmUgYSBzdWdnZXN0ZWQg
dmFsdWUgaW4gZXJyYXRhIGRvY3VtZW50Lg0KRm9yIHRoaXMgZXhhbXBsZSwgc2hvdWxkIEkgcG9z
dCBhIG5ldyB2ZXJzaW9uIHdpdGggYSB2YWx1ZSBsaWtlIDEyMDBLSHo/DQoNClRoYW5rcyENClNo
YW9odWkNCg==

Re: [PATCH] [v2] power/fsl: add MDIO dt binding for FMan

[Scott Wood]

On Fri, 2014-12-19 at 01:23 -0600, Xie Shaohui-B21989 wrote:
> > -----Original Message-----
> > From: Wood Scott-B07421
> > Sent: Friday, December 19, 2014 6:01 AM
> > To: Xie Shaohui-B21989
> > Cc: linuxppc-dev@lists.ozlabs.org; devicetree@vger.kernel.org; Medve Emilian-
> > EMMEDVE1; Liberman Igal-B31950
> > Subject: Re: [PATCH] [v2] power/fsl: add MDIO dt binding for FMan
> > 
> > On Thu, 2014-12-18 at 06:53 -0600, Xie Shaohui-B21989 wrote:
> > > Ping.
> > >
> > > Best Regards,
> > > Shaohui Xie
> > 
> > I can't put patches in my -next until the merge window closes.
> > 
> > > > > > +EXAMPLE
> > > > > > +
> > > > > > +Example for FMan v2 external MDIO:
> > > > > > +
> > > > > > +mdio@f1000 {
> > > > > > +	compatible = "fsl,fman-xmdio";
> > > > > > +	reg = <0xf1000 0x1000>;
> > > > > > +	bus-frequency = <20000>;
> > > > > > +};
> > > > >
> > > > > So the bus frequency is only 20 KHz?  Or is the unit supposed to
> > > > > be something other than Hz?
> > > > [S.H] it's only an example, it could be different on real SoCs, but
> > > > they always lower than the standard one, The standard one is 2.5MHz, I have
> > to use Hz for it.
> > 
> > Is there any SoC for which 20 kHz is the right frequency?  I just want to make
> > sure the example is realistic.
> [S.H] the clock divider has a limitation that the MAX value it can get on Fman v2 is 255 (0xff, 8 bits),
> On Fman v3 is 511(0x1ff, 9 bits).
> 
> So the lowest frequency on Fman v2 is: Fman_clock / (2 * 255),
> On Fman v3 is: Fman_clock / ((2 * 511) + 1).
> 
> Take default Fman frequency setting from SDK1.7 as example, the lowest clock used for Fman v2 is 581MHz,
> The lowest clock for Fman v3 is 600MHz.
> 
> Then the lowest bus frequency can get is:
> Fman v2: ~1140KHz
> Fman v3: ~587KHz
> 
> 20KHz is not practice, we don't have a suggested value in errata document.
> For this example, should I post a new version with a value like 1200KHz?

This is different from how you described the problem before.  If the
limitation is on the divider, rather than the absolute bus frequency,
then specifiy the max divider.  Or better, since according to the above
this correlates with fman version, just have the driver know what the
max divider is for each fman version.

-Scott

RE: [PATCH] [v2] power/fsl: add MDIO dt binding for FMan

[Shaohui Xie]

PiBPbiBGcmksIDIwMTQtMTItMTkgYXQgMDE6MjMgLTA2MDAsIFhpZSBTaGFvaHVpLUIyMTk4OSB3
cm90ZToNCj4gPiA+IC0tLS0tT3JpZ2luYWwgTWVzc2FnZS0tLS0tDQo+ID4gPiBGcm9tOiBXb29k
IFNjb3R0LUIwNzQyMQ0KPiA+ID4gU2VudDogRnJpZGF5LCBEZWNlbWJlciAxOSwgMjAxNCA2OjAx
IEFNDQo+ID4gPiBUbzogWGllIFNoYW9odWktQjIxOTg5DQo+ID4gPiBDYzogbGludXhwcGMtZGV2
QGxpc3RzLm96bGFicy5vcmc7IGRldmljZXRyZWVAdmdlci5rZXJuZWwub3JnOyBNZWR2ZQ0KPiA+
ID4gRW1pbGlhbi0gRU1NRURWRTE7IExpYmVybWFuIElnYWwtQjMxOTUwDQo+ID4gPiBTdWJqZWN0
OiBSZTogW1BBVENIXSBbdjJdIHBvd2VyL2ZzbDogYWRkIE1ESU8gZHQgYmluZGluZyBmb3IgRk1h
bg0KPiA+ID4NCj4gPiA+IE9uIFRodSwgMjAxNC0xMi0xOCBhdCAwNjo1MyAtMDYwMCwgWGllIFNo
YW9odWktQjIxOTg5IHdyb3RlOg0KPiA+ID4gPiBQaW5nLg0KPiA+ID4gPg0KPiA+ID4gPiBCZXN0
IFJlZ2FyZHMsDQo+ID4gPiA+IFNoYW9odWkgWGllDQo+ID4gPg0KPiA+ID4gSSBjYW4ndCBwdXQg
cGF0Y2hlcyBpbiBteSAtbmV4dCB1bnRpbCB0aGUgbWVyZ2Ugd2luZG93IGNsb3Nlcy4NCj4gPiA+
DQo+ID4gPiA+ID4gPiA+ICtFWEFNUExFDQo+ID4gPiA+ID4gPiA+ICsNCj4gPiA+ID4gPiA+ID4g
K0V4YW1wbGUgZm9yIEZNYW4gdjIgZXh0ZXJuYWwgTURJTzoNCj4gPiA+ID4gPiA+ID4gKw0KPiA+
ID4gPiA+ID4gPiArbWRpb0BmMTAwMCB7DQo+ID4gPiA+ID4gPiA+ICsJY29tcGF0aWJsZSA9ICJm
c2wsZm1hbi14bWRpbyI7DQo+ID4gPiA+ID4gPiA+ICsJcmVnID0gPDB4ZjEwMDAgMHgxMDAwPjsN
Cj4gPiA+ID4gPiA+ID4gKwlidXMtZnJlcXVlbmN5ID0gPDIwMDAwPjsNCj4gPiA+ID4gPiA+ID4g
K307DQo+ID4gPiA+ID4gPg0KPiA+ID4gPiA+ID4gU28gdGhlIGJ1cyBmcmVxdWVuY3kgaXMgb25s
eSAyMCBLSHo/ICBPciBpcyB0aGUgdW5pdCBzdXBwb3NlZA0KPiA+ID4gPiA+ID4gdG8gYmUgc29t
ZXRoaW5nIG90aGVyIHRoYW4gSHo/DQo+ID4gPiA+ID4gW1MuSF0gaXQncyBvbmx5IGFuIGV4YW1w
bGUsIGl0IGNvdWxkIGJlIGRpZmZlcmVudCBvbiByZWFsIFNvQ3MsDQo+ID4gPiA+ID4gYnV0IHRo
ZXkgYWx3YXlzIGxvd2VyIHRoYW4gdGhlIHN0YW5kYXJkIG9uZSwgVGhlIHN0YW5kYXJkIG9uZSBp
cw0KPiA+ID4gPiA+IDIuNU1IeiwgSSBoYXZlDQo+ID4gPiB0byB1c2UgSHogZm9yIGl0Lg0KPiA+
ID4NCj4gPiA+IElzIHRoZXJlIGFueSBTb0MgZm9yIHdoaWNoIDIwIGtIeiBpcyB0aGUgcmlnaHQg
ZnJlcXVlbmN5PyAgSSBqdXN0DQo+ID4gPiB3YW50IHRvIG1ha2Ugc3VyZSB0aGUgZXhhbXBsZSBp
cyByZWFsaXN0aWMuDQo+ID4gW1MuSF0gdGhlIGNsb2NrIGRpdmlkZXIgaGFzIGEgbGltaXRhdGlv
biB0aGF0IHRoZSBNQVggdmFsdWUgaXQgY2FuIGdldA0KPiA+IG9uIEZtYW4gdjIgaXMgMjU1ICgw
eGZmLCA4IGJpdHMpLCBPbiBGbWFuIHYzIGlzIDUxMSgweDFmZiwgOSBiaXRzKS4NCj4gPg0KPiA+
IFNvIHRoZSBsb3dlc3QgZnJlcXVlbmN5IG9uIEZtYW4gdjIgaXM6IEZtYW5fY2xvY2sgLyAoMiAq
IDI1NSksIE9uIEZtYW4NCj4gPiB2MyBpczogRm1hbl9jbG9jayAvICgoMiAqIDUxMSkgKyAxKS4N
Cj4gPg0KPiA+IFRha2UgZGVmYXVsdCBGbWFuIGZyZXF1ZW5jeSBzZXR0aW5nIGZyb20gU0RLMS43
IGFzIGV4YW1wbGUsIHRoZSBsb3dlc3QNCj4gPiBjbG9jayB1c2VkIGZvciBGbWFuIHYyIGlzIDU4
MU1IeiwgVGhlIGxvd2VzdCBjbG9jayBmb3IgRm1hbiB2MyBpcyA2MDBNSHouDQo+ID4NCj4gPiBU
aGVuIHRoZSBsb3dlc3QgYnVzIGZyZXF1ZW5jeSBjYW4gZ2V0IGlzOg0KPiA+IEZtYW4gdjI6IH4x
MTQwS0h6DQo+ID4gRm1hbiB2MzogfjU4N0tIeg0KPiA+DQo+ID4gMjBLSHogaXMgbm90IHByYWN0
aWNlLCB3ZSBkb24ndCBoYXZlIGEgc3VnZ2VzdGVkIHZhbHVlIGluIGVycmF0YSBkb2N1bWVudC4N
Cj4gPiBGb3IgdGhpcyBleGFtcGxlLCBzaG91bGQgSSBwb3N0IGEgbmV3IHZlcnNpb24gd2l0aCBh
IHZhbHVlIGxpa2UgMTIwMEtIej8NCj4gDQo+IFRoaXMgaXMgZGlmZmVyZW50IGZyb20gaG93IHlv
dSBkZXNjcmliZWQgdGhlIHByb2JsZW0gYmVmb3JlLiAgSWYgdGhlIGxpbWl0YXRpb24NCj4gaXMg
b24gdGhlIGRpdmlkZXIsIHJhdGhlciB0aGFuIHRoZSBhYnNvbHV0ZSBidXMgZnJlcXVlbmN5LCB0
aGVuIHNwZWNpZml5IHRoZSBtYXgNCj4gZGl2aWRlci4gIE9yIGJldHRlciwgc2luY2UgYWNjb3Jk
aW5nIHRvIHRoZSBhYm92ZSB0aGlzIGNvcnJlbGF0ZXMgd2l0aCBmbWFuDQo+IHZlcnNpb24sIGp1
c3QgaGF2ZSB0aGUgZHJpdmVyIGtub3cgd2hhdCB0aGUgbWF4IGRpdmlkZXIgaXMgZm9yIGVhY2gg
Zm1hbiB2ZXJzaW9uLg0KW1MuSF0gVGhlIHByb2JsZW0gaXMgbm90IHRoZSBkaXZpZGVyIGhhcyBs
aW1pdGF0aW9uLCB0aGUgcHJvYmxlbSBpcyBhIGRpZmZlcmVudCBidXMgZnJlcXVlbmN5IA0KSXMg
bmVlZGVkIHdoaWNoIGlzIGxvd2VyIHRoYW4gdGhlIHN0YW5kYXJkLCBidXQgZHVlIHRvIHRoZSBk
aXZpZGVyIGxpbWl0YXRpb24sIHRoZSBsb3dlc3QNCmJ1cyBmcmVxdWVuY3kgYWxzbyBoYXMgbGlt
aXRhdGlvbi4gaS5lLiB3ZSBuZWVkIHRvIHVzZSB0aGUgZGl2aWRlciB0byBnZXQgYSBsb3dlciBm
cmVxdWVuY3ksDQpidXQgaG93IG11Y2ggbG93ZXIgdGhlIHZhbHVlIGNvdWxkIGJlIGlzIHJlc3Ry
aWN0ZWQgYnkgdGhlIGRpdmlkZXIgbGltaXRhdGlvbi4NCg0KVGhhbmtzIQ0KU2hhb2h1aQ0K

Re: [PATCH] [v2] power/fsl: add MDIO dt binding for FMan

[Emil Medve]

Hello Shao-Hui,


On 12/21/2014 08:31 PM, Xie Shaohui-B21989 wrote:
>> On Fri, 2014-12-19 at 01:23 -0600, Xie Shaohui-B21989 wrote:
>>>> -----Original Message-----
>>>> From: Wood Scott-B07421
>>>> Sent: Friday, December 19, 2014 6:01 AM
>>>> To: Xie Shaohui-B21989
>>>> Cc: linuxppc-dev@lists.ozlabs.org; devicetree@vger.kernel.org; Medve
>>>> Emilian- EMMEDVE1; Liberman Igal-B31950
>>>> Subject: Re: [PATCH] [v2] power/fsl: add MDIO dt binding for FMan
>>>>
>>>> On Thu, 2014-12-18 at 06:53 -0600, Xie Shaohui-B21989 wrote:
>>>>> Ping.
>>>>>
>>>>> Best Regards,
>>>>> Shaohui Xie
>>>>
>>>> I can't put patches in my -next until the merge window closes.
>>>>
>>>>>>>> +EXAMPLE
>>>>>>>> +
>>>>>>>> +Example for FMan v2 external MDIO:
>>>>>>>> +
>>>>>>>> +mdio@f1000 {
>>>>>>>> +	compatible = "fsl,fman-xmdio";
>>>>>>>> +	reg = <0xf1000 0x1000>;
>>>>>>>> +	bus-frequency = <20000>;
>>>>>>>> +};
>>>>>>>
>>>>>>> So the bus frequency is only 20 KHz?  Or is the unit supposed
>>>>>>> to be something other than Hz?
>>>>>> [S.H] it's only an example, it could be different on real SoCs,
>>>>>> but they always lower than the standard one, The standard one is
>>>>>> 2.5MHz, I have
>>>> to use Hz for it.
>>>>
>>>> Is there any SoC for which 20 kHz is the right frequency?  I just
>>>> want to make sure the example is realistic.
>>> [S.H] the clock divider has a limitation that the MAX value it can get
>>> on Fman v2 is 255 (0xff, 8 bits), On Fman v3 is 511(0x1ff, 9 bits).
>>>
>>> So the lowest frequency on Fman v2 is: Fman_clock / (2 * 255), On Fman
>>> v3 is: Fman_clock / ((2 * 511) + 1).
>>>
>>> Take default Fman frequency setting from SDK1.7 as example, the lowest
>>> clock used for Fman v2 is 581MHz, The lowest clock for Fman v3 is 600MHz.
>>>
>>> Then the lowest bus frequency can get is:
>>> Fman v2: ~1140KHz
>>> Fman v3: ~587KHz
>>>
>>> 20KHz is not practice, we don't have a suggested value in errata document.
>>> For this example, should I post a new version with a value like 1200KHz?
>>
>> This is different from how you described the problem before.  If the limitation
>> is on the divider, rather than the absolute bus frequency, then specifiy the max
>> divider.  Or better, since according to the above this correlates with fman
>> version, just have the driver know what the max divider is for each fman version.
> [S.H] The problem is not the divider has limitation, the problem is a different bus frequency 
> Is needed which is lower than the standard, but due to the divider limitation, the lowest
> bus frequency also has limitation. i.e. we need to use the divider to get a lower frequency,
> but how much lower the value could be is restricted by the divider limitation.

For the purpose of an example in the binding document, I suggest we just
stick with the IEEE standard frequency. We can continue this
conversation about errata handling when we submit the code relevant to
this binding (and the FMan v3 support)


Cheers,

Re: [PATCH] [v2] power/fsl: add MDIO dt binding for FMan

[Scott Wood]

On Mon, 2014-12-22 at 02:20 -0600, Emil Medve wrote:
> Hello Shao-Hui,
> 
> 
> On 12/21/2014 08:31 PM, Xie Shaohui-B21989 wrote:
> >> On Fri, 2014-12-19 at 01:23 -0600, Xie Shaohui-B21989 wrote:
> >>>> -----Original Message-----
> >>>> From: Wood Scott-B07421
> >>>> Sent: Friday, December 19, 2014 6:01 AM
> >>>> To: Xie Shaohui-B21989
> >>>> Cc: linuxppc-dev@lists.ozlabs.org; devicetree@vger.kernel.org; Medve
> >>>> Emilian- EMMEDVE1; Liberman Igal-B31950
> >>>> Subject: Re: [PATCH] [v2] power/fsl: add MDIO dt binding for FMan
> >>>>
> >>>> On Thu, 2014-12-18 at 06:53 -0600, Xie Shaohui-B21989 wrote:
> >>>>> Ping.
> >>>>>
> >>>>> Best Regards,
> >>>>> Shaohui Xie
> >>>>
> >>>> I can't put patches in my -next until the merge window closes.
> >>>>
> >>>>>>>> +EXAMPLE
> >>>>>>>> +
> >>>>>>>> +Example for FMan v2 external MDIO:
> >>>>>>>> +
> >>>>>>>> +mdio@f1000 {
> >>>>>>>> +	compatible = "fsl,fman-xmdio";
> >>>>>>>> +	reg = <0xf1000 0x1000>;
> >>>>>>>> +	bus-frequency = <20000>;
> >>>>>>>> +};
> >>>>>>>
> >>>>>>> So the bus frequency is only 20 KHz?  Or is the unit supposed
> >>>>>>> to be something other than Hz?
> >>>>>> [S.H] it's only an example, it could be different on real SoCs,
> >>>>>> but they always lower than the standard one, The standard one is
> >>>>>> 2.5MHz, I have
> >>>> to use Hz for it.
> >>>>
> >>>> Is there any SoC for which 20 kHz is the right frequency?  I just
> >>>> want to make sure the example is realistic.
> >>> [S.H] the clock divider has a limitation that the MAX value it can get
> >>> on Fman v2 is 255 (0xff, 8 bits), On Fman v3 is 511(0x1ff, 9 bits).
> >>>
> >>> So the lowest frequency on Fman v2 is: Fman_clock / (2 * 255), On Fman
> >>> v3 is: Fman_clock / ((2 * 511) + 1).
> >>>
> >>> Take default Fman frequency setting from SDK1.7 as example, the lowest
> >>> clock used for Fman v2 is 581MHz, The lowest clock for Fman v3 is 600MHz.
> >>>
> >>> Then the lowest bus frequency can get is:
> >>> Fman v2: ~1140KHz
> >>> Fman v3: ~587KHz
> >>>
> >>> 20KHz is not practice, we don't have a suggested value in errata document.
> >>> For this example, should I post a new version with a value like 1200KHz?
> >>
> >> This is different from how you described the problem before.  If the limitation
> >> is on the divider, rather than the absolute bus frequency, then specifiy the max
> >> divider.  Or better, since according to the above this correlates with fman
> >> version, just have the driver know what the max divider is for each fman version.
> > [S.H] The problem is not the divider has limitation, the problem is a different bus frequency 
> > Is needed which is lower than the standard, but due to the divider limitation, the lowest
> > bus frequency also has limitation. i.e. we need to use the divider to get a lower frequency,
> > but how much lower the value could be is restricted by the divider limitation.

This is difficult to follow -- are you saying the erratum requires a
speed that is not achievable?

> For the purpose of an example in the binding document, I suggest we just
> stick with the IEEE standard frequency.

The whole reason for this property existing in the device tree is
non-standard frequencies.

> We can continue this conversation about errata handling when we submit
> the code relevant to this binding (and the FMan v3 support)

It affects the binding, so let's discuss it now please.

-Scott

RE: [PATCH] [v2] power/fsl: add MDIO dt binding for FMan

[Shaohui Xie]

PiAtLS0tLU9yaWdpbmFsIE1lc3NhZ2UtLS0tLQ0KPiBGcm9tOiBXb29kIFNjb3R0LUIwNzQyMQ0K
PiBTZW50OiBNb25kYXksIERlY2VtYmVyIDIyLCAyMDE0IDQ6MzMgUE0NCj4gVG86IE1lZHZlIEVt
aWxpYW4tRU1NRURWRTENCj4gQ2M6IFhpZSBTaGFvaHVpLUIyMTk4OTsgbGludXhwcGMtZGV2QGxp
c3RzLm96bGFicy5vcmc7DQo+IGRldmljZXRyZWVAdmdlci5rZXJuZWwub3JnOyBMaWJlcm1hbiBJ
Z2FsLUIzMTk1MA0KPiBTdWJqZWN0OiBSZTogW1BBVENIXSBbdjJdIHBvd2VyL2ZzbDogYWRkIE1E
SU8gZHQgYmluZGluZyBmb3IgRk1hbg0KPiANCj4gT24gTW9uLCAyMDE0LTEyLTIyIGF0IDAyOjIw
IC0wNjAwLCBFbWlsIE1lZHZlIHdyb3RlOg0KPiA+IEhlbGxvIFNoYW8tSHVpLA0KPiA+DQo+ID4N
Cj4gPiBPbiAxMi8yMS8yMDE0IDA4OjMxIFBNLCBYaWUgU2hhb2h1aS1CMjE5ODkgd3JvdGU6DQo+
ID4gPj4gT24gRnJpLCAyMDE0LTEyLTE5IGF0IDAxOjIzIC0wNjAwLCBYaWUgU2hhb2h1aS1CMjE5
ODkgd3JvdGU6DQo+ID4gPj4+PiAtLS0tLU9yaWdpbmFsIE1lc3NhZ2UtLS0tLQ0KPiA+ID4+Pj4g
RnJvbTogV29vZCBTY290dC1CMDc0MjENCj4gPiA+Pj4+IFNlbnQ6IEZyaWRheSwgRGVjZW1iZXIg
MTksIDIwMTQgNjowMSBBTQ0KPiA+ID4+Pj4gVG86IFhpZSBTaGFvaHVpLUIyMTk4OQ0KPiA+ID4+
Pj4gQ2M6IGxpbnV4cHBjLWRldkBsaXN0cy5vemxhYnMub3JnOyBkZXZpY2V0cmVlQHZnZXIua2Vy
bmVsLm9yZzsNCj4gPiA+Pj4+IE1lZHZlDQo+ID4gPj4+PiBFbWlsaWFuLSBFTU1FRFZFMTsgTGli
ZXJtYW4gSWdhbC1CMzE5NTANCj4gPiA+Pj4+IFN1YmplY3Q6IFJlOiBbUEFUQ0hdIFt2Ml0gcG93
ZXIvZnNsOiBhZGQgTURJTyBkdCBiaW5kaW5nIGZvciBGTWFuDQo+ID4gPj4+Pg0KPiA+ID4+Pj4g
T24gVGh1LCAyMDE0LTEyLTE4IGF0IDA2OjUzIC0wNjAwLCBYaWUgU2hhb2h1aS1CMjE5ODkgd3Jv
dGU6DQo+ID4gPj4+Pj4gUGluZy4NCj4gPiA+Pj4+Pg0KPiA+ID4+Pj4+IEJlc3QgUmVnYXJkcywN
Cj4gPiA+Pj4+PiBTaGFvaHVpIFhpZQ0KPiA+ID4+Pj4NCj4gPiA+Pj4+IEkgY2FuJ3QgcHV0IHBh
dGNoZXMgaW4gbXkgLW5leHQgdW50aWwgdGhlIG1lcmdlIHdpbmRvdyBjbG9zZXMuDQo+ID4gPj4+
Pg0KPiA+ID4+Pj4+Pj4+ICtFWEFNUExFDQo+ID4gPj4+Pj4+Pj4gKw0KPiA+ID4+Pj4+Pj4+ICtF
eGFtcGxlIGZvciBGTWFuIHYyIGV4dGVybmFsIE1ESU86DQo+ID4gPj4+Pj4+Pj4gKw0KPiA+ID4+
Pj4+Pj4+ICttZGlvQGYxMDAwIHsNCj4gPiA+Pj4+Pj4+PiArCWNvbXBhdGlibGUgPSAiZnNsLGZt
YW4teG1kaW8iOw0KPiA+ID4+Pj4+Pj4+ICsJcmVnID0gPDB4ZjEwMDAgMHgxMDAwPjsNCj4gPiA+
Pj4+Pj4+PiArCWJ1cy1mcmVxdWVuY3kgPSA8MjAwMDA+Ow0KPiA+ID4+Pj4+Pj4+ICt9Ow0KPiA+
ID4+Pj4+Pj4NCj4gPiA+Pj4+Pj4+IFNvIHRoZSBidXMgZnJlcXVlbmN5IGlzIG9ubHkgMjAgS0h6
PyAgT3IgaXMgdGhlIHVuaXQgc3VwcG9zZWQNCj4gPiA+Pj4+Pj4+IHRvIGJlIHNvbWV0aGluZyBv
dGhlciB0aGFuIEh6Pw0KPiA+ID4+Pj4+PiBbUy5IXSBpdCdzIG9ubHkgYW4gZXhhbXBsZSwgaXQg
Y291bGQgYmUgZGlmZmVyZW50IG9uIHJlYWwgU29DcywNCj4gPiA+Pj4+Pj4gYnV0IHRoZXkgYWx3
YXlzIGxvd2VyIHRoYW4gdGhlIHN0YW5kYXJkIG9uZSwgVGhlIHN0YW5kYXJkIG9uZQ0KPiA+ID4+
Pj4+PiBpcyAyLjVNSHosIEkgaGF2ZQ0KPiA+ID4+Pj4gdG8gdXNlIEh6IGZvciBpdC4NCj4gPiA+
Pj4+DQo+ID4gPj4+PiBJcyB0aGVyZSBhbnkgU29DIGZvciB3aGljaCAyMCBrSHogaXMgdGhlIHJp
Z2h0IGZyZXF1ZW5jeT8gIEkganVzdA0KPiA+ID4+Pj4gd2FudCB0byBtYWtlIHN1cmUgdGhlIGV4
YW1wbGUgaXMgcmVhbGlzdGljLg0KPiA+ID4+PiBbUy5IXSB0aGUgY2xvY2sgZGl2aWRlciBoYXMg
YSBsaW1pdGF0aW9uIHRoYXQgdGhlIE1BWCB2YWx1ZSBpdCBjYW4NCj4gPiA+Pj4gZ2V0IG9uIEZt
YW4gdjIgaXMgMjU1ICgweGZmLCA4IGJpdHMpLCBPbiBGbWFuIHYzIGlzIDUxMSgweDFmZiwgOSBi
aXRzKS4NCj4gPiA+Pj4NCj4gPiA+Pj4gU28gdGhlIGxvd2VzdCBmcmVxdWVuY3kgb24gRm1hbiB2
MiBpczogRm1hbl9jbG9jayAvICgyICogMjU1KSwgT24NCj4gPiA+Pj4gRm1hbg0KPiA+ID4+PiB2
MyBpczogRm1hbl9jbG9jayAvICgoMiAqIDUxMSkgKyAxKS4NCj4gPiA+Pj4NCj4gPiA+Pj4gVGFr
ZSBkZWZhdWx0IEZtYW4gZnJlcXVlbmN5IHNldHRpbmcgZnJvbSBTREsxLjcgYXMgZXhhbXBsZSwg
dGhlDQo+ID4gPj4+IGxvd2VzdCBjbG9jayB1c2VkIGZvciBGbWFuIHYyIGlzIDU4MU1IeiwgVGhl
IGxvd2VzdCBjbG9jayBmb3IgRm1hbiB2MyBpcw0KPiA2MDBNSHouDQo+ID4gPj4+DQo+ID4gPj4+
IFRoZW4gdGhlIGxvd2VzdCBidXMgZnJlcXVlbmN5IGNhbiBnZXQgaXM6DQo+ID4gPj4+IEZtYW4g
djI6IH4xMTQwS0h6DQo+ID4gPj4+IEZtYW4gdjM6IH41ODdLSHoNCj4gPiA+Pj4NCj4gPiA+Pj4g
MjBLSHogaXMgbm90IHByYWN0aWNlLCB3ZSBkb24ndCBoYXZlIGEgc3VnZ2VzdGVkIHZhbHVlIGlu
IGVycmF0YSBkb2N1bWVudC4NCj4gPiA+Pj4gRm9yIHRoaXMgZXhhbXBsZSwgc2hvdWxkIEkgcG9z
dCBhIG5ldyB2ZXJzaW9uIHdpdGggYSB2YWx1ZSBsaWtlIDEyMDBLSHo/DQo+ID4gPj4NCj4gPiA+
PiBUaGlzIGlzIGRpZmZlcmVudCBmcm9tIGhvdyB5b3UgZGVzY3JpYmVkIHRoZSBwcm9ibGVtIGJl
Zm9yZS4gIElmDQo+ID4gPj4gdGhlIGxpbWl0YXRpb24gaXMgb24gdGhlIGRpdmlkZXIsIHJhdGhl
ciB0aGFuIHRoZSBhYnNvbHV0ZSBidXMNCj4gPiA+PiBmcmVxdWVuY3ksIHRoZW4gc3BlY2lmaXkg
dGhlIG1heCBkaXZpZGVyLiAgT3IgYmV0dGVyLCBzaW5jZQ0KPiA+ID4+IGFjY29yZGluZyB0byB0
aGUgYWJvdmUgdGhpcyBjb3JyZWxhdGVzIHdpdGggZm1hbiB2ZXJzaW9uLCBqdXN0IGhhdmUgdGhl
DQo+IGRyaXZlciBrbm93IHdoYXQgdGhlIG1heCBkaXZpZGVyIGlzIGZvciBlYWNoIGZtYW4gdmVy
c2lvbi4NCj4gPiA+IFtTLkhdIFRoZSBwcm9ibGVtIGlzIG5vdCB0aGUgZGl2aWRlciBoYXMgbGlt
aXRhdGlvbiwgdGhlIHByb2JsZW0gaXMNCj4gPiA+IGEgZGlmZmVyZW50IGJ1cyBmcmVxdWVuY3kg
SXMgbmVlZGVkIHdoaWNoIGlzIGxvd2VyIHRoYW4gdGhlDQo+ID4gPiBzdGFuZGFyZCwgYnV0IGR1
ZSB0byB0aGUgZGl2aWRlciBsaW1pdGF0aW9uLCB0aGUgbG93ZXN0IGJ1cw0KPiA+ID4gZnJlcXVl
bmN5IGFsc28gaGFzIGxpbWl0YXRpb24uIGkuZS4gd2UgbmVlZCB0byB1c2UgdGhlIGRpdmlkZXIg
dG8gZ2V0IGENCj4gbG93ZXIgZnJlcXVlbmN5LCBidXQgaG93IG11Y2ggbG93ZXIgdGhlIHZhbHVl
IGNvdWxkIGJlIGlzIHJlc3RyaWN0ZWQgYnkgdGhlDQo+IGRpdmlkZXIgbGltaXRhdGlvbi4NCj4g
DQo+IFRoaXMgaXMgZGlmZmljdWx0IHRvIGZvbGxvdyAtLSBhcmUgeW91IHNheWluZyB0aGUgZXJy
YXR1bSByZXF1aXJlcyBhIHNwZWVkIHRoYXQNCj4gaXMgbm90IGFjaGlldmFibGU/DQpbUy5IXSBU
aGUgZXJyYXRhIG9ubHkgc3RhdGVkIHRoYXQgaXQgbmVlZCB0byB1c2UgYSBsYXJnZXIgZGl2aWRl
ciB0byByZWR1Y2UgdGhlIGNsb2NrDQpGcmVxdWVuY3ksIGJ1dCBpdCBkaWQgbm90IHByb3ZpZGUg
YSBzdWdnZXN0ZWQgdmFsdWUsIHdoYXQgd2Uga25vdyBpcyBzaW5jZSB0aGUgZGl2aWRlcg0KSGFz
IGEgbGltaXRhdGlvbiwgdGhlbiBob3cgbXVjaCBsb3dlciB0aGUgY2xvY2sgZnJlcXVlbmN5IGNv
dWxkIGJlIHJlZHVjZWQgaGFzIGEgbGltaXRhdGlvbi4NCg0KVGhhbmtzIQ0KU2hhb2h1aQ0KPiAN
Cj4gPiBGb3IgdGhlIHB1cnBvc2Ugb2YgYW4gZXhhbXBsZSBpbiB0aGUgYmluZGluZyBkb2N1bWVu
dCwgSSBzdWdnZXN0IHdlDQo+ID4ganVzdCBzdGljayB3aXRoIHRoZSBJRUVFIHN0YW5kYXJkIGZy
ZXF1ZW5jeS4NCj4gDQo+IFRoZSB3aG9sZSByZWFzb24gZm9yIHRoaXMgcHJvcGVydHkgZXhpc3Rp
bmcgaW4gdGhlIGRldmljZSB0cmVlIGlzIG5vbi1zdGFuZGFyZA0KPiBmcmVxdWVuY2llcy4NCj4g
DQo+ID4gV2UgY2FuIGNvbnRpbnVlIHRoaXMgY29udmVyc2F0aW9uIGFib3V0IGVycmF0YSBoYW5k
bGluZyB3aGVuIHdlIHN1Ym1pdA0KPiA+IHRoZSBjb2RlIHJlbGV2YW50IHRvIHRoaXMgYmluZGlu
ZyAoYW5kIHRoZSBGTWFuIHYzIHN1cHBvcnQpDQo+IA0KPiBJdCBhZmZlY3RzIHRoZSBiaW5kaW5n
LCBzbyBsZXQncyBkaXNjdXNzIGl0IG5vdyBwbGVhc2UuDQo+IA0KPiAtU2NvdHQNCj4gDQoNCg==

Re: [PATCH] [v2] power/fsl: add MDIO dt binding for FMan

[Emil Medve]

Hello Scott,


On 12/22/2014 02:32 AM, Scott Wood wrote:
> On Mon, 2014-12-22 at 02:20 -0600, Emil Medve wrote:
>> Hello Shao-Hui,
>>
>>
>> On 12/21/2014 08:31 PM, Xie Shaohui-B21989 wrote:
>>>> On Fri, 2014-12-19 at 01:23 -0600, Xie Shaohui-B21989 wrote:
>>>>>> -----Original Message-----
>>>>>> From: Wood Scott-B07421
>>>>>> Sent: Friday, December 19, 2014 6:01 AM
>>>>>> To: Xie Shaohui-B21989
>>>>>> Cc: linuxppc-dev@lists.ozlabs.org; devicetree@vger.kernel.org; Medve
>>>>>> Emilian- EMMEDVE1; Liberman Igal-B31950
>>>>>> Subject: Re: [PATCH] [v2] power/fsl: add MDIO dt binding for FMan
>>>>>>
>>>>>> On Thu, 2014-12-18 at 06:53 -0600, Xie Shaohui-B21989 wrote:
>>>>>>> Ping.
>>>>>>>
>>>>>>> Best Regards,
>>>>>>> Shaohui Xie
>>>>>>
>>>>>> I can't put patches in my -next until the merge window closes.
>>>>>>
>>>>>>>>>> +EXAMPLE
>>>>>>>>>> +
>>>>>>>>>> +Example for FMan v2 external MDIO:
>>>>>>>>>> +
>>>>>>>>>> +mdio@f1000 {
>>>>>>>>>> +	compatible = "fsl,fman-xmdio";
>>>>>>>>>> +	reg = <0xf1000 0x1000>;
>>>>>>>>>> +	bus-frequency = <20000>;
>>>>>>>>>> +};
>>>>>>>>>
>>>>>>>>> So the bus frequency is only 20 KHz?  Or is the unit supposed
>>>>>>>>> to be something other than Hz?
>>>>>>>> [S.H] it's only an example, it could be different on real SoCs,
>>>>>>>> but they always lower than the standard one, The standard one is
>>>>>>>> 2.5MHz, I have
>>>>>> to use Hz for it.
>>>>>>
>>>>>> Is there any SoC for which 20 kHz is the right frequency?  I just
>>>>>> want to make sure the example is realistic.
>>>>> [S.H] the clock divider has a limitation that the MAX value it can get
>>>>> on Fman v2 is 255 (0xff, 8 bits), On Fman v3 is 511(0x1ff, 9 bits).
>>>>>
>>>>> So the lowest frequency on Fman v2 is: Fman_clock / (2 * 255), On Fman
>>>>> v3 is: Fman_clock / ((2 * 511) + 1).
>>>>>
>>>>> Take default Fman frequency setting from SDK1.7 as example, the lowest
>>>>> clock used for Fman v2 is 581MHz, The lowest clock for Fman v3 is 600MHz.
>>>>>
>>>>> Then the lowest bus frequency can get is:
>>>>> Fman v2: ~1140KHz
>>>>> Fman v3: ~587KHz
>>>>>
>>>>> 20KHz is not practice, we don't have a suggested value in errata document.
>>>>> For this example, should I post a new version with a value like 1200KHz?
>>>>
>>>> This is different from how you described the problem before.  If the limitation
>>>> is on the divider, rather than the absolute bus frequency, then specifiy the max
>>>> divider.  Or better, since according to the above this correlates with fman
>>>> version, just have the driver know what the max divider is for each fman version.
>>> [S.H] The problem is not the divider has limitation, the problem is a different bus frequency 
>>> Is needed which is lower than the standard, but due to the divider limitation, the lowest
>>> bus frequency also has limitation. i.e. we need to use the divider to get a lower frequency,
>>> but how much lower the value could be is restricted by the divider limitation.
> 
> This is difficult to follow -- are you saying the erratum requires a
> speed that is not achievable?
> 
>> For the purpose of an example in the binding document, I suggest we just
>> stick with the IEEE standard frequency.
> 
> The whole reason for this property existing in the device tree is
> non-standard frequencies.

While the standard claims 2.5 MHz, most MDIO controllers and PHY devices
support frequencies well beyond the standard. Specifying a lower then
the standard frequency for the benefit of some errata is just one side
of this property

>> We can continue this conversation about errata handling when we submit
>> the code relevant to this binding (and the FMan v3 support)
> 
> It affects the binding, so let's discuss it now please.

I think this specific (unpublished yet) errata has less bearing on the
binding then you might believe. This is mostly about providing a
common/default frequency supported by all the devices on some board

Anyway, the above thread about bits and lowest frequency limitation(s)
is not really a problem/limitation. The range of frequencies (dividers)
supported by both controller versions in all the supported SoC(s) allows
responding to this (FMan v3 only) errata just fine


Cheers,

Re: [PATCH] [v2] power/fsl: add MDIO dt binding for FMan

[Scott Wood]

On Mon, 2014-12-22 at 03:37 -0600, Emil Medve wrote:
> Hello Scott,
> 
> 
> On 12/22/2014 02:32 AM, Scott Wood wrote:
> > On Mon, 2014-12-22 at 02:20 -0600, Emil Medve wrote:
> >> For the purpose of an example in the binding document, I suggest we just
> >> stick with the IEEE standard frequency.
> > 
> > The whole reason for this property existing in the device tree is
> > non-standard frequencies.
> 
> While the standard claims 2.5 MHz, most MDIO controllers and PHY devices
> support frequencies well beyond the standard. Specifying a lower then
> the standard frequency for the benefit of some errata is just one side
> of this property

The erratum was (until now) the only claimed reason for it.  If there
are other reasons why one would specify a different frequency (in
particular, that relate to hardware description), please elaborate.

> >> We can continue this conversation about errata handling when we submit
> >> the code relevant to this binding (and the FMan v3 support)
> > 
> > It affects the binding, so let's discuss it now please.
> 
> I think this specific (unpublished yet) errata has less bearing on the
> binding then you might believe. This is mostly about providing a
> common/default frequency supported by all the devices on some board

What reason other than an erratum would there be for the standard
frequency not being supported?

-Scott

Re: [PATCH] [v2] power/fsl: add MDIO dt binding for FMan

[Emil Medve]

Hello Scott,


On 12/22/2014 03:42 AM, Scott Wood wrote:
> On Mon, 2014-12-22 at 03:37 -0600, Emil Medve wrote:
>> Hello Scott,
>>
>>
>> On 12/22/2014 02:32 AM, Scott Wood wrote:
>>> On Mon, 2014-12-22 at 02:20 -0600, Emil Medve wrote:
>>>> For the purpose of an example in the binding document, I suggest we just
>>>> stick with the IEEE standard frequency.
>>>
>>> The whole reason for this property existing in the device tree is
>>> non-standard frequencies.
>>
>> While the standard claims 2.5 MHz, most MDIO controllers and PHY devices
>> support frequencies well beyond the standard. Specifying a lower then
>> the standard frequency for the benefit of some errata is just one side
>> of this property
> 
> The erratum was (until now) the only claimed reason for it.  If there
> are other reasons why one would specify a different frequency (in
> particular, that relate to hardware description), please elaborate.

>From memory, the 1 Gb/s Vitesse PHY(s) we have on some of our DS boards
support 12.5 MHz. I can dig out more specs for specifics on other PHY(s)

2.5 MHz is slow and even more so for high speed interfaces. With both
polling and interrupts (both MDIO and/or PHY) we've noticed (or blamed)
in the past some Ethernet performance issues on this very slowness

As of right now I'm not aware of another way to specify/coordinate the
MDC speed so setting a default (common denominator) in the DT that is
different then the IEEE standard seems ok

>>>> We can continue this conversation about errata handling when we submit
>>>> the code relevant to this binding (and the FMan v3 support)
>>>
>>> It affects the binding, so let's discuss it now please.
>>
>> I think this specific (unpublished yet) errata has less bearing on the
>> binding then you might believe. This is mostly about providing a
>> common/default frequency supported by all the devices on some board
> 
> What reason other than an erratum would there be for the standard
> frequency not being supported?

This is not about not supporting the standard frequency. This is about
the default frequency being different then the standard


Cheers,

Re: [PATCH] [v2] power/fsl: add MDIO dt binding for FMan

[Scott Wood]

On Mon, 2014-12-22 at 05:08 -0600, Emil Medve wrote:
> Hello Scott,
> 
> 
> On 12/22/2014 03:42 AM, Scott Wood wrote:
> > On Mon, 2014-12-22 at 03:37 -0600, Emil Medve wrote:
> >> Hello Scott,
> >>
> >>
> >> On 12/22/2014 02:32 AM, Scott Wood wrote:
> >>> On Mon, 2014-12-22 at 02:20 -0600, Emil Medve wrote:
> >>>> For the purpose of an example in the binding document, I suggest we just
> >>>> stick with the IEEE standard frequency.
> >>>
> >>> The whole reason for this property existing in the device tree is
> >>> non-standard frequencies.
> >>
> >> While the standard claims 2.5 MHz, most MDIO controllers and PHY devices
> >> support frequencies well beyond the standard. Specifying a lower then
> >> the standard frequency for the benefit of some errata is just one side
> >> of this property
> > 
> > The erratum was (until now) the only claimed reason for it.  If there
> > are other reasons why one would specify a different frequency (in
> > particular, that relate to hardware description), please elaborate.
> 
> From memory, the 1 Gb/s Vitesse PHY(s) we have on some of our DS boards
> support 12.5 MHz. I can dig out more specs for specifics on other PHY(s)
> 
> 2.5 MHz is slow and even more so for high speed interfaces. With both
> polling and interrupts (both MDIO and/or PHY) we've noticed (or blamed)
> in the past some Ethernet performance issues on this very slowness
> 
> As of right now I'm not aware of another way to specify/coordinate the
> MDC speed so setting a default (common denominator) in the DT that is
> different then the IEEE standard seems ok
>
> >>>> We can continue this conversation about errata handling when we submit
> >>>> the code relevant to this binding (and the FMan v3 support)
> >>>
> >>> It affects the binding, so let's discuss it now please.
> >>
> >> I think this specific (unpublished yet) errata has less bearing on the
> >> binding then you might believe. This is mostly about providing a
> >> common/default frequency supported by all the devices on some board
> > 
> > What reason other than an erratum would there be for the standard
> > frequency not being supported?
> 
> This is not about not supporting the standard frequency. This is about
> the default frequency being different then the standard

OK, though rather than talk about defaults I'd phrase it as indicating
that a higher frequency than standard is supported, or that a lower
frequency than standard is required.

-Scott

RE: [PATCH] [v2] power/fsl: add MDIO dt binding for FMan

[Shaohui Xie]

DQoNCkJlc3QgUmVnYXJkcywgDQpTaGFvaHVpIFhpZQ0KDQoNCj4gLS0tLS1PcmlnaW5hbCBNZXNz
YWdlLS0tLS0NCj4gRnJvbTogV29vZCBTY290dC1CMDc0MjENCj4gU2VudDogVHVlc2RheSwgRGVj
ZW1iZXIgMjMsIDIwMTQgNToyNiBBTQ0KPiBUbzogTWVkdmUgRW1pbGlhbi1FTU1FRFZFMQ0KPiBD
YzogWGllIFNoYW9odWktQjIxOTg5OyBsaW51eHBwYy1kZXZAbGlzdHMub3psYWJzLm9yZzsNCj4g
ZGV2aWNldHJlZUB2Z2VyLmtlcm5lbC5vcmc7IExpYmVybWFuIElnYWwtQjMxOTUwDQo+IFN1Ympl
Y3Q6IFJlOiBbUEFUQ0hdIFt2Ml0gcG93ZXIvZnNsOiBhZGQgTURJTyBkdCBiaW5kaW5nIGZvciBG
TWFuDQo+IA0KPiBPbiBNb24sIDIwMTQtMTItMjIgYXQgMDU6MDggLTA2MDAsIEVtaWwgTWVkdmUg
d3JvdGU6DQo+ID4gSGVsbG8gU2NvdHQsDQo+ID4NCj4gPg0KPiA+IE9uIDEyLzIyLzIwMTQgMDM6
NDIgQU0sIFNjb3R0IFdvb2Qgd3JvdGU6DQo+ID4gPiBPbiBNb24sIDIwMTQtMTItMjIgYXQgMDM6
MzcgLTA2MDAsIEVtaWwgTWVkdmUgd3JvdGU6DQo+ID4gPj4gSGVsbG8gU2NvdHQsDQo+ID4gPj4N
Cj4gPiA+Pg0KPiA+ID4+IE9uIDEyLzIyLzIwMTQgMDI6MzIgQU0sIFNjb3R0IFdvb2Qgd3JvdGU6
DQo+ID4gPj4+IE9uIE1vbiwgMjAxNC0xMi0yMiBhdCAwMjoyMCAtMDYwMCwgRW1pbCBNZWR2ZSB3
cm90ZToNCj4gPiA+Pj4+IEZvciB0aGUgcHVycG9zZSBvZiBhbiBleGFtcGxlIGluIHRoZSBiaW5k
aW5nIGRvY3VtZW50LCBJIHN1Z2dlc3QNCj4gPiA+Pj4+IHdlIGp1c3Qgc3RpY2sgd2l0aCB0aGUg
SUVFRSBzdGFuZGFyZCBmcmVxdWVuY3kuDQo+ID4gPj4+DQo+ID4gPj4+IFRoZSB3aG9sZSByZWFz
b24gZm9yIHRoaXMgcHJvcGVydHkgZXhpc3RpbmcgaW4gdGhlIGRldmljZSB0cmVlIGlzDQo+ID4g
Pj4+IG5vbi1zdGFuZGFyZCBmcmVxdWVuY2llcy4NCj4gPiA+Pg0KPiA+ID4+IFdoaWxlIHRoZSBz
dGFuZGFyZCBjbGFpbXMgMi41IE1IeiwgbW9zdCBNRElPIGNvbnRyb2xsZXJzIGFuZCBQSFkNCj4g
PiA+PiBkZXZpY2VzIHN1cHBvcnQgZnJlcXVlbmNpZXMgd2VsbCBiZXlvbmQgdGhlIHN0YW5kYXJk
LiBTcGVjaWZ5aW5nIGENCj4gPiA+PiBsb3dlciB0aGVuIHRoZSBzdGFuZGFyZCBmcmVxdWVuY3kg
Zm9yIHRoZSBiZW5lZml0IG9mIHNvbWUgZXJyYXRhIGlzDQo+ID4gPj4ganVzdCBvbmUgc2lkZSBv
ZiB0aGlzIHByb3BlcnR5DQo+ID4gPg0KPiA+ID4gVGhlIGVycmF0dW0gd2FzICh1bnRpbCBub3cp
IHRoZSBvbmx5IGNsYWltZWQgcmVhc29uIGZvciBpdC4gIElmDQo+ID4gPiB0aGVyZSBhcmUgb3Ro
ZXIgcmVhc29ucyB3aHkgb25lIHdvdWxkIHNwZWNpZnkgYSBkaWZmZXJlbnQgZnJlcXVlbmN5DQo+
ID4gPiAoaW4gcGFydGljdWxhciwgdGhhdCByZWxhdGUgdG8gaGFyZHdhcmUgZGVzY3JpcHRpb24p
LCBwbGVhc2UNCj4gZWxhYm9yYXRlLg0KPiA+DQo+ID4gRnJvbSBtZW1vcnksIHRoZSAxIEdiL3Mg
Vml0ZXNzZSBQSFkocykgd2UgaGF2ZSBvbiBzb21lIG9mIG91ciBEUw0KPiA+IGJvYXJkcyBzdXBw
b3J0IDEyLjUgTUh6LiBJIGNhbiBkaWcgb3V0IG1vcmUgc3BlY3MgZm9yIHNwZWNpZmljcyBvbg0K
PiA+IG90aGVyIFBIWShzKQ0KPiA+DQo+ID4gMi41IE1IeiBpcyBzbG93IGFuZCBldmVuIG1vcmUg
c28gZm9yIGhpZ2ggc3BlZWQgaW50ZXJmYWNlcy4gV2l0aCBib3RoDQo+ID4gcG9sbGluZyBhbmQg
aW50ZXJydXB0cyAoYm90aCBNRElPIGFuZC9vciBQSFkpIHdlJ3ZlIG5vdGljZWQgKG9yDQo+ID4g
YmxhbWVkKSBpbiB0aGUgcGFzdCBzb21lIEV0aGVybmV0IHBlcmZvcm1hbmNlIGlzc3VlcyBvbiB0
aGlzIHZlcnkNCj4gPiBzbG93bmVzcw0KPiA+DQo+ID4gQXMgb2YgcmlnaHQgbm93IEknbSBub3Qg
YXdhcmUgb2YgYW5vdGhlciB3YXkgdG8gc3BlY2lmeS9jb29yZGluYXRlIHRoZQ0KPiA+IE1EQyBz
cGVlZCBzbyBzZXR0aW5nIGEgZGVmYXVsdCAoY29tbW9uIGRlbm9taW5hdG9yKSBpbiB0aGUgRFQg
dGhhdCBpcw0KPiA+IGRpZmZlcmVudCB0aGVuIHRoZSBJRUVFIHN0YW5kYXJkIHNlZW1zIG9rDQo+
ID4NCj4gPiA+Pj4+IFdlIGNhbiBjb250aW51ZSB0aGlzIGNvbnZlcnNhdGlvbiBhYm91dCBlcnJh
dGEgaGFuZGxpbmcgd2hlbiB3ZQ0KPiA+ID4+Pj4gc3VibWl0IHRoZSBjb2RlIHJlbGV2YW50IHRv
IHRoaXMgYmluZGluZyAoYW5kIHRoZSBGTWFuIHYzDQo+ID4gPj4+PiBzdXBwb3J0KQ0KPiA+ID4+
Pg0KPiA+ID4+PiBJdCBhZmZlY3RzIHRoZSBiaW5kaW5nLCBzbyBsZXQncyBkaXNjdXNzIGl0IG5v
dyBwbGVhc2UuDQo+ID4gPj4NCj4gPiA+PiBJIHRoaW5rIHRoaXMgc3BlY2lmaWMgKHVucHVibGlz
aGVkIHlldCkgZXJyYXRhIGhhcyBsZXNzIGJlYXJpbmcgb24NCj4gPiA+PiB0aGUgYmluZGluZyB0
aGVuIHlvdSBtaWdodCBiZWxpZXZlLiBUaGlzIGlzIG1vc3RseSBhYm91dCBwcm92aWRpbmcNCj4g
PiA+PiBhIGNvbW1vbi9kZWZhdWx0IGZyZXF1ZW5jeSBzdXBwb3J0ZWQgYnkgYWxsIHRoZSBkZXZp
Y2VzIG9uIHNvbWUNCj4gPiA+PiBib2FyZA0KPiA+ID4NCj4gPiA+IFdoYXQgcmVhc29uIG90aGVy
IHRoYW4gYW4gZXJyYXR1bSB3b3VsZCB0aGVyZSBiZSBmb3IgdGhlIHN0YW5kYXJkDQo+ID4gPiBm
cmVxdWVuY3kgbm90IGJlaW5nIHN1cHBvcnRlZD8NCj4gPg0KPiA+IFRoaXMgaXMgbm90IGFib3V0
IG5vdCBzdXBwb3J0aW5nIHRoZSBzdGFuZGFyZCBmcmVxdWVuY3kuIFRoaXMgaXMgYWJvdXQNCj4g
PiB0aGUgZGVmYXVsdCBmcmVxdWVuY3kgYmVpbmcgZGlmZmVyZW50IHRoZW4gdGhlIHN0YW5kYXJk
DQo+IA0KPiBPSywgdGhvdWdoIHJhdGhlciB0aGFuIHRhbGsgYWJvdXQgZGVmYXVsdHMgSSdkIHBo
cmFzZSBpdCBhcyBpbmRpY2F0aW5nDQo+IHRoYXQgYSBoaWdoZXIgZnJlcXVlbmN5IHRoYW4gc3Rh
bmRhcmQgaXMgc3VwcG9ydGVkLCBvciB0aGF0IGEgbG93ZXINCj4gZnJlcXVlbmN5IHRoYW4gc3Rh
bmRhcmQgaXMgcmVxdWlyZWQuDQpbUy5IXSBiZWxvdyBpcyB0aGUgc3RhdGVtZW50IGluIHYyOg0K
DQorLSBidXMtZnJlcXVlbmN5DQorCQlVc2FnZTogb3B0aW9uYWwNCisJCVZhbHVlIHR5cGU6IDx1
MzI+DQorCQlEZWZpbml0aW9uOiBTcGVjaWZpZXMgZXh0ZXJuYWwgTURJTyBidXMgY2xvY2sgc3Bl
ZWQgd2hpY2ggaXMNCisJCWRpZmZlcmVudCBmcm9tIE1ESU8gc3RhbmRhcmQgMi41TUh6LiBTaG91
bGQgYmUgZGVmaW5lZCBmb3IgU29Dcw0KKwkJb24gd2hpY2ggdGhlIHN0YW5kYXJkIG9uZSBjYW5u
b3Qgd29yay4NCg0KV2hhdCBzaG91bGQgSSByZXBocmFzZSBpdD8gUmVwbGFjZSB0aGUgbGFzdCBz
ZW50ZW5jZSB3aXRoICJTaG91bGQgYmUgZGVmaW5lZA0KRm9yIFNvQ3Mgb24gd2hpY2ggYSBsb3dl
ciBmcmVxdWVuY3kgdGhhbiB0aGUgc3RhbmRhcmQgaXMgcmVxdWlyZWQuIj8NCg0KSG93IGFib3V0
IHRoZSB2YWx1ZSB1c2VkIGluIGV4YW1wbGU/DQpTaG91bGQgMi41TUh6IGJlIHVzZWQgb3IgYSBs
b3dlciBvbmU/DQoNClRoYW5rcyENClNoYW9odWkNCg==

Re: [PATCH] [v2] power/fsl: add MDIO dt binding for FMan

[Scott Wood]

On Tue, 2014-12-23 at 01:35 -0600, Xie Shaohui-B21989 wrote:
> +- bus-frequency
> +		Usage: optional
> +		Value type: <u32>
> +		Definition: Specifies external MDIO bus clock speed which is
> +		different from MDIO standard 2.5MHz. Should be defined for SoCs
> +		on which the standard one cannot work.
> 
> What should I rephrase it? Replace the last sentence with "Should be defined
> For SoCs on which a lower frequency than the standard is required."?

Neither of these work with Emil's scenario of a system that allows a
faster-than-standard speed.

How about: "Definition: Specifies the external MDIO bus clock speed to
be used, if different from the standard 2.5 MHz.  This may be due to the
standard speed being unsupported (e.g. due to a hardware problem), or to
advertise that all relevant components in the system support a faster
speed."

> How about the value used in example?
> Should 2.5MHz be used or a lower one?

If you don't have a realistic example to use, don't put it in the
example at all.  2.5MHz is the worst example to use because that's the
default and there'd be no reason to use the property at all.

-Scott

RE: [PATCH] [v2] power/fsl: add MDIO dt binding for FMan

[Shaohui Xie]

PiAtLS0tLU9yaWdpbmFsIE1lc3NhZ2UtLS0tLQ0KPiBGcm9tOiBXb29kIFNjb3R0LUIwNzQyMQ0K
PiBTZW50OiBUdWVzZGF5LCBEZWNlbWJlciAyMywgMjAxNCA0OjA4IFBNDQo+IFRvOiBYaWUgU2hh
b2h1aS1CMjE5ODkNCj4gQ2M6IE1lZHZlIEVtaWxpYW4tRU1NRURWRTE7IGxpbnV4cHBjLWRldkBs
aXN0cy5vemxhYnMub3JnOw0KPiBkZXZpY2V0cmVlQHZnZXIua2VybmVsLm9yZzsgTGliZXJtYW4g
SWdhbC1CMzE5NTANCj4gU3ViamVjdDogUmU6IFtQQVRDSF0gW3YyXSBwb3dlci9mc2w6IGFkZCBN
RElPIGR0IGJpbmRpbmcgZm9yIEZNYW4NCj4gDQo+IE9uIFR1ZSwgMjAxNC0xMi0yMyBhdCAwMToz
NSAtMDYwMCwgWGllIFNoYW9odWktQjIxOTg5IHdyb3RlOg0KPiA+ICstIGJ1cy1mcmVxdWVuY3kN
Cj4gPiArCQlVc2FnZTogb3B0aW9uYWwNCj4gPiArCQlWYWx1ZSB0eXBlOiA8dTMyPg0KPiA+ICsJ
CURlZmluaXRpb246IFNwZWNpZmllcyBleHRlcm5hbCBNRElPIGJ1cyBjbG9jayBzcGVlZCB3aGlj
aCBpcw0KPiA+ICsJCWRpZmZlcmVudCBmcm9tIE1ESU8gc3RhbmRhcmQgMi41TUh6LiBTaG91bGQg
YmUgZGVmaW5lZCBmb3INCj4gU29Dcw0KPiA+ICsJCW9uIHdoaWNoIHRoZSBzdGFuZGFyZCBvbmUg
Y2Fubm90IHdvcmsuDQo+ID4NCj4gPiBXaGF0IHNob3VsZCBJIHJlcGhyYXNlIGl0PyBSZXBsYWNl
IHRoZSBsYXN0IHNlbnRlbmNlIHdpdGggIlNob3VsZCBiZQ0KPiA+IGRlZmluZWQgRm9yIFNvQ3Mg
b24gd2hpY2ggYSBsb3dlciBmcmVxdWVuY3kgdGhhbiB0aGUgc3RhbmRhcmQgaXMNCj4gcmVxdWly
ZWQuIj8NCj4gDQo+IE5laXRoZXIgb2YgdGhlc2Ugd29yayB3aXRoIEVtaWwncyBzY2VuYXJpbyBv
ZiBhIHN5c3RlbSB0aGF0IGFsbG93cyBhDQo+IGZhc3Rlci10aGFuLXN0YW5kYXJkIHNwZWVkLg0K
PiANCj4gSG93IGFib3V0OiAiRGVmaW5pdGlvbjogU3BlY2lmaWVzIHRoZSBleHRlcm5hbCBNRElP
IGJ1cyBjbG9jayBzcGVlZCB0byBiZQ0KPiB1c2VkLCBpZiBkaWZmZXJlbnQgZnJvbSB0aGUgc3Rh
bmRhcmQgMi41IE1Iei4gIFRoaXMgbWF5IGJlIGR1ZSB0byB0aGUNCj4gc3RhbmRhcmQgc3BlZWQg
YmVpbmcgdW5zdXBwb3J0ZWQgKGUuZy4gZHVlIHRvIGEgaGFyZHdhcmUgcHJvYmxlbSksIG9yIHRv
DQo+IGFkdmVydGlzZSB0aGF0IGFsbCByZWxldmFudCBjb21wb25lbnRzIGluIHRoZSBzeXN0ZW0g
c3VwcG9ydCBhIGZhc3Rlcg0KPiBzcGVlZC4iDQpbUy5IXSBPSy4gSSdsbCB1c2UgdGhpcyBpbiBW
My4NCg0KPiANCj4gPiBIb3cgYWJvdXQgdGhlIHZhbHVlIHVzZWQgaW4gZXhhbXBsZT8NCj4gPiBT
aG91bGQgMi41TUh6IGJlIHVzZWQgb3IgYSBsb3dlciBvbmU/DQo+IA0KPiBJZiB5b3UgZG9uJ3Qg
aGF2ZSBhIHJlYWxpc3RpYyBleGFtcGxlIHRvIHVzZSwgZG9uJ3QgcHV0IGl0IGluIHRoZSBleGFt
cGxlDQo+IGF0IGFsbC4gIDIuNU1IeiBpcyB0aGUgd29yc3QgZXhhbXBsZSB0byB1c2UgYmVjYXVz
ZSB0aGF0J3MgdGhlIGRlZmF1bHQNCj4gYW5kIHRoZXJlJ2QgYmUgbm8gcmVhc29uIHRvIHVzZSB0
aGUgcHJvcGVydHkgYXQgYWxsLg0KW1MuSF0gT0suIFRoZSBWMyB3aWxsIG5vdCBoYXZlIHRoaXMg
aW4gZXhhbXBsZS4NCg0KVGhhbmsgeW91IGFsbCBmb3IgcmV2aWV3aW5nIQ0KU2hhb2h1aQ0K