From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from ozlabs.org (ozlabs.org [103.22.144.67]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 864F61A0EEE for ; Tue, 17 Feb 2015 18:14:51 +1100 (AEDT) Received: from e23smtp07.au.ibm.com (e23smtp07.au.ibm.com [202.81.31.140]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3E5D914029C for ; Tue, 17 Feb 2015 18:14:51 +1100 (AEDT) Received: from /spool/local by e23smtp07.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Tue, 17 Feb 2015 17:14:50 +1000 Received: from d23relay08.au.ibm.com (d23relay08.au.ibm.com [9.185.71.33]) by d23dlp01.au.ibm.com (Postfix) with ESMTP id DAAAD2CE8052 for ; Tue, 17 Feb 2015 18:14:47 +1100 (EST) Received: from d23av04.au.ibm.com (d23av04.au.ibm.com [9.190.235.139]) by d23relay08.au.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id t1H7EduI42860712 for ; Tue, 17 Feb 2015 18:14:47 +1100 Received: from d23av04.au.ibm.com (localhost [127.0.0.1]) by d23av04.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id t1H7EEav027376 for ; Tue, 17 Feb 2015 18:14:14 +1100 From: Gavin Shan To: linuxppc-dev@ozlabs.org Subject: [PATCH RESEND v2 5/7] powerpc/powernv: Introduce pnv_pci_poll() Date: Tue, 17 Feb 2015 18:13:21 +1100 Message-Id: <1424157203-691-6-git-send-email-gwshan@linux.vnet.ibm.com> In-Reply-To: <1424157203-691-1-git-send-email-gwshan@linux.vnet.ibm.com> References: <1424157203-691-1-git-send-email-gwshan@linux.vnet.ibm.com> Cc: bhelgaas@google.com, linux-pci@vger.kernel.org, Gavin Shan List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , We might not get some PCI slot information (e.g. power status) immediately by OPAL API. Instead, opal_pci_poll() need to be called for the required information. The patch introduces pnv_pci_poll(), which bases on original pnv_eeh_poll(), to cover the above case Signed-off-by: Gavin Shan --- arch/powerpc/platforms/powernv/eeh-powernv.c | 28 ++-------------------------- arch/powerpc/platforms/powernv/pci.c | 19 +++++++++++++++++++ arch/powerpc/platforms/powernv/pci.h | 1 + 3 files changed, 22 insertions(+), 26 deletions(-) diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c b/arch/powerpc/platforms/powernv/eeh-powernv.c index eeda6e1..81a9cb2 100644 --- a/arch/powerpc/platforms/powernv/eeh-powernv.c +++ b/arch/powerpc/platforms/powernv/eeh-powernv.c @@ -665,24 +665,6 @@ static int pnv_eeh_get_state(struct eeh_pe *pe, int *delay) return ret; } -static s64 pnv_eeh_poll(uint64_t id) -{ - s64 rc = OPAL_HARDWARE; - - while (1) { - rc = opal_pci_poll(id, NULL); - if (rc <= 0) - break; - - if (system_state < SYSTEM_RUNNING) - udelay(1000 * rc); - else - msleep(rc); - } - - return rc; -} - int pnv_eeh_phb_reset(struct pci_controller *hose, int option) { struct pnv_phb *phb = hose->private_data; @@ -711,10 +693,7 @@ int pnv_eeh_phb_reset(struct pci_controller *hose, int option) /* Issue reset and poll until it's completed */ rc = opal_pci_reset(phb->opal_id, scope, OPAL_ASSERT_RESET); - if (rc > 0) - rc = pnv_eeh_poll(phb->opal_id); - - return (rc == OPAL_SUCCESS) ? 0 : -EIO; + return pnv_pci_poll(phb->opal_id, rc, NULL); } static int __pnv_eeh_bridge_reset(struct pci_dev *dev, int option) @@ -805,10 +784,7 @@ static int pnv_eeh_bridge_reset(struct pci_dev *dev, int option) phb = hose->private_data; id |= (dev->bus->number << 24) | (dev->devfn << 16) | phb->opal_id; rc = opal_pci_reset(id, scope, OPAL_ASSERT_RESET); - if (rc > 0) - pnv_eeh_poll(id); - - return (rc == OPAL_SUCCESS) ? 0 : -EIO; + return pnv_pci_poll(id, rc, NULL); } static int pnv_pci_dev_reset_type(struct pci_dev *pdev, void *data) diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c index c68d508..a0ffae2 100644 --- a/arch/powerpc/platforms/powernv/pci.c +++ b/arch/powerpc/platforms/powernv/pci.c @@ -44,6 +44,25 @@ #define cfg_dbg(fmt...) do { } while(0) //#define cfg_dbg(fmt...) printk(fmt) +int pnv_pci_poll(uint64_t id, int64_t rval, uint8_t *pval) +{ + while (rval > 0) { + rval = opal_pci_poll(id, pval); + if (rval == OPAL_SUCCESS && pval) + rval = opal_pci_poll(id, pval); + + if (rval <= 0) + break; + + if (system_state < SYSTEM_RUNNING) + udelay(1000 * rval); + else + msleep(rval); + } + + return rval ? -EIO : 0; +} + #ifdef CONFIG_PCI_MSI static int pnv_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) { diff --git a/arch/powerpc/platforms/powernv/pci.h b/arch/powerpc/platforms/powernv/pci.h index 18ae927..19f532b 100644 --- a/arch/powerpc/platforms/powernv/pci.h +++ b/arch/powerpc/platforms/powernv/pci.h @@ -194,6 +194,7 @@ struct pnv_phb { extern struct pci_ops pnv_pci_ops; +int pnv_pci_poll(uint64_t id, int64_t rval, uint8_t *pval); void pnv_pci_dump_phb_diag_data(struct pci_controller *hose, unsigned char *log_buff); int pnv_pci_cfg_read(struct device_node *dn, -- 1.8.3.2