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From: Wei Yang <weiyang@linux.vnet.ibm.com>
To: bhelgaas@google.com, benh@au1.ibm.com, gwshan@linux.vnet.ibm.com
Cc: linux-pci@vger.kernel.org, Wei Yang <weiyang@linux.vnet.ibm.com>,
	linuxppc-dev@lists.ozlabs.org
Subject: [PATCH V13 14/21] powerpc/powernv: Allocate struct pnv_ioda_pe iommu_table dynamically
Date: Wed,  4 Mar 2015 13:19:06 +0800	[thread overview]
Message-ID: <1425446353-30513-15-git-send-email-weiyang@linux.vnet.ibm.com> (raw)
In-Reply-To: <1425446353-30513-1-git-send-email-weiyang@linux.vnet.ibm.com>

Current iommu_table of a PE is a static field.  This will have a problem
when iommu_free_table() is called.

Allocate iommu_table dynamically.

Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com>
---
 arch/powerpc/include/asm/iommu.h          |    3 +++
 arch/powerpc/platforms/powernv/pci-ioda.c |   26 ++++++++++++++------------
 arch/powerpc/platforms/powernv/pci.h      |    2 +-
 3 files changed, 18 insertions(+), 13 deletions(-)

diff --git a/arch/powerpc/include/asm/iommu.h b/arch/powerpc/include/asm/iommu.h
index 9cfa370..5574eeb 100644
--- a/arch/powerpc/include/asm/iommu.h
+++ b/arch/powerpc/include/asm/iommu.h
@@ -78,6 +78,9 @@ struct iommu_table {
 	struct iommu_group *it_group;
 #endif
 	void (*set_bypass)(struct iommu_table *tbl, bool enable);
+#ifdef CONFIG_PPC_POWERNV
+	void           *data;
+#endif
 };
 
 /* Pure 2^n version of get_order */
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
index df4a295..1b37066 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -916,6 +916,10 @@ static void pnv_ioda_setup_bus_PE(struct pci_bus *bus, int all)
 		return;
 	}
 
+	pe->tce32_table = kzalloc_node(sizeof(struct iommu_table),
+			GFP_KERNEL, hose->node);
+	pe->tce32_table->data = pe;
+
 	/* Associate it with all child devices */
 	pnv_ioda_setup_same_PE(bus, pe);
 
@@ -1005,7 +1009,7 @@ static void pnv_pci_ioda_dma_dev_setup(struct pnv_phb *phb, struct pci_dev *pdev
 
 	pe = &phb->ioda.pe_array[pdn->pe_number];
 	WARN_ON(get_dma_ops(&pdev->dev) != &dma_iommu_ops);
-	set_iommu_table_base_and_group(&pdev->dev, &pe->tce32_table);
+	set_iommu_table_base_and_group(&pdev->dev, pe->tce32_table);
 }
 
 static int pnv_pci_ioda_dma_set_mask(struct pnv_phb *phb,
@@ -1032,7 +1036,7 @@ static int pnv_pci_ioda_dma_set_mask(struct pnv_phb *phb,
 	} else {
 		dev_info(&pdev->dev, "Using 32-bit DMA via iommu\n");
 		set_dma_ops(&pdev->dev, &dma_iommu_ops);
-		set_iommu_table_base(&pdev->dev, &pe->tce32_table);
+		set_iommu_table_base(&pdev->dev, pe->tce32_table);
 	}
 	*pdev->dev.dma_mask = dma_mask;
 	return 0;
@@ -1069,9 +1073,9 @@ static void pnv_ioda_setup_bus_dma(struct pnv_ioda_pe *pe,
 	list_for_each_entry(dev, &bus->devices, bus_list) {
 		if (add_to_iommu_group)
 			set_iommu_table_base_and_group(&dev->dev,
-						       &pe->tce32_table);
+						       pe->tce32_table);
 		else
-			set_iommu_table_base(&dev->dev, &pe->tce32_table);
+			set_iommu_table_base(&dev->dev, pe->tce32_table);
 
 		if (dev->subordinate)
 			pnv_ioda_setup_bus_dma(pe, dev->subordinate,
@@ -1161,8 +1165,7 @@ static void pnv_pci_ioda2_tce_invalidate(struct pnv_ioda_pe *pe,
 void pnv_pci_ioda_tce_invalidate(struct iommu_table *tbl,
 				 __be64 *startp, __be64 *endp, bool rm)
 {
-	struct pnv_ioda_pe *pe = container_of(tbl, struct pnv_ioda_pe,
-					      tce32_table);
+	struct pnv_ioda_pe *pe = tbl->data;
 	struct pnv_phb *phb = pe->phb;
 
 	if (phb->type == PNV_PHB_IODA1)
@@ -1228,7 +1231,7 @@ static void pnv_pci_ioda_setup_dma_pe(struct pnv_phb *phb,
 	}
 
 	/* Setup linux iommu table */
-	tbl = &pe->tce32_table;
+	tbl = pe->tce32_table;
 	pnv_pci_setup_iommu_table(tbl, addr, TCE32_TABLE_SIZE * segs,
 				  base << 28, IOMMU_PAGE_SHIFT_4K);
 
@@ -1266,8 +1269,7 @@ static void pnv_pci_ioda_setup_dma_pe(struct pnv_phb *phb,
 
 static void pnv_pci_ioda2_set_bypass(struct iommu_table *tbl, bool enable)
 {
-	struct pnv_ioda_pe *pe = container_of(tbl, struct pnv_ioda_pe,
-					      tce32_table);
+	struct pnv_ioda_pe *pe = tbl->data;
 	uint16_t window_id = (pe->pe_number << 1 ) + 1;
 	int64_t rc;
 
@@ -1312,10 +1314,10 @@ static void pnv_pci_ioda2_setup_bypass_pe(struct pnv_phb *phb,
 	pe->tce_bypass_base = 1ull << 59;
 
 	/* Install set_bypass callback for VFIO */
-	pe->tce32_table.set_bypass = pnv_pci_ioda2_set_bypass;
+	pe->tce32_table->set_bypass = pnv_pci_ioda2_set_bypass;
 
 	/* Enable bypass by default */
-	pnv_pci_ioda2_set_bypass(&pe->tce32_table, true);
+	pnv_pci_ioda2_set_bypass(pe->tce32_table, true);
 }
 
 static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb,
@@ -1363,7 +1365,7 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb,
 	}
 
 	/* Setup linux iommu table */
-	tbl = &pe->tce32_table;
+	tbl = pe->tce32_table;
 	pnv_pci_setup_iommu_table(tbl, addr, tce_table_size, 0,
 			IOMMU_PAGE_SHIFT_4K);
 
diff --git a/arch/powerpc/platforms/powernv/pci.h b/arch/powerpc/platforms/powernv/pci.h
index e5b75b2..7317777 100644
--- a/arch/powerpc/platforms/powernv/pci.h
+++ b/arch/powerpc/platforms/powernv/pci.h
@@ -53,7 +53,7 @@ struct pnv_ioda_pe {
 	/* "Base" iommu table, ie, 4K TCEs, 32-bit DMA */
 	int			tce32_seg;
 	int			tce32_segcount;
-	struct iommu_table	tce32_table;
+	struct iommu_table	*tce32_table;
 	phys_addr_t		tce_inval_reg_phys;
 
 	/* 64-bit TCE bypass region */
-- 
1.7.9.5

  parent reply	other threads:[~2015-03-04  5:25 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-04  5:18 [PATCH V13 00/21] Enable SRIOV on Power8 Wei Yang
2015-03-04  5:18 ` [PATCH V13 01/21] PCI: Print more info in sriov_enable() error message Wei Yang
2015-03-04  5:18 ` [PATCH V13 02/21] PCI: Print PF SR-IOV resource that contains all VF(n) BAR space Wei Yang
2015-03-04  5:18 ` [PATCH V13 03/21] PCI: Keep individual VF BAR size in struct pci_sriov Wei Yang
2015-03-04  5:18 ` [PATCH V13 04/21] PCI: Index IOV resources in the conventional style Wei Yang
2015-03-04  5:18 ` [PATCH V13 05/21] PCI: Refresh First VF Offset and VF Stride when updating NumVFs Wei Yang
2015-03-04  5:18 ` [PATCH V13 06/21] PCI: Calculate maximum number of buses required for VFs Wei Yang
2015-03-04  5:18 ` [PATCH V13 07/21] PCI: Export pci_iov_virtfn_bus() and pci_iov_virtfn_devfn() Wei Yang
2015-03-04  5:19 ` [PATCH V13 08/21] PCI: Add pcibios_sriov_enable() and pcibios_sriov_disable() Wei Yang
2015-03-04  5:19 ` [PATCH V13 09/21] PCI: Add pcibios_iov_resource_alignment() interface Wei Yang
2015-03-04  5:19 ` [PATCH V13 10/21] PCI: Consider additional PF's IOV BAR alignment in sizing and assigning Wei Yang
2015-03-04  5:19 ` [PATCH V13 11/21] powerpc/pci: Don't unset PCI resources for VFs Wei Yang
2015-03-04  5:19 ` [PATCH V13 12/21] powerpc/pci: Refactor pci_dn Wei Yang
2015-03-04  5:19 ` [PATCH V13 13/21] powerpc/powernv: Use pci_dn, not device_node, in PCI config accessor Wei Yang
2015-03-04  5:19 ` Wei Yang [this message]
2015-03-04  5:19 ` [PATCH V13 15/21] powerpc/powernv: Reserve additional space for IOV BAR according to the number of total_pe Wei Yang
2015-03-11 13:55   ` Bjorn Helgaas
2015-03-12  1:15     ` Wei Yang
2015-03-19 15:08       ` Bjorn Helgaas
2015-03-19 16:18         ` Wei Yang
2015-03-19 17:54           ` Bjorn Helgaas
2015-03-19 23:49             ` Wei Yang
2015-03-04  5:19 ` [PATCH V13 16/21] powerpc/powernv: Implement pcibios_iov_resource_alignment() on powernv Wei Yang
2015-03-04  5:19 ` [PATCH V13 17/21] powerpc/powernv: Shift VF resource with an offset Wei Yang
2015-03-04  5:19 ` [PATCH V13 18/21] powerpc/powernv: Reserve additional space for IOV BAR, with m64_per_iov supported Wei Yang
2015-03-04  5:19 ` [PATCH V13 19/21] powerpc/powernv: Group VF PE when IOV BAR is big on PHB3 Wei Yang
2015-03-04  5:19 ` [PATCH V13 20/21] powerpc/pci: Remove unused struct pci_dn.pcidev field Wei Yang
2015-03-04  5:19 ` [PATCH V13 21/21] powerpc/pci: Add PCI resource alignment documentation Wei Yang

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