Re: [RFC PATCH 1/2] powerpc: Add a proper syscall for switching endianness

[Benjamin Herrenschmidt <benh@au1.ibm.com>]

On Wed, 2015-03-11 at 11:08 +0530, Anshuman Khandual wrote:
> On 03/10/2015 04:25 PM, Michael Ellerman wrote:
> > On Tue, 2015-03-10 at 20:34 +1100, Benjamin Herrenschmidt wrote:
> >> On Tue, 2015-03-10 at 18:36 +1100, Michael Ellerman wrote:
> >>> We currently have a "special" syscall for switching endianness. This is
> >>> syscall number 0x1ebe, which is handled explicitly in the 64-bit syscall
> >>> exception entry.
> >>>
> >>> That has a few problems, firstly the syscall number is outside of the
> >>> usual range, which confuses various tools. For example strace doesn't
> >>> recognise the syscalls at all.
> >>>
> >>> Secondly it's handled explicitly as a special case in the syscall
> >>> exception entry, which is complicated enough without it.
> >>>
> >>> As a first step toward removing the special syscall, we need to add a
> >>> regular syscall that implements the same functionality.
> >>>
> >>> The logic is simple, it simply toggles the MSR_LE bit in the userspace
> >>> MSR. This is the same as the special syscall, with the caveat that the
> >>> special syscall clobbers fewer registers.
> >>
> >> You can set _TIF_RESTOREALL to force a restore of all the registers on
> >> the way back which should do the job.
> > 
> > Right, I'd forgotten we talked about that.
> > 
> > I'll try that tomorrow.
> 
> The test fails when we add set_thread_flag(TIF_RESTOREALL) after the MSR flip.
> Though the test passes with the original patch.

We also need to wrap the syscall like we do for fork() etc... to
save_nvgpr's.

Cheers,
Ben.