* [1/3][PATCH][v2] Device Tree bindings for Freescale TDM controller
@ 2015-04-02 10:47 sandeep
2015-04-02 11:55 ` Laurentiu Tudor
2015-04-03 1:14 ` Scott Wood
0 siblings, 2 replies; 6+ messages in thread
From: sandeep @ 2015-04-02 10:47 UTC (permalink / raw)
To: linuxppc-dev
From: Sandeep Singh <sandeep@freescale.com>
This controller is available on many Freescale SOCs like MPC8315, P1020, P1010,
P1022 and P1024
Signed-off-by: Sandeep Singh <Sandeep@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
---
Documentation/devicetree/bindings/tdm/fsl-tdm.txt | 65 +++++++++++++++++++++
1 files changed, 65 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/tdm/fsl-tdm.txt
diff --git a/Documentation/devicetree/bindings/tdm/fsl-tdm.txt b/Documentation/devicetree/bindings/tdm/fsl-tdm.txt
new file mode 100644
index 0000000..1258b89
--- /dev/null
+++ b/Documentation/devicetree/bindings/tdm/fsl-tdm.txt
@@ -0,0 +1,65 @@
+=====================================================================
+TDM Device Tree Binding
+Copyright (C) 2012 Freescale Semiconductor Inc.
+
+NOTE: The bindings described in this document are preliminary
+and subject to change.
+
+=====================================================================
+TDM (Time Division Multiplexing)
+
+DESCRIPTION
+
+The TDM is full duplex serial port designed to allow various devices including
+digital signal processors (DSPs) to communicate with a variety of serial devices
+including industry standard framers, codecs, other DSPs and microprocessors.
+
+The below properties describe the device tree bindings for Freescale TDM
+controller.
+This TDM controller is available on various Freescale Processors like
+MPC8313, P1020, P1022 and P1010.
+
+PROPERTIES
+
+ - compatible
+ Usage: required
+ Value type: <string>
+ Definition: Should contain "fsl,tdm1.0".
+
+ - reg
+ Usage: required
+ Definition: A standard property. The first reg specifier describes the
+ TDM registers, and the second describes the TDM DMAC registers.
+
+ - clock-frequency
+ Usage: optional
+ Value type: <u32 or u64>
+ Definition: The frequency at which the TDM block is operating.
+
+ - interrupts
+ Usage: required
+ Definition: Definition: Two interrupt specifiers. The first is TDM
+ error, and the second is TDM EMAC.
+
+ - phy-handle
+ Usage: optional
+ Value type: <phandle>
+ Definition: Phandle of the line controller node or framer node eg. SLIC,
+ E1/T1 etc.
+
+ - fsl,max-time-slots
+ Usage: required
+ Value type: <u32>
+ Definition: Maximum number of 8-bit time slots in one TDM frame.
+ This is the maximum number which TDM hardware supports.
+
+EXAMPLE
+
+ tdm@16000 {
+ compatible = "fsl,tdm1.0";
+ reg = <0x16000 0x200 0x2c000 0x2000>;
+ clock-frequency = <0>;
+ interrupts = <16 8 62 8>;
+ phy-handle = <&zarlink1>;
+ fsl,max-time-slots = <128>;
+ };
--
1.7.6.GIT
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [1/3][PATCH][v2] Device Tree bindings for Freescale TDM controller
2015-04-02 10:47 [1/3][PATCH][v2] Device Tree bindings for Freescale TDM controller sandeep
@ 2015-04-02 11:55 ` Laurentiu Tudor
2015-04-15 15:00 ` sandeep
2015-04-03 1:14 ` Scott Wood
1 sibling, 1 reply; 6+ messages in thread
From: Laurentiu Tudor @ 2015-04-02 11:55 UTC (permalink / raw)
To: linuxppc-dev
Hi Sandeep,
Small nit inside.
On 04/02/2015 01:47 PM, sandeep@freescale.com wrote:
> From: Sandeep Singh <sandeep@freescale.com>
>
> This controller is available on many Freescale SOCs like MPC8315, P1020, P1010,
> P1022 and P1024
>
> Signed-off-by: Sandeep Singh <Sandeep@freescale.com>
> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
> ---
> Documentation/devicetree/bindings/tdm/fsl-tdm.txt | 65 +++++++++++++++++++++
> 1 files changed, 65 insertions(+), 0 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/tdm/fsl-tdm.txt
>
> diff --git a/Documentation/devicetree/bindings/tdm/fsl-tdm.txt b/Documentation/devicetree/bindings/tdm/fsl-tdm.txt
> new file mode 100644
> index 0000000..1258b89
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/tdm/fsl-tdm.txt
> @@ -0,0 +1,65 @@
> +=====================================================================
> +TDM Device Tree Binding
> +Copyright (C) 2012 Freescale Semiconductor Inc.
> +
> +NOTE: The bindings described in this document are preliminary
> +and subject to change.
> +
> +=====================================================================
> +TDM (Time Division Multiplexing)
> +
> +DESCRIPTION
> +
> +The TDM is full duplex serial port designed to allow various devices including
> +digital signal processors (DSPs) to communicate with a variety of serial devices
> +including industry standard framers, codecs, other DSPs and microprocessors.
> +
> +The below properties describe the device tree bindings for Freescale TDM
> +controller.
> +This TDM controller is available on various Freescale Processors like
> +MPC8313, P1020, P1022 and P1010.
> +
> +PROPERTIES
> +
> + - compatible
> + Usage: required
> + Value type: <string>
> + Definition: Should contain "fsl,tdm1.0".
> +
> + - reg
> + Usage: required
> + Definition: A standard property. The first reg specifier describes the
> + TDM registers, and the second describes the TDM DMAC registers.
> +
> + - clock-frequency
> + Usage: optional
> + Value type: <u32 or u64>
> + Definition: The frequency at which the TDM block is operating.
> +
> + - interrupts
> + Usage: required
> + Definition: Definition: Two interrupt specifiers. The first is TDM
Extra "Definition:" here.
---
Best Regards, Laurentiu
^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: [1/3][PATCH][v2] Device Tree bindings for Freescale TDM controller
2015-04-02 11:55 ` Laurentiu Tudor
@ 2015-04-15 15:00 ` sandeep
0 siblings, 0 replies; 6+ messages in thread
From: sandeep @ 2015-04-15 15:00 UTC (permalink / raw)
To: Laurentiu.Tudor@freescale.com, linuxppc-dev@lists.ozlabs.org
SGkgTGF1cmVudGl1LA0KDQpUaGFua3MgZm9yIHlvdXIgY29tbWVudHMuIFJlcGx5IGlubGluZS4N
Cg0KUmVnYXJkcw0KU2FuZGVlcA0KDQo+IC0tLS0tT3JpZ2luYWwgTWVzc2FnZS0tLS0tDQo+IEZy
b206IExpbnV4cHBjLWRldiBbbWFpbHRvOmxpbnV4cHBjLWRldi0NCj4gYm91bmNlcytzYW5kZWVw
PWZyZWVzY2FsZS5jb21AbGlzdHMub3psYWJzLm9yZ10gT24gQmVoYWxmIE9mIExhdXJlbnRpdSBU
dWRvcg0KPiBTZW50OiBUaHVyc2RheSwgQXByaWwgMDIsIDIwMTUgNToyNiBQTQ0KPiBUbzogbGlu
dXhwcGMtZGV2QGxpc3RzLm96bGFicy5vcmcNCj4gU3ViamVjdDogUmU6IFsxLzNdW1BBVENIXVt2
Ml0gRGV2aWNlIFRyZWUgYmluZGluZ3MgZm9yIEZyZWVzY2FsZSBURE0gY29udHJvbGxlcg0KPiAN
Cj4gSGkgU2FuZGVlcCwNCj4gDQo+IFNtYWxsIG5pdCBpbnNpZGUuDQo+IA0KPiBPbiAwNC8wMi8y
MDE1IDAxOjQ3IFBNLCBzYW5kZWVwQGZyZWVzY2FsZS5jb20gd3JvdGU6DQo+ID4gRnJvbTogU2Fu
ZGVlcCBTaW5naCA8c2FuZGVlcEBmcmVlc2NhbGUuY29tPg0KPiA+DQo+ID4gVGhpcyBjb250cm9s
bGVyIGlzIGF2YWlsYWJsZSBvbiBtYW55IEZyZWVzY2FsZSBTT0NzIGxpa2UgTVBDODMxNSwNCj4g
PiBQMTAyMCwgUDEwMTAsDQo+ID4gUDEwMjIgYW5kIFAxMDI0DQo+ID4NCj4gPiBTaWduZWQtb2Zm
LWJ5OiBTYW5kZWVwIFNpbmdoIDxTYW5kZWVwQGZyZWVzY2FsZS5jb20+DQo+ID4gU2lnbmVkLW9m
Zi1ieTogUG9vbmFtIEFnZ3J3YWwgPHBvb25hbS5hZ2dyd2FsQGZyZWVzY2FsZS5jb20+DQo+ID4g
LS0tDQo+ID4gIERvY3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy90ZG0vZnNsLXRkbS50
eHQgfCAgIDY1DQo+ICsrKysrKysrKysrKysrKysrKysrKw0KPiA+ICAxIGZpbGVzIGNoYW5nZWQs
IDY1IGluc2VydGlvbnMoKyksIDAgZGVsZXRpb25zKC0pICBjcmVhdGUgbW9kZSAxMDA2NDQNCj4g
PiBEb2N1bWVudGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3MvdGRtL2ZzbC10ZG0udHh0DQo+ID4N
Cj4gPiBkaWZmIC0tZ2l0IGEvRG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVlL2JpbmRpbmdzL3RkbS9m
c2wtdGRtLnR4dA0KPiA+IGIvRG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVlL2JpbmRpbmdzL3RkbS9m
c2wtdGRtLnR4dA0KPiA+IG5ldyBmaWxlIG1vZGUgMTAwNjQ0DQo+ID4gaW5kZXggMDAwMDAwMC4u
MTI1OGI4OQ0KPiA+IC0tLSAvZGV2L251bGwNCj4gPiArKysgYi9Eb2N1bWVudGF0aW9uL2Rldmlj
ZXRyZWUvYmluZGluZ3MvdGRtL2ZzbC10ZG0udHh0DQo+ID4gQEAgLTAsMCArMSw2NSBAQA0KPiA+
DQo+ICs9PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09
PT09PT09PT09PT09PQ0KPiA9PT09DQo+ID4gK1RETSBEZXZpY2UgVHJlZSBCaW5kaW5nDQo+ID4g
K0NvcHlyaWdodCAoQykgMjAxMiBGcmVlc2NhbGUgU2VtaWNvbmR1Y3RvciBJbmMuDQo+ID4gKw0K
PiA+ICtOT1RFOiBUaGUgYmluZGluZ3MgZGVzY3JpYmVkIGluIHRoaXMgZG9jdW1lbnQgYXJlIHBy
ZWxpbWluYXJ5IGFuZA0KPiA+ICtzdWJqZWN0IHRvIGNoYW5nZS4NCj4gPiArDQo+ID4NCj4gKz09
PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09
PT09PT09DQo+ID09PT0NCj4gPiArVERNIChUaW1lIERpdmlzaW9uIE11bHRpcGxleGluZykNCj4g
PiArDQo+ID4gK0RFU0NSSVBUSU9ODQo+ID4gKw0KPiA+ICtUaGUgVERNIGlzIGZ1bGwgZHVwbGV4
IHNlcmlhbCBwb3J0IGRlc2lnbmVkIHRvIGFsbG93IHZhcmlvdXMgZGV2aWNlcw0KPiA+ICtpbmNs
dWRpbmcgZGlnaXRhbCBzaWduYWwgcHJvY2Vzc29ycyAoRFNQcykgdG8gY29tbXVuaWNhdGUgd2l0
aCBhDQo+ID4gK3ZhcmlldHkgb2Ygc2VyaWFsIGRldmljZXMgaW5jbHVkaW5nIGluZHVzdHJ5IHN0
YW5kYXJkIGZyYW1lcnMsIGNvZGVjcywgb3RoZXINCj4gRFNQcyBhbmQgbWljcm9wcm9jZXNzb3Jz
Lg0KPiA+ICsNCj4gPiArVGhlIGJlbG93IHByb3BlcnRpZXMgZGVzY3JpYmUgdGhlIGRldmljZSB0
cmVlIGJpbmRpbmdzIGZvciBGcmVlc2NhbGUNCj4gPiArVERNIGNvbnRyb2xsZXIuDQo+ID4gK1Ro
aXMgVERNIGNvbnRyb2xsZXIgaXMgYXZhaWxhYmxlIG9uIHZhcmlvdXMgRnJlZXNjYWxlIFByb2Nl
c3NvcnMgbGlrZQ0KPiA+ICtNUEM4MzEzLCBQMTAyMCwgUDEwMjIgYW5kIFAxMDEwLg0KPiA+ICsN
Cj4gPiArUFJPUEVSVElFUw0KPiA+ICsNCj4gPiArICAtIGNvbXBhdGlibGUNCj4gPiArICAgICAg
VXNhZ2U6IHJlcXVpcmVkDQo+ID4gKyAgICAgIFZhbHVlIHR5cGU6IDxzdHJpbmc+DQo+ID4gKyAg
ICAgIERlZmluaXRpb246IFNob3VsZCBjb250YWluICJmc2wsdGRtMS4wIi4NCj4gPiArDQo+ID4g
KyAgLSByZWcNCj4gPiArICAgICAgVXNhZ2U6IHJlcXVpcmVkDQo+ID4gKyAgICAgIERlZmluaXRp
b246IEEgc3RhbmRhcmQgcHJvcGVydHkuIFRoZSBmaXJzdCByZWcgc3BlY2lmaWVyIGRlc2NyaWJl
cyB0aGUNCj4gPiArICAgICAgICAgIFRETSByZWdpc3RlcnMsIGFuZCB0aGUgc2Vjb25kIGRlc2Ny
aWJlcyB0aGUgVERNIERNQUMgcmVnaXN0ZXJzLg0KPiA+ICsNCj4gPiArICAtIGNsb2NrLWZyZXF1
ZW5jeQ0KPiA+ICsgICAgICBVc2FnZTogb3B0aW9uYWwNCj4gPiArICAgICAgVmFsdWUgdHlwZTog
PHUzMiBvciB1NjQ+DQo+ID4gKyAgICAgIERlZmluaXRpb246IFRoZSBmcmVxdWVuY3kgYXQgd2hp
Y2ggdGhlIFRETSBibG9jayBpcyBvcGVyYXRpbmcuDQo+ID4gKw0KPiA+ICsgIC0gaW50ZXJydXB0
cw0KPiA+ICsgICAgICBVc2FnZTogcmVxdWlyZWQNCj4gPiArICAgICAgRGVmaW5pdGlvbjogRGVm
aW5pdGlvbjogVHdvIGludGVycnVwdCBzcGVjaWZpZXJzLiAgVGhlIGZpcnN0IGlzDQo+ID4gKyBU
RE0NCj4gDQo+IEV4dHJhICJEZWZpbml0aW9uOiIgaGVyZS4NCltTYW5kZWVwXSBZZXMsIHdpbGwg
cmVtb3ZlIGl0Lg0KPiANCj4gLS0tDQo+IEJlc3QgUmVnYXJkcywgTGF1cmVudGl1DQo+IF9fX19f
X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fDQo+IExpbnV4cHBjLWRl
diBtYWlsaW5nIGxpc3QNCj4gTGludXhwcGMtZGV2QGxpc3RzLm96bGFicy5vcmcNCj4gaHR0cHM6
Ly9saXN0cy5vemxhYnMub3JnL2xpc3RpbmZvL2xpbnV4cHBjLWRldg0K
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [1/3][PATCH][v2] Device Tree bindings for Freescale TDM controller
2015-04-02 10:47 [1/3][PATCH][v2] Device Tree bindings for Freescale TDM controller sandeep
2015-04-02 11:55 ` Laurentiu Tudor
@ 2015-04-03 1:14 ` Scott Wood
2015-04-14 13:50 ` sandeep
1 sibling, 1 reply; 6+ messages in thread
From: Scott Wood @ 2015-04-03 1:14 UTC (permalink / raw)
To: sandeep; +Cc: linuxppc-dev
On Thu, 2015-04-02 at 16:17 +0530, sandeep@freescale.com wrote:
> From: Sandeep Singh <sandeep@freescale.com>
>
> This controller is available on many Freescale SOCs like MPC8315, P1020, P1010,
> P1022 and P1024
>
> Signed-off-by: Sandeep Singh <Sandeep@freescale.com>
> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
> ---
> Documentation/devicetree/bindings/tdm/fsl-tdm.txt | 65 +++++++++++++++++++++
> 1 files changed, 65 insertions(+), 0 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/tdm/fsl-tdm.txt
Add devicetree@vger.kernel.org to CC for device tree patches.
> diff --git a/Documentation/devicetree/bindings/tdm/fsl-tdm.txt b/Documentation/devicetree/bindings/tdm/fsl-tdm.txt
> new file mode 100644
> index 0000000..1258b89
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/tdm/fsl-tdm.txt
> @@ -0,0 +1,65 @@
> +=====================================================================
> +TDM Device Tree Binding
> +Copyright (C) 2012 Freescale Semiconductor Inc.
> +
> +NOTE: The bindings described in this document are preliminary
> +and subject to change.
Get rid of this note. Bindings are expected to be stable ABI once
merged.
> +=====================================================================
> +TDM (Time Division Multiplexing)
> +
> +DESCRIPTION
> +
> +The TDM is full duplex serial port designed to allow various devices including
> +digital signal processors (DSPs) to communicate with a variety of serial devices
> +including industry standard framers, codecs, other DSPs and microprocessors.
> +
> +The below properties describe the device tree bindings for Freescale TDM
> +controller.
> +This TDM controller is available on various Freescale Processors like
> +MPC8313, P1020, P1022 and P1010.
> +
> +PROPERTIES
> +
> + - compatible
> + Usage: required
> + Value type: <string>
> + Definition: Should contain "fsl,tdm1.0".
What does 1.0 refer to? Is the TDM block identical on all the chips
that currently have it? Is this a real version number scheme (public or
otherwise) or something made up for software?
> + - reg
> + Usage: required
> + Definition: A standard property. The first reg specifier describes the
> + TDM registers, and the second describes the TDM DMAC registers.
> +
> + - clock-frequency
> + Usage: optional
> + Value type: <u32 or u64>
> + Definition: The frequency at which the TDM block is operating.
It'd be nice if new bindings used clock nodes rather than relying on
U-Boot fixups.
> + - interrupts
> + Usage: required
> + Definition: Definition: Two interrupt specifiers. The first is TDM
> + error, and the second is TDM EMAC.
> +
> + - phy-handle
> + Usage: optional
> + Value type: <phandle>
> + Definition: Phandle of the line controller node or framer node eg. SLIC,
> + E1/T1 etc.
> +
> + - fsl,max-time-slots
> + Usage: required
> + Value type: <u32>
> + Definition: Maximum number of 8-bit time slots in one TDM frame.
> + This is the maximum number which TDM hardware supports.
> +
> +EXAMPLE
> +
> + tdm@16000 {
> + compatible = "fsl,tdm1.0";
> + reg = <0x16000 0x200 0x2c000 0x2000>;
> + clock-frequency = <0>;
> + interrupts = <16 8 62 8>;
> + phy-handle = <&zarlink1>;
> + fsl,max-time-slots = <128>;
> + };
The example refers to a "zarlink1" node but it is not present. What
does a "line controller or framer node" look like?
-Scott
^ permalink raw reply [flat|nested] 6+ messages in thread* RE: [1/3][PATCH][v2] Device Tree bindings for Freescale TDM controller
2015-04-03 1:14 ` Scott Wood
@ 2015-04-14 13:50 ` sandeep
2015-04-14 20:17 ` Scott Wood
0 siblings, 1 reply; 6+ messages in thread
From: sandeep @ 2015-04-14 13:50 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev@ozlabs.org
SGkgU2NvdHQsDQoNClRoYW5rcyBmb3IgeW91ciBjb21tZW50cy4gUmVwbHkgaW5saW5lLg0KDQpS
ZWdhcmRzDQpTYW5kZWVwDQoNCj4gLS0tLS1PcmlnaW5hbCBNZXNzYWdlLS0tLS0NCj4gRnJvbTog
V29vZCBTY290dC1CMDc0MjENCj4gU2VudDogRnJpZGF5LCBBcHJpbCAwMywgMjAxNSA2OjQ1IEFN
DQo+IFRvOiBTaW5naCBTYW5kZWVwLUIzNzQwMA0KPiBDYzogbGludXhwcGMtZGV2QG96bGFicy5v
cmcNCj4gU3ViamVjdDogUmU6IFsxLzNdW1BBVENIXVt2Ml0gRGV2aWNlIFRyZWUgYmluZGluZ3Mg
Zm9yIEZyZWVzY2FsZSBURE0gY29udHJvbGxlcg0KPiANCj4gT24gVGh1LCAyMDE1LTA0LTAyIGF0
IDE2OjE3ICswNTMwLCBzYW5kZWVwQGZyZWVzY2FsZS5jb20gd3JvdGU6DQo+ID4gRnJvbTogU2Fu
ZGVlcCBTaW5naCA8c2FuZGVlcEBmcmVlc2NhbGUuY29tPg0KPiA+DQo+ID4gVGhpcyBjb250cm9s
bGVyIGlzIGF2YWlsYWJsZSBvbiBtYW55IEZyZWVzY2FsZSBTT0NzIGxpa2UgTVBDODMxNSwNCj4g
PiBQMTAyMCwgUDEwMTAsDQo+ID4gUDEwMjIgYW5kIFAxMDI0DQo+ID4NCj4gPiBTaWduZWQtb2Zm
LWJ5OiBTYW5kZWVwIFNpbmdoIDxTYW5kZWVwQGZyZWVzY2FsZS5jb20+DQo+ID4gU2lnbmVkLW9m
Zi1ieTogUG9vbmFtIEFnZ3J3YWwgPHBvb25hbS5hZ2dyd2FsQGZyZWVzY2FsZS5jb20+DQo+ID4g
LS0tDQo+ID4gIERvY3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy90ZG0vZnNsLXRkbS50
eHQgfCAgIDY1DQo+ICsrKysrKysrKysrKysrKysrKysrKw0KPiA+ICAxIGZpbGVzIGNoYW5nZWQs
IDY1IGluc2VydGlvbnMoKyksIDAgZGVsZXRpb25zKC0pICBjcmVhdGUgbW9kZSAxMDA2NDQNCj4g
PiBEb2N1bWVudGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3MvdGRtL2ZzbC10ZG0udHh0DQo+IA0K
PiBBZGQgZGV2aWNldHJlZUB2Z2VyLmtlcm5lbC5vcmcgdG8gQ0MgZm9yIGRldmljZSB0cmVlIHBh
dGNoZXMuDQo+IA0KPiANCj4gPiBkaWZmIC0tZ2l0IGEvRG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVl
L2JpbmRpbmdzL3RkbS9mc2wtdGRtLnR4dA0KPiA+IGIvRG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVl
L2JpbmRpbmdzL3RkbS9mc2wtdGRtLnR4dA0KPiA+IG5ldyBmaWxlIG1vZGUgMTAwNjQ0DQo+ID4g
aW5kZXggMDAwMDAwMC4uMTI1OGI4OQ0KPiA+IC0tLSAvZGV2L251bGwNCj4gPiArKysgYi9Eb2N1
bWVudGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3MvdGRtL2ZzbC10ZG0udHh0DQo+ID4gQEAgLTAs
MCArMSw2NSBAQA0KPiA+DQo+ICs9PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09
PT09PT09PT09PT09PT09PT09PT09PT09PT09PQ0KPiA9PT09DQo+ID4gK1RETSBEZXZpY2UgVHJl
ZSBCaW5kaW5nDQo+ID4gK0NvcHlyaWdodCAoQykgMjAxMiBGcmVlc2NhbGUgU2VtaWNvbmR1Y3Rv
ciBJbmMuDQo+ID4gKw0KPiA+ICtOT1RFOiBUaGUgYmluZGluZ3MgZGVzY3JpYmVkIGluIHRoaXMg
ZG9jdW1lbnQgYXJlIHByZWxpbWluYXJ5IGFuZA0KPiA+ICtzdWJqZWN0IHRvIGNoYW5nZS4NCj4g
DQo+IEdldCByaWQgb2YgdGhpcyBub3RlLiAgQmluZGluZ3MgYXJlIGV4cGVjdGVkIHRvIGJlIHN0
YWJsZSBBQkkgb25jZSBtZXJnZWQuDQo+IA0KPiA+DQo+ICs9PT09PT09PT09PT09PT09PT09PT09
PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PQ0KPiA9PT09DQo+ID4g
K1RETSAoVGltZSBEaXZpc2lvbiBNdWx0aXBsZXhpbmcpDQo+ID4gKw0KPiA+ICtERVNDUklQVElP
Tg0KPiA+ICsNCj4gPiArVGhlIFRETSBpcyBmdWxsIGR1cGxleCBzZXJpYWwgcG9ydCBkZXNpZ25l
ZCB0byBhbGxvdyB2YXJpb3VzIGRldmljZXMNCj4gPiAraW5jbHVkaW5nIGRpZ2l0YWwgc2lnbmFs
IHByb2Nlc3NvcnMgKERTUHMpIHRvIGNvbW11bmljYXRlIHdpdGggYQ0KPiA+ICt2YXJpZXR5IG9m
IHNlcmlhbCBkZXZpY2VzIGluY2x1ZGluZyBpbmR1c3RyeSBzdGFuZGFyZCBmcmFtZXJzLCBjb2Rl
Y3MsIG90aGVyDQo+IERTUHMgYW5kIG1pY3JvcHJvY2Vzc29ycy4NCj4gPiArDQo+ID4gK1RoZSBi
ZWxvdyBwcm9wZXJ0aWVzIGRlc2NyaWJlIHRoZSBkZXZpY2UgdHJlZSBiaW5kaW5ncyBmb3IgRnJl
ZXNjYWxlDQo+ID4gK1RETSBjb250cm9sbGVyLg0KPiA+ICtUaGlzIFRETSBjb250cm9sbGVyIGlz
IGF2YWlsYWJsZSBvbiB2YXJpb3VzIEZyZWVzY2FsZSBQcm9jZXNzb3JzIGxpa2UNCj4gPiArTVBD
ODMxMywgUDEwMjAsIFAxMDIyIGFuZCBQMTAxMC4NCj4gPiArDQo+ID4gK1BST1BFUlRJRVMNCj4g
PiArDQo+ID4gKyAgLSBjb21wYXRpYmxlDQo+ID4gKyAgICAgIFVzYWdlOiByZXF1aXJlZA0KPiA+
ICsgICAgICBWYWx1ZSB0eXBlOiA8c3RyaW5nPg0KPiA+ICsgICAgICBEZWZpbml0aW9uOiBTaG91
bGQgY29udGFpbiAiZnNsLHRkbTEuMCIuDQo+IA0KPiBXaGF0IGRvZXMgMS4wIHJlZmVyIHRvPyAg
SXMgdGhlIFRETSBibG9jayBpZGVudGljYWwgb24gYWxsIHRoZSBjaGlwcyB0aGF0IGN1cnJlbnRs
eQ0KPiBoYXZlIGl0PyAgSXMgdGhpcyBhIHJlYWwgdmVyc2lvbiBudW1iZXIgc2NoZW1lIChwdWJs
aWMgb3INCj4gb3RoZXJ3aXNlKSBvciBzb21ldGhpbmcgbWFkZSB1cCBmb3Igc29mdHdhcmU/DQpb
U2FuZGVlcF0gU3RhcmxpdGUgVERNIGJsb2NrIGlzIGlkZW50aWNhbCBvbiBhbGwgdGhlIGNoaXBz
LiBUaGlzIGlzIGEgc29mdHdhcmUgb25seSB2ZXJzaW9uLg0KPiANCj4gPiArICAtIHJlZw0KPiA+
ICsgICAgICBVc2FnZTogcmVxdWlyZWQNCj4gPiArICAgICAgRGVmaW5pdGlvbjogQSBzdGFuZGFy
ZCBwcm9wZXJ0eS4gVGhlIGZpcnN0IHJlZyBzcGVjaWZpZXIgZGVzY3JpYmVzIHRoZQ0KPiA+ICsg
ICAgICAgICAgVERNIHJlZ2lzdGVycywgYW5kIHRoZSBzZWNvbmQgZGVzY3JpYmVzIHRoZSBURE0g
RE1BQyByZWdpc3RlcnMuDQo+ID4gKw0KPiA+ICsgIC0gY2xvY2stZnJlcXVlbmN5DQo+ID4gKyAg
ICAgIFVzYWdlOiBvcHRpb25hbA0KPiA+ICsgICAgICBWYWx1ZSB0eXBlOiA8dTMyIG9yIHU2ND4N
Cj4gPiArICAgICAgRGVmaW5pdGlvbjogVGhlIGZyZXF1ZW5jeSBhdCB3aGljaCB0aGUgVERNIGJs
b2NrIGlzIG9wZXJhdGluZy4NCj4gDQo+IEl0J2QgYmUgbmljZSBpZiBuZXcgYmluZGluZ3MgdXNl
ZCBjbG9jayBub2RlcyByYXRoZXIgdGhhbiByZWx5aW5nIG9uIFUtQm9vdCBmaXh1cHMuDQpbU2Fu
ZGVlcF0gVGhpcyBmaWVsZCBpcyBub3QgY3VycmVudGx5IHVzZWQsIGJ1dCBpcyBwbGFubmVkIHRv
IGJlIHVzZWQgaW4gZnV0dXJlLg0KPiANCj4gPiArICAtIGludGVycnVwdHMNCj4gPiArICAgICAg
VXNhZ2U6IHJlcXVpcmVkDQo+ID4gKyAgICAgIERlZmluaXRpb246IERlZmluaXRpb246IFR3byBp
bnRlcnJ1cHQgc3BlY2lmaWVycy4gIFRoZSBmaXJzdCBpcyBURE0NCj4gPiArICAgICAgICAgIGVy
cm9yLCBhbmQgdGhlIHNlY29uZCBpcyBURE0gRU1BQy4NCj4gPiArDQo+ID4gKyAgLSBwaHktaGFu
ZGxlDQo+ID4gKyAgICAgIFVzYWdlOiBvcHRpb25hbA0KPiA+ICsgICAgICBWYWx1ZSB0eXBlOiA8
cGhhbmRsZT4NCj4gPiArICAgICAgRGVmaW5pdGlvbjogUGhhbmRsZSBvZiB0aGUgbGluZSBjb250
cm9sbGVyIG5vZGUgb3IgZnJhbWVyIG5vZGUgZWcuIFNMSUMsDQo+ID4gKyAgICAgICAgICBFMS9U
MSBldGMuDQo+ID4gKw0KPiA+ICsgIC0gZnNsLG1heC10aW1lLXNsb3RzDQo+ID4gKyAgICAgIFVz
YWdlOiByZXF1aXJlZA0KPiA+ICsgICAgICBWYWx1ZSB0eXBlOiA8dTMyPg0KPiA+ICsgICAgICBE
ZWZpbml0aW9uOiBNYXhpbXVtIG51bWJlciBvZiA4LWJpdCB0aW1lIHNsb3RzIGluIG9uZSBURE0g
ZnJhbWUuDQo+ID4gKyAgICAgICAgICBUaGlzIGlzIHRoZSBtYXhpbXVtIG51bWJlciB3aGljaCBU
RE0gaGFyZHdhcmUgc3VwcG9ydHMuDQo+ID4gKw0KPiA+ICtFWEFNUExFDQo+ID4gKw0KPiA+ICsJ
dGRtQDE2MDAwIHsNCj4gPiArCQljb21wYXRpYmxlID0gImZzbCx0ZG0xLjAiOw0KPiA+ICsJCXJl
ZyA9IDwweDE2MDAwIDB4MjAwIDB4MmMwMDAgMHgyMDAwPjsNCj4gPiArCQljbG9jay1mcmVxdWVu
Y3kgPSA8MD47DQo+ID4gKwkJaW50ZXJydXB0cyA9IDwxNiA4IDYyIDg+Ow0KPiA+ICsJCXBoeS1o
YW5kbGUgPSA8JnphcmxpbmsxPjsNCj4gPiArCQlmc2wsbWF4LXRpbWUtc2xvdHMgPSA8MTI4PjsN
Cj4gPiArCX07DQo+IA0KPiBUaGUgZXhhbXBsZSByZWZlcnMgdG8gYSAiemFybGluazEiIG5vZGUg
YnV0IGl0IGlzIG5vdCBwcmVzZW50LiAgV2hhdCBkb2VzIGEgImxpbmUNCj4gY29udHJvbGxlciBv
ciBmcmFtZXIgbm9kZSIgbG9vayBsaWtlPw0KW1NhbmRlZXBdIHBoeS1oYW5kbGUgYWdhaW4gaXMg
Y3VycmVudGx5IG5vdCBiZWluZyB1c2VkLiBBZGRlZCBmb3IgZnV0dXJlIHVzZS4NCj4gDQo+IC1T
Y290dA0KPiANCg0K
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [1/3][PATCH][v2] Device Tree bindings for Freescale TDM controller
2015-04-14 13:50 ` sandeep
@ 2015-04-14 20:17 ` Scott Wood
0 siblings, 0 replies; 6+ messages in thread
From: Scott Wood @ 2015-04-14 20:17 UTC (permalink / raw)
To: Singh Sandeep-B37400; +Cc: linuxppc-dev@ozlabs.org
On Tue, 2015-04-14 at 08:50 -0500, Singh Sandeep-B37400 wrote:
> > > +TDM (Time Division Multiplexing)
> > > +
> > > +DESCRIPTION
> > > +
> > > +The TDM is full duplex serial port designed to allow various devices
> > > +including digital signal processors (DSPs) to communicate with a
> > > +variety of serial devices including industry standard framers, codecs, other
> > DSPs and microprocessors.
> > > +
> > > +The below properties describe the device tree bindings for Freescale
> > > +TDM controller.
> > > +This TDM controller is available on various Freescale Processors like
> > > +MPC8313, P1020, P1022 and P1010.
> > > +
> > > +PROPERTIES
> > > +
> > > + - compatible
> > > + Usage: required
> > > + Value type: <string>
> > > + Definition: Should contain "fsl,tdm1.0".
> >
> > What does 1.0 refer to? Is the TDM block identical on all the chips that currently
> > have it? Is this a real version number scheme (public or
> > otherwise) or something made up for software?
> [Sandeep] Starlite TDM block is identical on all the chips. This is a software only version.
Then I recommend arbitrarily picking one of the chips and naming the
compatible after that: "fsl,mpc8313-tdm".
> > > + - reg
> > > + Usage: required
> > > + Definition: A standard property. The first reg specifier describes the
> > > + TDM registers, and the second describes the TDM DMAC registers.
> > > +
> > > + - clock-frequency
> > > + Usage: optional
> > > + Value type: <u32 or u64>
> > > + Definition: The frequency at which the TDM block is operating.
> >
> > It'd be nice if new bindings used clock nodes rather than relying on U-Boot fixups.
> [Sandeep] This field is not currently used, but is planned to be used in future.
I don't see how that answers my request.
> > > +EXAMPLE
> > > +
> > > + tdm@16000 {
> > > + compatible = "fsl,tdm1.0";
> > > + reg = <0x16000 0x200 0x2c000 0x2000>;
> > > + clock-frequency = <0>;
> > > + interrupts = <16 8 62 8>;
> > > + phy-handle = <&zarlink1>;
> > > + fsl,max-time-slots = <128>;
> > > + };
> >
> > The example refers to a "zarlink1" node but it is not present. What does a "line
> > controller or framer node" look like?
> [Sandeep] phy-handle again is currently not being used. Added for future use.
Please submit a complete binding.
-Scott
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2015-04-15 15:35 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2015-04-02 10:47 [1/3][PATCH][v2] Device Tree bindings for Freescale TDM controller sandeep
2015-04-02 11:55 ` Laurentiu Tudor
2015-04-15 15:00 ` sandeep
2015-04-03 1:14 ` Scott Wood
2015-04-14 13:50 ` sandeep
2015-04-14 20:17 ` Scott Wood
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