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Subject: Re: [PATCH 3/4] powerpc/fsl-booke: Add T1024 RDB board support
From: Scott Wood <scottwood@freescale.com>
To: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Date: Tue, 7 Apr 2015 18:45:26 -0500
In-Reply-To: <1428057350-33553-3-git-send-email-Shengzhou.Liu@freescale.com>
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 <1428057350-33553-3-git-send-email-Shengzhou.Liu@freescale.com>
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On Fri, 2015-04-03 at 18:35 +0800, Shengzhou Liu wrote:

> +		board-control@2,0 {
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			compatible = "fsl,t1024-cpld", "fsl,deepsleep-cpld";

No "fsl,deepsleep-cpld".  Just have the driver recognize the compatibles
for the chips that have deep sleep.

Even if you were to do this, it would need to be documented in a
binding, and you'd need to be more specific about what CPLD family
you're talking about.

> +		tdma: ucc@2000 {
> +			compatible = "fsl,ucc-tdm";
> +			rx-clock-name = "clk8";
> +			tx-clock-name = "clk9";
> +			fsl,rx-sync-clock = "rsync_pin";
> +			fsl,tx-sync-clock = "tsync_pin";
> +			fsl,tx-timeslot = <0xfffffffe>;
> +			fsl,rx-timeslot = <0xfffffffe>;
> +			fsl,tdm-framer-type = "e1";
> +			fsl,tdm-mode = "normal";
> +			fsl,tdm-id = <0>;
> +			fsl,siram-entry-id = <0>;
> +		};

Binding?

-Scott