[PATCH 1/2] sdhci-of-esdhc: Support 8BIT bus width.

[PATCH 1/2] sdhci-of-esdhc: Support 8BIT bus width.

[Joakim Tjernlund]

Signed-off-by: Joakim Tjernlund <joakim.tjernlund@transmode.se>
---
 drivers/mmc/host/sdhci-of-esdhc.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c
index 22e9111..7130130 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -82,6 +82,10 @@ static u8 esdhc_readb(struct sdhci_host *host, int reg)
 		/* fixup the result */
 		ret &= ~SDHCI_CTRL_DMA_MASK;
 		ret |= dma_bits;
+
+		/* 8BIT is bit 29 in Control register */
+		ret |= ((ret << 3) & SDHCI_CTRL_8BITBUS);
+		ret &= ~(SDHCI_CTRL_8BITBUS >> 3);
 	}
 
 	return ret;
@@ -134,6 +138,10 @@ static void esdhc_writeb(struct sdhci_host *host, u8 val, int reg)
 			dma_bits);
 		val &= ~SDHCI_CTRL_DMA_MASK;
 		val |= in_be32(host->ioaddr + reg) & SDHCI_CTRL_DMA_MASK;
+
+		/* 8BIT is bit 29 in Control register */
+		val |= ((val & SDHCI_CTRL_8BITBUS) >> 3);
+		val = (val & ~SDHCI_CTRL_8BITBUS);
 	}
 
 	/* Prevent SDHCI core from writing reserved bits (e.g. HISPD). */
@@ -252,6 +260,8 @@ static void esdhc_of_platform_init(struct sdhci_host *host)
 
 	if (vvn > VENDOR_V_22)
 		host->quirks &= ~SDHCI_QUIRK_NO_BUSY_IRQ;
+
+	host->mmc->caps |= MMC_CAP_8_BIT_DATA;
 }
 
 static void esdhc_pltfm_set_bus_width(struct sdhci_host *host, int width)
-- 
2.3.6

[PATCH 2/2] sdhci-of-esdhc: Pre divider starts at 1

[Joakim Tjernlund]

For PowerPC esdhc pre divider starts at 1, fixing this increases
the actual clock from 40 MHz to 50 MHz.

Signed-off-by: Joakim Tjernlund <joakim.tjernlund@transmode.se>
---
 drivers/mmc/host/sdhci-of-esdhc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c
index 7130130..ffd5625 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -207,7 +207,7 @@ static unsigned int esdhc_of_get_min_clock(struct sdhci_host *host)
 
 static void esdhc_of_set_clock(struct sdhci_host *host, unsigned int clock)
 {
-	int pre_div = 2;
+	int pre_div = 1;
 	int div = 1;
 	u32 temp;
 
@@ -237,7 +237,7 @@ static void esdhc_of_set_clock(struct sdhci_host *host, unsigned int clock)
 
 	dev_dbg(mmc_dev(host->mmc), "desired SD clock: %d, actual: %d\n",
 		clock, host->max_clk / pre_div / div);
-
+	host->mmc->actual_clock = host->max_clk / pre_div / div;
 	pre_div >>= 1;
 	div--;
 
-- 
2.3.6

Re: [PATCH 1/2] sdhci-of-esdhc: Support 8BIT bus width.

[Arnd Bergmann]

On Monday 04 May 2015 18:31:31 Joakim Tjernlund wrote:
> @@ -252,6 +260,8 @@ static void esdhc_of_platform_init(struct sdhci_host *host)
>  
>         if (vvn > VENDOR_V_22)
>                 host->quirks &= ~SDHCI_QUIRK_NO_BUSY_IRQ;
> +
> +       host->mmc->caps |= MMC_CAP_8_BIT_DATA;
>  }
> 

Shouldn't this check the "bus-width" property before setting the width?

There might be an eMMC or SDIO with 4-bit interface connected.

	Arnd

Re: [PATCH 1/2] sdhci-of-esdhc: Support 8BIT bus width.

[Joakim Tjernlund]

On Mon, 2015-05-04 at 19:31 +0200, Arnd Bergmann wrote:
> On Monday 04 May 2015 18:31:31 Joakim Tjernlund wrote:
> > @@ -252,6 +260,8 @@ static void esdhc_of_platform_init(struct sdhci_hos=
t *host)
> > =20
> >         if (vvn > VENDOR_V_22)
> >                 host->quirks &=3D ~SDHCI_QUIRK_NO_BUSY_IRQ;
> > +
> > +       host->mmc->caps |=3D MMC_CAP_8_BIT_DATA;
> >  }
> >=20
>=20
> Shouldn't this check the "bus-width" property before setting the width?
>=20
> There might be an eMMC or SDIO with 4-bit interface connected.

This is for an eMMC chip we got and I THINK(this is new to me) that
this only allows 8 bit negotiation but I might be way off.
=20
Anyone knows for sure?

 Jocke=

Re: [PATCH 1/2] sdhci-of-esdhc: Support 8BIT bus width.

[Joakim Tjernlund]

On Mon, 2015-05-04 at 21:17 +0000, Joakim Tjernlund wrote:
> On Mon, 2015-05-04 at 19:31 +0200, Arnd Bergmann wrote:
> > On Monday 04 May 2015 18:31:31 Joakim Tjernlund wrote:
> > > @@ -252,6 +260,8 @@ static void esdhc_of_platform_init(struct sdhci_h=
ost *host)
> > > =20
> > >         if (vvn > VENDOR_V_22)
> > >                 host->quirks &=3D ~SDHCI_QUIRK_NO_BUSY_IRQ;
> > > +
> > > +       host->mmc->caps |=3D MMC_CAP_8_BIT_DATA;
> > >  }
> > >=20
> >=20
> > Shouldn't this check the "bus-width" property before setting the width?
> >=20
> > There might be an eMMC or SDIO with 4-bit interface connected.
>=20
> This is for an eMMC chip we got and I THINK(this is new to me) that
> this only allows 8 bit negotiation but I might be way off.
> =20
> Anyone knows for sure?

hmm, I need to look some more at this. There is bus-with/8BIT all over mmc =
and I
have probably missed something.

       Jocke

Re: [PATCH 1/2] sdhci-of-esdhc: Support 8BIT bus width.

[Arnd Bergmann]

On Monday 04 May 2015 21:17:27 Joakim Tjernlund wrote:
> On Mon, 2015-05-04 at 19:31 +0200, Arnd Bergmann wrote:
> > On Monday 04 May 2015 18:31:31 Joakim Tjernlund wrote:
> > > @@ -252,6 +260,8 @@ static void esdhc_of_platform_init(struct sdhci_host *host)
> > >  
> > >         if (vvn > VENDOR_V_22)
> > >                 host->quirks &= ~SDHCI_QUIRK_NO_BUSY_IRQ;
> > > +
> > > +       host->mmc->caps |= MMC_CAP_8_BIT_DATA;
> > >  }
> > > 
> > 
> > Shouldn't this check the "bus-width" property before setting the width?
> > 
> > There might be an eMMC or SDIO with 4-bit interface connected.
> 
> This is for an eMMC chip we got and I THINK(this is new to me) that
> this only allows 8 bit negotiation but I might be way off.
>  
> Anyone knows for sure?
> 

Most mmc host controllers can work with both eMMC and SD cards or
some of the less common variants (SDIO, eSD, MMC, ...), and most of those
are not 8 bit wide.

	Arnd