From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from e23smtp02.au.ibm.com (e23smtp02.au.ibm.com [202.81.31.144]) (using TLSv1 with cipher CAMELLIA256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id A04081A0868 for ; Wed, 3 Jun 2015 02:00:53 +1000 (AEST) Received: from /spool/local by e23smtp02.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Wed, 3 Jun 2015 02:00:51 +1000 Received: from d23relay09.au.ibm.com (d23relay09.au.ibm.com [9.185.63.181]) by d23dlp02.au.ibm.com (Postfix) with ESMTP id 2E9342BB0040 for ; Wed, 3 Jun 2015 02:00:49 +1000 (EST) Received: from d23av04.au.ibm.com (d23av04.au.ibm.com [9.190.235.139]) by d23relay09.au.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id t52G0e8H63373410 for ; Wed, 3 Jun 2015 02:00:49 +1000 Received: from d23av04.au.ibm.com (localhost [127.0.0.1]) by d23av04.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id t52G0F9Y018634 for ; Wed, 3 Jun 2015 02:00:16 +1000 From: Madhavan Srinivasan To: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Cc: Madhavan Srinivasan , Michael Ellerman , Benjamin Herrenschmidt , Paul Mackerras , Sukadev Bhattiprolu , Anshuman Khandual , Stephane Eranian Subject: [PATCH v1 1/9]powerpc/powernv: Data structure and macros definition Date: Tue, 2 Jun 2015 21:29:30 +0530 Message-Id: <1433260778-26497-2-git-send-email-maddy@linux.vnet.ibm.com> In-Reply-To: <1433260778-26497-1-git-send-email-maddy@linux.vnet.ibm.com> References: <1433260778-26497-1-git-send-email-maddy@linux.vnet.ibm.com> List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Patch creates a new header file "nest-pmu.h" to add the data structures and macros needed for the nest pmu support. Cc: Michael Ellerman Cc: Benjamin Herrenschmidt Cc: Paul Mackerras Cc: Sukadev Bhattiprolu Cc: Anshuman Khandual Cc: Stephane Eranian Signed-off-by: Madhavan Srinivasan --- arch/powerpc/perf/nest-pmu.h | 55 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 arch/powerpc/perf/nest-pmu.h diff --git a/arch/powerpc/perf/nest-pmu.h b/arch/powerpc/perf/nest-pmu.h new file mode 100644 index 0000000..ed3f79f --- /dev/null +++ b/arch/powerpc/perf/nest-pmu.h @@ -0,0 +1,55 @@ +/* + * Nest Performance Monitor counter support for POWER8 processors. + * + * Copyright 2015 Madhavan Srinivasan, IBM Corporation. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#include +#include +#include +#include +#include + +#define P8_MAX_CHIP 32 +#define MAX_PMU_NAME_LEN 256 +#define MAX_EVENTS_SUPPORTED 256 +#define P8_NEST_ENGINE_START 1 +#define P8_NEST_ENGINE_STOP 0 +#define P8_MAX_NEST_PMUS 32 + +/* + * Structure to hold per chip specific memory address + * information for nest pmus. Nest Counter data are exported + * in per-chip HOMER region by the PORE Engine. + */ +struct perchip_nest_info { + uint32_t chip_id; + uint64_t pbase; + uint64_t vbase; + uint32_t size; +}; + +/* + * Place holder for nest pmu events and values. + */ +struct ppc64_nest_ima_events { + const char *ev_name; + const char *ev_value; +}; + +/* + * Device tree parser code detect nest pmu support + * and create new nest pmus. This structure will + * hold the pmu functions and attrs for each nest pmu and + * will be referenced at the time of pmu registering. + */ +struct nest_pmu { + struct pmu pmu; + const struct attribute_group *attr_groups[4]; +}; + -- 1.9.1