From: Scott Wood <scottwood@freescale.com>
To: <Yuantian.Tang@freescale.com>
Cc: <b07421@freescale.com>, <linuxppc-dev@lists.ozlabs.org>,
<linux-kernel@vger.kernel.org>,
Chenhui Zhao <chenhui.zhao@freescale.com>,
Tang Yuantian <Yuantian.Tang@feescale.com>
Subject: Re: [PATCH v3] powerpc/cache: add cache flush operation for various e500
Date: Tue, 9 Jun 2015 17:28:20 -0500 [thread overview]
Message-ID: <1433888900.2477.104.camel@freescale.com> (raw)
In-Reply-To: <1433814827-10431-1-git-send-email-Yuantian.Tang@freescale.com>
On Tue, 2015-06-09 at 09:53 +0800, Yuantian.Tang@freescale.com wrote:
> From: Tang Yuantian <Yuantian.Tang@freescale.com>
>
> Various e500 core have different cache architecture, so they
> need different cache flush operations. Therefore, add a callback
> function cpu_flush_caches to the struct cpu_spec. The cache flush
> operation for the specific kind of e500 is selected at init time.
> The callback function will flush all caches inside the current cpu.
>
> Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
> Signed-off-by: Tang Yuantian <Yuantian.Tang@feescale.com>
> ---
> v3:
> - change all flush_caches to cpu_down_flush
> - replace whitespace with tab
[snip]
.cpu_setup = __setup_cpu_e500v2,
> .machine_check = machine_check_e500,
> .platform = "ppc8548",
> + .cpu_down_flush = cpu_down_flush_e500v2,
It's still not lined up. I'm not a fan of the "line up all the ="
style, as it's a pain to maintain (and can be harder to read if the "="
is too far to the right), but mixing the two is worse.
-Scott
next prev parent reply other threads:[~2015-06-09 22:28 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-09 1:53 [PATCH v3] powerpc/cache: add cache flush operation for various e500 Yuantian.Tang
2015-06-09 22:28 ` Scott Wood [this message]
2015-06-10 2:00 ` Yuantian Tang
2015-06-10 2:02 ` Scott Wood
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