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Subject: Re: question on FSL_EMB perf
From: Peter Zijlstra <peterz@infradead.org>
To: Scott Wood <scottwood@freescale.com>
Cc: Michael Neuling <mikey@neuling.org>, Benjamin Herrenschmidt
 <benh@kernel.crashing.org>, linuxppc-dev@ozlabs.org
Date: Wed, 10 Jun 2015 21:27:34 +0200
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On Wed, 2015-06-10 at 14:17 -0500, Scott Wood wrote:
> On Wed, 2015-06-10 at 13:41 +0200, Peter Zijlstra wrote:
> > Hi Mike, Ben,
> >=20
> > I just noticed:
> >=20
> > arch/powerpc/Kconfig:   select HAVE_PERF_EVENTS_NMI if PPC64
> >=20
> > But can't ppc32 have FSL_EMB perf?
>=20
> Yes, but it doesn't use NMIs.  ppc64 has lazy interrupt disabling=20
> which functions as a pseudo-NMI.

I know. But you can get the same nesting nonsense as with actual real
NMIs.

And seeing how you select HAVE_PERF_EVENT_NMI for PPC64, I figure you
ought to select it too for whatever fsl-emb is.

# git grep nmi_enter arch/powerpc/
arch/powerpc/perf/core-book3s.c:                nmi_enter();
arch/powerpc/perf/core-fsl-emb.c:               nmi_enter();