From: Samuel Mendoza-Jonas <sam.mj@au1.ibm.com>
To: linuxppc-dev@ozlabs.org
Cc: Samuel Mendoza-Jonas <sam.mj@au1.ibm.com>
Subject: [PATCH 1/2] powerpc/kexec: Reset secondary cpu endianess before kexec
Date: Wed, 8 Jul 2015 11:23:24 +1000 [thread overview]
Message-ID: <1436318605-13031-1-git-send-email-sam.mj@au1.ibm.com> (raw)
If the target kernel does not inlcude the FIXUP_ENDIAN check, coming
from a different-endian kernel will cause the target kernel to panic.
All ppc64 kernels can handle starting in big-endian mode, so return to
big-endian before branching into the target kernel.
This mainly affects pseries as secondaries on powernv are returned to
OPAL.
Signed-off-by: Samuel Mendoza-Jonas <sam.mj@au1.ibm.com>
---
arch/powerpc/kernel/misc_64.S | 15 +++++++++++++--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
index 4e314b9..c73e587 100644
--- a/arch/powerpc/kernel/misc_64.S
+++ b/arch/powerpc/kernel/misc_64.S
@@ -475,9 +475,20 @@ _GLOBAL(kexec_wait)
#ifdef CONFIG_KEXEC /* use no memory without kexec */
lwz r4,0(r5)
cmpwi 0,r4,0
- bnea 0x60
+ beq 99b
+ mfmsr r9 /* Check endianess */
+ clrldi. r10,r9,63
+ beqa 0x60 /* Already big-endian */
+ bcl 20,31,$+4
+ mflr r10
+ addi r10,r10,28
+ mfmsr r11
+ xori r11,r11,1
+ mtsrr0 r10
+ mtsrr1 r11
+ rfid
+ .long 0x62000048 /* ba 0x60 */
#endif
- b 99b
/* this can be in text because we won't change it until we are
* running in real anyways
--
2.4.5
next reply other threads:[~2015-07-08 1:24 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-08 1:23 Samuel Mendoza-Jonas [this message]
2015-07-08 1:23 ` [PATCH 2/2] powerpc/kexec: Reset HILE before kexec_sequence Samuel Mendoza-Jonas
2015-07-08 6:14 ` Stewart Smith
2015-07-08 2:35 ` [PATCH 1/2] powerpc/kexec: Reset secondary cpu endianess before kexec Scott Wood
2015-07-08 4:04 ` Paul Mackerras
2015-07-08 4:22 ` Scott Wood
2015-07-09 15:42 ` Segher Boessenkool
2015-07-09 20:27 ` Scott Wood
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