[PATCH 1/2] powerpc/powernv: Fix alignment for IOV BAR

[Gavin Shan <gwshan@linux.vnet.ibm.com>]

IOV BAR is extended to cover 256 VFs or number of supported VFs,
the alignment is the IOV BAR size, which is usually huge and bigger
than M64 segment size (256MB). That means the IOV BAR is expected
to be assigned to the beginning of PHB's M64 window prior to other
M64 BARs in PCI devices that are hooked to the PCI bus behind root
port. Other M64 BARs actually need M64 segment size other than the
huge IOV BAR size as the required alignment.

The patch returns M64 segment size if IOV BAR size is bigger than
it when the PF seats behind root port. Otherwise, the IOV BAR size
is returned as before. It will save lots of consumed M64 space,
which would be 16GB in some cases as I observed.

Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
---
 arch/powerpc/platforms/powernv/pci-ioda.c | 35 +++++++++++++++++++++++++------
 1 file changed, 29 insertions(+), 6 deletions(-)

diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
index fdafbac..6ec62b9 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -2961,16 +2961,39 @@ static resource_size_t pnv_pci_window_alignment(struct pci_bus *bus,
 static resource_size_t pnv_pci_iov_resource_alignment(struct pci_dev *pdev,
 						      int resno)
 {
+	struct pci_controller *hose = pci_bus_to_host(pdev->bus);
+	struct pnv_phb *phb = hose->private_data;
 	struct pci_dn *pdn = pci_get_pdn(pdev);
-	resource_size_t align, iov_align;
+	resource_size_t align;
+	resource_size_t m64_segsz = phb->ioda.m64_segsize;
 
-	iov_align = resource_size(&pdev->resource[resno]);
-	if (iov_align)
-		return iov_align;
+	/*
+	 * When PF is the only one adapter under the PHB, the IOV BAR
+	 * is expected to be assigned prior to any other M64 BARs. To
+	 * have M64 segment size, which is usually smaller than IOV
+	 * BAR size, as the alignment to avoid wasting M64 space to
+	 * satisfy the alignment required by other M64 BARs.
+	 */
+	align = resource_size(&pdev->resource[resno]);
+	if (align) {
+		if (!pci_bus_is_root(pdev->bus) &&
+		    pci_bus_is_root(pdev->bus->self->bus))
+			align = min(align, m64_segsz);
+		else
+			align = max(align, m64_segsz);
+
+		return align;
+	}
 
 	align = pci_iov_resource_size(pdev, resno);
-	if (pdn->vfs_expanded)
-		return pdn->vfs_expanded * align;
+	if (pdn->vfs_expanded) {
+		align = pdn->vfs_expanded * align;
+		if (!pci_bus_is_root(pdev->bus) &&
+		    pci_bus_is_root(pdev->bus->self->bus))
+			align = min(align, m64_segsz);
+		else
+			align = max(align, m64_segsz);
+	}
 
 	return align;
 }
-- 
2.1.0