From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Samuel Mendoza-Jonas <sam.mj@au1.ibm.com>
Cc: linuxppc-dev@ozlabs.org
Subject: Re: [PATCH V3 2/2] powerpc/kexec: Reset HILE before entering target kernel
Date: Fri, 17 Jul 2015 13:34:59 +1000 [thread overview]
Message-ID: <1437104099.28088.64.camel@kernel.crashing.org> (raw)
In-Reply-To: <1437098018.28088.62.camel@kernel.crashing.org>
On Fri, 2015-07-17 at 11:53 +1000, Benjamin Herrenschmidt wrote:
> On Fri, 2015-07-10 at 15:19 +1000, Samuel Mendoza-Jonas wrote:
> > +#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_PPC_POWERNV)
> > + li r3,(FW_FEATURE_OPAL >> 16)
> > + rldicr r3,r3,16,63
> > + and. r3,r3,r26
> > + cmpwi r3,0
> > + beq 99f
>
> If FW_FEATRURE_OPAL is 0x80000000 then the li will sign extend.
>
> The rldicr has a mask of all F's so it will keep all the bits you
> don't care about.
../..
Even better, you should be able to just do it all in C in
pnv_kexec_cpu_down(), after we wait for secondaries to
be in OPAL. At that point interrupts are already off, so
it should be all good.
next prev parent reply other threads:[~2015-07-17 3:35 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-10 5:19 [PATCH V3 0/2] powerpc/kexec: Reset endianess before kexec Samuel Mendoza-Jonas
2015-07-10 5:19 ` [PATCH V3 1/2] powerpc/kexec: Reset secondary cpu " Samuel Mendoza-Jonas
2015-07-10 5:19 ` [PATCH V3 2/2] powerpc/kexec: Reset HILE before entering target kernel Samuel Mendoza-Jonas
2015-07-17 1:53 ` Benjamin Herrenschmidt
2015-07-17 3:34 ` Benjamin Herrenschmidt [this message]
2015-07-17 9:59 ` Segher Boessenkool
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