From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from ozlabs.org (ozlabs.org [103.22.144.67]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 934891A0727 for ; Fri, 17 Jul 2015 13:35:13 +1000 (AEST) Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id C49B6140774 for ; Fri, 17 Jul 2015 13:35:11 +1000 (AEST) Message-ID: <1437104099.28088.64.camel@kernel.crashing.org> Subject: Re: [PATCH V3 2/2] powerpc/kexec: Reset HILE before entering target kernel From: Benjamin Herrenschmidt To: Samuel Mendoza-Jonas Cc: linuxppc-dev@ozlabs.org Date: Fri, 17 Jul 2015 13:34:59 +1000 In-Reply-To: <1437098018.28088.62.camel@kernel.crashing.org> References: <1436505599-32109-1-git-send-email-sam.mj@au1.ibm.com> <1436505599-32109-3-git-send-email-sam.mj@au1.ibm.com> <1437098018.28088.62.camel@kernel.crashing.org> Content-Type: text/plain; charset="UTF-8" Mime-Version: 1.0 List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Fri, 2015-07-17 at 11:53 +1000, Benjamin Herrenschmidt wrote: > On Fri, 2015-07-10 at 15:19 +1000, Samuel Mendoza-Jonas wrote: > > +#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_PPC_POWERNV) > > + li r3,(FW_FEATURE_OPAL >> 16) > > + rldicr r3,r3,16,63 > > + and. r3,r3,r26 > > + cmpwi r3,0 > > + beq 99f > > If FW_FEATRURE_OPAL is 0x80000000 then the li will sign extend. > > The rldicr has a mask of all F's so it will keep all the bits you > don't care about. ../.. Even better, you should be able to just do it all in C in pnv_kexec_cpu_down(), after we wait for secondaries to be in OPAL. At that point interrupts are already off, so it should be all good.