From: Chenhui Zhao <chenhui.zhao@freescale.com>
To: <linuxppc-dev@lists.ozlabs.org>, <scottwood@freescale.com>
Cc: <linux-kernel@vger.kernel.org>, <Jason.Jin@freescale.com>
Subject: [PATCH 2/4] powerpc: get the physical base address of DCSR
Date: Fri, 31 Jul 2015 20:53:04 +0800 [thread overview]
Message-ID: <1438347186-8462-2-git-send-email-chenhui.zhao@freescale.com> (raw)
In-Reply-To: <1438347186-8462-1-git-send-email-chenhui.zhao@freescale.com>
Add get_dcsrbase() to get the physical base address of DCSR.
Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
---
arch/powerpc/sysdev/fsl_soc.c | 31 +++++++++++++++++++++++++++++++
arch/powerpc/sysdev/fsl_soc.h | 1 +
2 files changed, 32 insertions(+)
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index 99269c0..ffb7c1c 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -45,6 +45,37 @@ extern void init_fcc_ioports(struct fs_platform_info*);
extern void init_fec_ioports(struct fs_platform_info*);
extern void init_smc_ioports(struct fs_uart_platform_info*);
static phys_addr_t immrbase = -1;
+static phys_addr_t dcsrbase = -1;
+
+phys_addr_t get_dcsrbase(void)
+{
+ struct device_node *np;
+ const __be32 *prop;
+ int size;
+ u32 naddr;
+
+ if (dcsrbase != -1)
+ return dcsrbase;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,dcsr");
+ if (!np)
+ return -1;
+
+ prop = of_get_property(np, "#address-cells", &size);
+ if (prop && size == 4)
+ naddr = be32_to_cpup(prop);
+ else
+ naddr = 2;
+
+ prop = of_get_property(np, "ranges", NULL);
+ if (prop)
+ dcsrbase = of_translate_address(np, prop + naddr);
+
+ of_node_put(np);
+
+ return dcsrbase;
+}
+EXPORT_SYMBOL(get_dcsrbase);
phys_addr_t get_immrbase(void)
{
diff --git a/arch/powerpc/sysdev/fsl_soc.h b/arch/powerpc/sysdev/fsl_soc.h
index 4c5a19e..5fdd3a5 100644
--- a/arch/powerpc/sysdev/fsl_soc.h
+++ b/arch/powerpc/sysdev/fsl_soc.h
@@ -6,6 +6,7 @@
struct spi_device;
+extern phys_addr_t get_dcsrbase(void);
extern phys_addr_t get_immrbase(void);
#if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx)
extern u32 get_brgfreq(void);
--
1.9.1
next prev parent reply other threads:[~2015-07-31 13:08 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-31 12:53 [PATCH 1/4] powerpc/85xx: support sleep feature on QorIQ SoCs with RCPM Chenhui Zhao
2015-07-31 12:53 ` Chenhui Zhao [this message]
2015-07-31 12:53 ` [PATCH 3/4] powerpc: pm: add EPU FSM configuration for deep sleep Chenhui Zhao
2015-08-01 0:41 ` Scott Wood
2015-08-03 12:01 ` Chenhui Zhao
2015-08-03 21:22 ` Scott Wood
2015-07-31 12:53 ` [PATCH 4/4] powerpc: pm: support deep sleep feature on T104x Chenhui Zhao
2015-08-01 2:49 ` Scott Wood
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