From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from e28smtp08.in.ibm.com (e28smtp08.in.ibm.com [122.248.162.8]) (using TLSv1 with cipher CAMELLIA256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 1CBCE1A0D3B for ; Mon, 3 Aug 2015 17:36:18 +1000 (AEST) Received: from /spool/local by e28smtp08.in.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Mon, 3 Aug 2015 13:06:16 +0530 Received: from d28relay03.in.ibm.com (d28relay03.in.ibm.com [9.184.220.60]) by d28dlp01.in.ibm.com (Postfix) with ESMTP id 19EA2E0021 for ; Mon, 3 Aug 2015 13:10:26 +0530 (IST) Received: from d28av04.in.ibm.com (d28av04.in.ibm.com [9.184.220.66]) by d28relay03.in.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id t737aBN442401902 for ; Mon, 3 Aug 2015 13:06:11 +0530 Received: from d28av04.in.ibm.com (localhost [127.0.0.1]) by d28av04.in.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id t737a3Pa007238 for ; Mon, 3 Aug 2015 13:06:03 +0530 From: Madhavan Srinivasan To: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org Cc: Madhavan Srinivasan , Michael Ellerman , Benjamin Herrenschmidt , Paul Mackerras , Anton Blanchard , Sukadev Bhattiprolu , Daniel Axtens , Stephane Eranian Subject: [PATCH v7 1/7] powerpc/powernv: Data structure and macros definition Date: Mon, 3 Aug 2015 13:05:53 +0530 Message-Id: <1438587359-6165-2-git-send-email-maddy@linux.vnet.ibm.com> In-Reply-To: <1438587359-6165-1-git-send-email-maddy@linux.vnet.ibm.com> References: <1438587359-6165-1-git-send-email-maddy@linux.vnet.ibm.com> List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Create new header file "nest-pmu.h" to add the data structures and macros needed for the nest pmu support. Cc: Michael Ellerman Cc: Benjamin Herrenschmidt Cc: Paul Mackerras Cc: Anton Blanchard Cc: Sukadev Bhattiprolu Cc: Daniel Axtens Cc: Stephane Eranian Signed-off-by: Madhavan Srinivasan --- arch/powerpc/perf/nest-pmu.h | 54 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) create mode 100644 arch/powerpc/perf/nest-pmu.h diff --git a/arch/powerpc/perf/nest-pmu.h b/arch/powerpc/perf/nest-pmu.h new file mode 100644 index 000000000000..73aff2de3350 --- /dev/null +++ b/arch/powerpc/perf/nest-pmu.h @@ -0,0 +1,54 @@ +/* + * Nest Performance Monitor counter support for POWER8 processors. + * + * Copyright (C) 2015 Madhavan Srinivasan, IBM Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include + +#define P8_NEST_MAX_CHIPS 32 +#define P8_NEST_MAX_PMUS 32 +#define P8_NEST_MAX_PMU_NAME_LEN 256 +#define P8_NEST_MAX_EVENTS_SUPPORTED 64 +#define P8_NEST_ENGINE_START 1 +#define P8_NEST_ENGINE_STOP 0 +#define P8_NEST_MODE_PRODUCTION 1 + +/* + * Structure to hold per chip specific memory address + * information for nest pmus. Nest Counter data are exported + * in per-chip reserved memory region by the PORE Engine. + */ +struct perchip_nest_info { + u32 chip_id; + u64 pbase; + u64 vbase; + u32 size; +}; + +/* + * Place holder for nest pmu events and values. + */ +struct nest_ima_events { + char *ev_name; + char *ev_value; +}; + +/* + * Device tree parser code detects nest pmu support and + * registers new nest pmus. This structure will + * hold the pmu functions and attrs for each nest pmu and + * will be referenced at the time of pmu registration. + */ +struct nest_pmu { + struct pmu pmu; + const struct attribute_group *attr_groups[4]; +}; -- 1.9.1