[PATCH v2 1/2] powerpc/85xx: Add binding for SCFG

[PATCH v2 1/2] powerpc/85xx: Add binding for SCFG

[Dongsheng Wang]

From: Wang Dongsheng <dongsheng.wang@freescale.com>

SCFG provides SoC specific configuration and status registers for
the chip. Add this for powerpc platform.

Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
---
*V2*
- Remove scfg description in board.txt and create scfg.txt for scfg.
- Change "fsl,<board>-scfg" to "fsl,<chip>-scfg"

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/scfg.txt b/Documentation/devicetree/bindings/powerpc/fsl/scfg.txt
new file mode 100644
index 0000000..0532c46
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/fsl/scfg.txt
@@ -0,0 +1,18 @@
+Freescale Supplement configuration unit (SCFG)
+
+SCFG is the supplemental configuration unit, that provides SoC specific
+configuration and status registers for the chip. Such as getting PEX port
+status.
+
+Required properties:
+
+- compatible: should be "fsl,<chip>-scfg"
+- reg: should contain base address and length of SCFG memory-mapped
+registers
+
+Example:
+
+	scfg: global-utilities@fc000 {
+		compatible = "fsl,t1040-scfg";
+		reg = <0xfc000 0x1000>;
+	};
-- 
2.1.0.27.g96db324

[PATCH v2 2/2] powerpc/mpc85xx:Add SCFG device tree support of T104x

[Dongsheng Wang]

From: Wang Dongsheng <dongsheng.wang@freescale.com>

Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
---
*V2*
No changes.
diff --git a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
index 9e9f7e2..9770d02 100644
--- a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
@@ -484,6 +484,11 @@
 		reg	   = <0xea000 0x4000>;
 	};
 
+	scfg: global-utilities@fc000 {
+		compatible = "fsl,t1040-scfg";
+		reg = <0xfc000 0x1000>;
+	};
+
 /include/ "elo3-dma-0.dtsi"
 /include/ "elo3-dma-1.dtsi"
 /include/ "qoriq-espi-0.dtsi"
-- 
2.1.0.27.g96db324

RE: [PATCH v2 1/2] powerpc/85xx: Add binding for SCFG

[Wang Dongsheng]

Hi Scott,

Could you apply the patches?

Regards,
-Dongsheng

> -----Original Message-----
> From: Dongsheng Wang [mailto:dongsheng.wang@freescale.com]
> Sent: Friday, August 14, 2015 11:12 AM
> To: Wood Scott-B07421
> Cc: Jain Priyanka-B32167; devicetree@vger.kernel.org; linuxppc-
> dev@lists.ozlabs.org; Wang Dongsheng-B40534
> Subject: [PATCH v2 1/2] powerpc/85xx: Add binding for SCFG
>=20
> From: Wang Dongsheng <dongsheng.wang@freescale.com>
>=20
> SCFG provides SoC specific configuration and status registers for
> the chip. Add this for powerpc platform.
>=20
> Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
> ---
> *V2*
> - Remove scfg description in board.txt and create scfg.txt for scfg.
> - Change "fsl,<board>-scfg" to "fsl,<chip>-scfg"
>=20
> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/scfg.txt
> b/Documentation/devicetree/bindings/powerpc/fsl/scfg.txt
> new file mode 100644
> index 0000000..0532c46
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/fsl/scfg.txt
> @@ -0,0 +1,18 @@
> +Freescale Supplement configuration unit (SCFG)
> +
> +SCFG is the supplemental configuration unit, that provides SoC specific
> +configuration and status registers for the chip. Such as getting PEX por=
t
> +status.
> +
> +Required properties:
> +
> +- compatible: should be "fsl,<chip>-scfg"
> +- reg: should contain base address and length of SCFG memory-mapped
> +registers
> +
> +Example:
> +
> +	scfg: global-utilities@fc000 {
> +		compatible =3D "fsl,t1040-scfg";
> +		reg =3D <0xfc000 0x1000>;
> +	};
> --
> 2.1.0.27.g96db324