From: Boqun Feng <boqun.feng@gmail.com>
To: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org
Cc: Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@kernel.org>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Paul Mackerras <paulus@samba.org>,
Michael Ellerman <mpe@ellerman.id.au>,
Thomas Gleixner <tglx@linutronix.de>,
Will Deacon <will.deacon@arm.com>,
"Paul E. McKenney" <paulmck@linux.vnet.ibm.com>,
Waiman Long <waiman.long@hp.com>,
Boqun Feng <boqun.feng@gmail.com>
Subject: [RFC v2 6/7] powerpc: atomic: Make atomic{, 64}_xchg and xchg a full barrier
Date: Wed, 16 Sep 2015 23:49:34 +0800 [thread overview]
Message-ID: <1442418575-12297-7-git-send-email-boqun.feng@gmail.com> (raw)
In-Reply-To: <1442418575-12297-1-git-send-email-boqun.feng@gmail.com>
According to memory-barriers.txt, xchg and its atomic{,64}_ versions
need to imply a full barrier, however they are now just RELEASE+ACQUIRE,
which is not a full barrier.
So remove the definition of xchg(), and let __atomic_op_fence() build
the full-barrier versions of these operations.
Signed-off-by: Boqun Feng <boqun.feng@gmail.com>
---
arch/powerpc/include/asm/cmpxchg.h | 64 --------------------------------------
1 file changed, 64 deletions(-)
diff --git a/arch/powerpc/include/asm/cmpxchg.h b/arch/powerpc/include/asm/cmpxchg.h
index f40f295..9f0379a 100644
--- a/arch/powerpc/include/asm/cmpxchg.h
+++ b/arch/powerpc/include/asm/cmpxchg.h
@@ -12,31 +12,7 @@
* Changes the memory location '*ptr' to be val and returns
* the previous value stored there.
*/
-static __always_inline unsigned long
-__xchg_u32(volatile void *p, unsigned long val)
-{
- unsigned long prev;
- __asm__ __volatile__(
- PPC_RELEASE_BARRIER
-"1: lwarx %0,0,%2 \n"
- PPC405_ERR77(0,%2)
-" stwcx. %3,0,%2 \n\
- bne- 1b"
- PPC_ACQUIRE_BARRIER
- : "=&r" (prev), "+m" (*(volatile unsigned int *)p)
- : "r" (p), "r" (val)
- : "cc", "memory");
-
- return prev;
-}
-
-/*
- * Atomic exchange
- *
- * Changes the memory location '*ptr' to be val and returns
- * the previous value stored there.
- */
static __always_inline unsigned long
__xchg_u32_local(volatile void *p, unsigned long val)
{
@@ -82,25 +58,6 @@ __xchg_u32_relaxed(u32 *p, unsigned long val)
#ifdef CONFIG_PPC64
static __always_inline unsigned long
-__xchg_u64(volatile void *p, unsigned long val)
-{
- unsigned long prev;
-
- __asm__ __volatile__(
- PPC_RELEASE_BARRIER
-"1: ldarx %0,0,%2 \n"
- PPC405_ERR77(0,%2)
-" stdcx. %3,0,%2 \n\
- bne- 1b"
- PPC_ACQUIRE_BARRIER
- : "=&r" (prev), "+m" (*(volatile unsigned long *)p)
- : "r" (p), "r" (val)
- : "cc", "memory");
-
- return prev;
-}
-
-static __always_inline unsigned long
__xchg_u64_local(volatile void *p, unsigned long val)
{
unsigned long prev;
@@ -142,21 +99,6 @@ __xchg_u64_relaxed(u64 *p, unsigned long val)
extern void __xchg_called_with_bad_pointer(void);
static __always_inline unsigned long
-__xchg(volatile void *ptr, unsigned long x, unsigned int size)
-{
- switch (size) {
- case 4:
- return __xchg_u32(ptr, x);
-#ifdef CONFIG_PPC64
- case 8:
- return __xchg_u64(ptr, x);
-#endif
- }
- __xchg_called_with_bad_pointer();
- return x;
-}
-
-static __always_inline unsigned long
__xchg_local(volatile void *ptr, unsigned long x, unsigned int size)
{
switch (size) {
@@ -185,12 +127,6 @@ __xchg_relaxed(void *ptr, unsigned long x, unsigned int size)
__xchg_called_with_bad_pointer();
return x;
}
-#define xchg(ptr,x) \
- ({ \
- __typeof__(*(ptr)) _x_ = (x); \
- (__typeof__(*(ptr))) __xchg((ptr), (unsigned long)_x_, sizeof(*(ptr))); \
- })
-
#define xchg_local(ptr,x) \
({ \
__typeof__(*(ptr)) _x_ = (x); \
--
2.5.1
next prev parent reply other threads:[~2015-09-16 15:50 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-16 15:49 [RFC v2 0/7] atomics: powerpc: Implement relaxed/acquire/release variants of some atomics Boqun Feng
2015-09-16 15:49 ` [RFC v2 1/7] atomics: Add test for atomic operations with _relaxed variants Boqun Feng
2015-10-12 9:30 ` Will Deacon
2015-10-12 9:38 ` Boqun Feng
2015-09-16 15:49 ` [RFC v2 2/7] atomics: Allow architectures to define their own __atomic_op_* helpers Boqun Feng
2015-09-16 15:49 ` [RFC v2 3/7] powerpc: atomic: Implement atomic{, 64}_{add, sub}_return_* variants Boqun Feng
2015-09-18 16:59 ` [RFC v2 3/7] powerpc: atomic: Implement atomic{,64}_{add,sub}_return_* variants Will Deacon
2015-09-19 15:33 ` Boqun Feng
2015-09-20 8:23 ` Boqun Feng
2015-09-21 22:24 ` Will Deacon
2015-09-21 23:26 ` Boqun Feng
2015-09-21 23:37 ` Boqun Feng
2015-09-22 15:25 ` Paul E. McKenney
2015-09-23 0:07 ` Boqun Feng
2015-09-25 21:29 ` Paul E. McKenney
2015-09-26 2:18 ` Boqun Feng
2015-09-16 15:49 ` [RFC v2 4/7] powerpc: atomic: Implement xchg_* and atomic{, 64}_xchg_* variants Boqun Feng
2015-10-01 12:24 ` [RFC v2 4/7] powerpc: atomic: Implement xchg_* and atomic{,64}_xchg_* variants Peter Zijlstra
2015-10-01 15:09 ` Paul E. McKenney
2015-10-01 17:13 ` Peter Zijlstra
2015-10-01 18:03 ` Paul E. McKenney
2015-10-01 18:23 ` Peter Zijlstra
2015-10-01 19:41 ` Paul E. McKenney
2015-10-05 14:44 ` Will Deacon
2015-10-05 16:57 ` Paul E. McKenney
2015-10-12 1:17 ` Boqun Feng
2015-10-12 9:28 ` Will Deacon
2015-10-12 23:24 ` Paul E. McKenney
2015-09-16 15:49 ` [RFC v2 5/7] powerpc: atomic: Implement cmpxchg{, 64}_* and atomic{, 64}_cmpxchg_* variants Boqun Feng
2015-10-01 12:27 ` [RFC v2 5/7] powerpc: atomic: Implement cmpxchg{,64}_* and atomic{,64}_cmpxchg_* variants Peter Zijlstra
2015-10-01 12:36 ` Peter Zijlstra
2015-10-01 15:12 ` Paul E. McKenney
2015-10-01 17:11 ` Peter Zijlstra
2015-10-01 15:13 ` Paul E. McKenney
2015-10-10 1:58 ` Boqun Feng
2015-10-11 10:25 ` Boqun Feng
2015-10-12 6:46 ` Peter Zijlstra
2015-10-12 7:03 ` Boqun Feng
2015-09-16 15:49 ` Boqun Feng [this message]
2015-10-01 12:28 ` [RFC v2 6/7] powerpc: atomic: Make atomic{,64}_xchg and xchg a full barrier Peter Zijlstra
2015-10-01 23:19 ` Boqun Feng
2015-10-02 5:25 ` Peter Zijlstra
2015-09-16 15:49 ` [RFC v2 7/7] powerpc: atomic: Make atomic{, 64}_cmpxchg and cmpxchg " Boqun Feng
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