From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
To: benh@kernel.crashing.org, paulus@samba.org, mpe@ellerman.id.au
Cc: linuxppc-dev@lists.ozlabs.org,
"Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
Subject: [PATCH 26/31] powerpc/mm: Remove the dependency on pte bit position in asm code
Date: Mon, 21 Sep 2015 12:10:53 +0530 [thread overview]
Message-ID: <1442817658-2588-27-git-send-email-aneesh.kumar@linux.vnet.ibm.com> (raw)
In-Reply-To: <1442817658-2588-1-git-send-email-aneesh.kumar@linux.vnet.ibm.com>
We should not expect pte bit position in asm code. Simply
by moving part of that to C
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
---
arch/powerpc/kernel/exceptions-64s.S | 16 +++-------------
arch/powerpc/mm/hash_utils_64.c | 29 +++++++++++++++++++++++++++++
2 files changed, 32 insertions(+), 13 deletions(-)
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index 0a0399c2af11..34920f11dbdd 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -1556,28 +1556,18 @@ do_hash_page:
lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */
andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */
bne 77f /* then don't call hash_page now */
- /*
- * We need to set the _PAGE_USER bit if MSR_PR is set or if we are
- * accessing a userspace segment (even from the kernel). We assume
- * kernel addresses always have the high bit set.
- */
- rlwinm r4,r4,32-25+9,31-9,31-9 /* DSISR_STORE -> _PAGE_RW */
- rotldi r0,r3,15 /* Move high bit into MSR_PR posn */
- orc r0,r12,r0 /* MSR_PR | ~high_bit */
- rlwimi r4,r0,32-13,30,30 /* becomes _PAGE_USER access bit */
- ori r4,r4,1 /* add _PAGE_PRESENT */
- rlwimi r4,r5,22+2,31-2,31-2 /* Set _PAGE_EXEC if trap is 0x400 */
/*
* r3 contains the faulting address
- * r4 contains the required access permissions
+ * r4 msr
* r5 contains the trap number
* r6 contains dsisr
*
* at return r3 = 0 for success, 1 for page fault, negative for error
*/
+ mr r4,r12
ld r6,_DSISR(r1)
- bl hash_page /* build HPTE if possible */
+ bl __hash_page /* build HPTE if possible */
cmpdi r3,0 /* see if hash_page succeeded */
/* Success */
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index 2b90850bdaf8..6cd9e40aae01 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -1161,6 +1161,35 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap,
}
EXPORT_SYMBOL_GPL(hash_page);
+int __hash_page(unsigned long ea, unsigned long msr, unsigned long trap,
+ unsigned long dsisr)
+{
+ unsigned long access = _PAGE_PRESENT;
+ unsigned long flags = 0;
+ struct mm_struct *mm = current->mm;
+
+ if (REGION_ID(ea) == VMALLOC_REGION_ID)
+ mm = &init_mm;
+
+ if (dsisr & DSISR_NOHPTE)
+ flags |= HPTE_NOHPTE_UPDATE;
+
+ if (dsisr & DSISR_ISSTORE)
+ access |= _PAGE_RW;
+ /*
+ * We need to set the _PAGE_USER bit if MSR_PR is set or if we are
+ * accessing a userspace segment (even from the kernel). We assume
+ * kernel addresses always have the high bit set.
+ */
+ if ((msr & MSR_PR) || (REGION_ID(ea) == USER_REGION_ID))
+ access |= _PAGE_USER;
+
+ if (trap == 0x400)
+ access |= _PAGE_EXEC;
+
+ return hash_page_mm(mm, ea, access, trap, flags);
+}
+
void hash_preload(struct mm_struct *mm, unsigned long ea,
unsigned long access, unsigned long trap)
{
--
2.5.0
next prev parent reply other threads:[~2015-09-21 6:42 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-21 6:40 [PATCH 00/31] powerpc/mm: Update page table format for book3s 64 Aneesh Kumar K.V
2015-09-21 6:40 ` [PATCH 01/31] powerpc/mm: move pte headers to book3s directory Aneesh Kumar K.V
2015-09-21 6:40 ` [PATCH 02/31] powerpc/mm: move pte headers to book3s directory (part 2) Aneesh Kumar K.V
2015-09-21 6:40 ` [PATCH 03/31] powerpc/mm: make a separate copy for book3s Aneesh Kumar K.V
2015-09-21 21:58 ` Scott Wood
2015-09-22 6:42 ` Aneesh Kumar K.V
2015-09-21 6:40 ` [PATCH 04/31] powerpc/mm: make a separate copy for book3s (part 2) Aneesh Kumar K.V
2015-09-21 6:40 ` [PATCH 05/31] powerpc/mm: Move hash specific pte width and other defines to book3s Aneesh Kumar K.V
2015-09-21 6:40 ` [PATCH 06/31] powerpc/mm: Delete booke bits from book3s Aneesh Kumar K.V
2015-09-21 6:40 ` [PATCH 07/31] powerpc/mm: Don't have generic headers introduce functions touching pte bits Aneesh Kumar K.V
2015-09-21 6:40 ` [PATCH 08/31] powerpc/mm: Drop pte-common.h from BOOK3S 64 Aneesh Kumar K.V
2015-09-21 6:40 ` [PATCH 09/31] powerpc/mm: Don't use pte_val as lvalue Aneesh Kumar K.V
2015-09-22 2:22 ` Scott Wood
2015-09-22 6:44 ` Aneesh Kumar K.V
2015-09-22 6:46 ` Scott Wood
2015-09-21 6:40 ` [PATCH 10/31] powerpc/mm: Don't use pmd_val, pud_val and pgd_val " Aneesh Kumar K.V
2015-09-22 2:23 ` Scott Wood
2015-09-22 6:45 ` Aneesh Kumar K.V
2015-09-21 6:40 ` [PATCH 11/31] powerpc/mm: Move hash64 PTE bits from book3s/64/pgtable.h to hash.h Aneesh Kumar K.V
2015-09-21 6:40 ` [PATCH 12/31] powerpc/mm: Move PTE bits from generic functions to hash64 functions Aneesh Kumar K.V
2015-09-21 6:40 ` [PATCH 13/31] powerpc/booke: Move booke headers (part 1) Aneesh Kumar K.V
2015-09-21 6:40 ` [PATCH 14/31] powerpc/booke: Move booke headers (part 2) Aneesh Kumar K.V
2015-09-21 6:40 ` [PATCH 15/31] powerpc/booke: Move booke headers (part 3) Aneesh Kumar K.V
2015-09-21 6:40 ` [PATCH 16/31] powerpc/booke: Move booke headers (part 4) Aneesh Kumar K.V
2015-09-21 6:40 ` [PATCH 17/31] powerpc/booke: Move booke headers (part 5) Aneesh Kumar K.V
2015-09-21 6:40 ` [PATCH 18/31] powerpc/mm: Increase the pte frag size Aneesh Kumar K.V
2015-09-21 8:14 ` Benjamin Herrenschmidt
2015-09-21 8:45 ` Aneesh Kumar K.V
2015-09-21 11:06 ` Benjamin Herrenschmidt
2015-09-21 11:53 ` Aneesh Kumar K.V
2015-09-23 21:37 ` Benjamin Herrenschmidt
2015-09-28 4:55 ` Aneesh Kumar K.V
2015-09-21 6:40 ` [PATCH 19/31] powerpc/mm: Convert 4k hash insert to C Aneesh Kumar K.V
2015-09-21 8:16 ` Benjamin Herrenschmidt
2015-09-21 8:57 ` Aneesh Kumar K.V
2015-09-29 8:13 ` Aneesh Kumar K.V
2015-09-21 6:40 ` [PATCH 20/31] powerpc/mm: update __real_pte to take address as argument Aneesh Kumar K.V
2015-09-21 6:40 ` [PATCH 21/31] powerpc/mm: make pte page hash index slot 8 bits Aneesh Kumar K.V
2015-09-21 6:40 ` [PATCH 22/31] powerpc/mm: Don't track subpage valid bit in pte_t Aneesh Kumar K.V
2015-09-21 6:40 ` [PATCH 23/31] powerpc/mm: Increase the width of #define Aneesh Kumar K.V
2015-09-21 6:40 ` [PATCH 24/31] powerpc/mm: Convert __hash_page_64K to C Aneesh Kumar K.V
2015-09-23 13:56 ` Anshuman Khandual
2015-09-28 4:58 ` Aneesh Kumar K.V
2015-09-21 6:40 ` [PATCH 25/31] powerpc/mm: Convert 4k insert from asm " Aneesh Kumar K.V
2015-09-21 6:40 ` Aneesh Kumar K.V [this message]
2015-09-21 6:40 ` [PATCH 27/31] powerpc/mm: Add helper for converting pte bit to hpte bits Aneesh Kumar K.V
2015-09-21 6:40 ` [PATCH 28/31] powerpc/mm: Move WIMG update to helper Aneesh Kumar K.V
2015-09-21 6:40 ` [PATCH 29/31] powerpc/mm: Move hugetlb related headers Aneesh Kumar K.V
2015-09-21 6:40 ` [PATCH 30/31] powerpc/mm: Move THP headers around Aneesh Kumar K.V
2015-09-21 6:40 ` [PATCH 31/31] powerpc/mm: Add a _PAGE_PTE bit Aneesh Kumar K.V
2015-09-21 21:48 ` [PATCH 00/31] powerpc/mm: Update page table format for book3s 64 Scott Wood
2015-09-22 6:48 ` Aneesh Kumar K.V
2015-09-22 6:57 ` Scott Wood
2015-09-28 4:56 ` Aneesh Kumar K.V
2015-09-28 16:41 ` Scott Wood
2015-09-30 1:44 ` Michael Ellerman
2015-09-29 0:12 ` Benjamin Herrenschmidt
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