linuxppc-dev.lists.ozlabs.org archive mirror
 help / color / mirror / Atom feed
From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
To: benh@kernel.crashing.org, paulus@samba.org, mpe@ellerman.id.au
Cc: linuxppc-dev@lists.ozlabs.org,
	"Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
Subject: [PATCH 29/31] powerpc/mm: Move hugetlb related headers
Date: Mon, 21 Sep 2015 12:10:56 +0530	[thread overview]
Message-ID: <1442817658-2588-30-git-send-email-aneesh.kumar@linux.vnet.ibm.com> (raw)
In-Reply-To: <1442817658-2588-1-git-send-email-aneesh.kumar@linux.vnet.ibm.com>

W.r.t hugetlb, we support two format for pmd. With book3s_64 and
64K linux page size, we can have pte at the pmd level. Hence we
don't need to support hugepd there. For everything else hugepd
is supported and pmd_huge is (0).

Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
---
 arch/powerpc/include/asm/book3s/64/hash-4k.h  | 31 ++++++++++++++++
 arch/powerpc/include/asm/book3s/64/hash-64k.h | 40 ++++++++++++++++++++
 arch/powerpc/include/asm/booke/pgtable.h      | 25 +++++++++++++
 arch/powerpc/include/asm/page.h               | 27 ++------------
 arch/powerpc/mm/hugetlbpage.c                 | 53 ---------------------------
 5 files changed, 100 insertions(+), 76 deletions(-)

diff --git a/arch/powerpc/include/asm/book3s/64/hash-4k.h b/arch/powerpc/include/asm/book3s/64/hash-4k.h
index 75e8b9326e4b..b4d25529d179 100644
--- a/arch/powerpc/include/asm/book3s/64/hash-4k.h
+++ b/arch/powerpc/include/asm/book3s/64/hash-4k.h
@@ -93,6 +93,37 @@ extern struct page *pgd_page(pgd_t pgd);
 #define remap_4k_pfn(vma, addr, pfn, prot)	\
 	remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, (prot))
 
+#ifdef CONFIG_HUGETLB_PAGE
+/*
+ * For 4k page size, we support explicit hugepage via hugepd
+ */
+static inline int pmd_huge(pmd_t pmd)
+{
+	return 0;
+}
+
+static inline int pud_huge(pud_t pud)
+{
+	return 0;
+}
+
+static inline int pgd_huge(pgd_t pgd)
+{
+	return 0;
+}
+#define pgd_huge pgd_huge
+
+static inline int hugepd_ok(hugepd_t hpd)
+{
+	/*
+	 * hugepd pointer, bottom two bits == 00 and next 4 bits
+	 * indicate size of table
+	 */
+	return (((hpd.pd & 0x3) == 0x0) && ((hpd.pd & HUGEPD_SHIFT_MASK) != 0));
+}
+#define is_hugepd(hpd)		(hugepd_ok(hpd))
+#endif
+
 #endif /* !__ASSEMBLY__ */
 
 #endif /* _ASM_POWERPC_BOOK3S_64_HASH_4K_H */
diff --git a/arch/powerpc/include/asm/book3s/64/hash-64k.h b/arch/powerpc/include/asm/book3s/64/hash-64k.h
index f46fbd6cd837..0869e5fe5d08 100644
--- a/arch/powerpc/include/asm/book3s/64/hash-64k.h
+++ b/arch/powerpc/include/asm/book3s/64/hash-64k.h
@@ -119,6 +119,46 @@ static inline bool __rpte_sub_valid(real_pte_t rpte, unsigned long index)
 #define pgd_pte(pgd)	(pud_pte(((pud_t){ pgd })))
 #define pte_pgd(pte)	((pgd_t)pte_pud(pte))
 
+#ifdef CONFIG_HUGETLB_PAGE
+/*
+ * We have PGD_INDEX_SIZ = 12 and PTE_INDEX_SIZE = 8, so that we can have
+ * 16GB hugepage pte in PGD and 16MB hugepage pte at PMD;
+ *
+ * Defined in such a way that we can optimize away code block at build time
+ * if CONFIG_HUGETLB_PAGE=n.
+ */
+static inline int pmd_huge(pmd_t pmd)
+{
+	/*
+	 * leaf pte for huge page, bottom two bits != 00
+	 */
+	return ((pmd_val(pmd) & 0x3) != 0x0);
+}
+
+static inline int pud_huge(pud_t pud)
+{
+	/*
+	 * leaf pte for huge page, bottom two bits != 00
+	 */
+	return ((pud_val(pud) & 0x3) != 0x0);
+}
+
+static inline int pgd_huge(pgd_t pgd)
+{
+	/*
+	 * leaf pte for huge page, bottom two bits != 00
+	 */
+	return ((pgd_val(pgd) & 0x3) != 0x0);
+}
+#define pgd_huge pgd_huge
+
+static inline int hugepd_ok(hugepd_t hpd)
+{
+	return 0;
+}
+#define is_hugepd(pdep)			0
+#endif /* CONFIG_HUGETLB_PAGE */
+
 #endif	/* __ASSEMBLY__ */
 
 #endif /* _ASM_POWERPC_BOOK3S_64_HASH_64K_H */
diff --git a/arch/powerpc/include/asm/booke/pgtable.h b/arch/powerpc/include/asm/booke/pgtable.h
index 8d2fa3e9c7af..919836300333 100644
--- a/arch/powerpc/include/asm/booke/pgtable.h
+++ b/arch/powerpc/include/asm/booke/pgtable.h
@@ -223,5 +223,30 @@ extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
 				     unsigned long size, pgprot_t vma_prot);
 #define __HAVE_PHYS_MEM_ACCESS_PROT
 
+#ifdef CONFIG_HUGETLB_PAGE
+static inline int hugepd_ok(hugepd_t hpd)
+{
+	return (hpd.pd > 0);
+}
+
+static inline int pmd_huge(pmd_t pmd)
+{
+	return 0;
+}
+
+static inline int pud_huge(pud_t pud)
+{
+	return 0;
+}
+
+static inline int pgd_huge(pgd_t pgd)
+{
+	return 0;
+}
+#define pgd_huge		pgd_huge
+
+#define is_hugepd(hpd)		(hugepd_ok(hpd))
+#endif
+
 #endif /* __ASSEMBLY__ */
 #endif
diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h
index b30673564a32..e555f273716d 100644
--- a/arch/powerpc/include/asm/page.h
+++ b/arch/powerpc/include/asm/page.h
@@ -384,30 +384,11 @@ typedef unsigned long pgprot_t;
 
 typedef struct { signed long pd; } hugepd_t;
 
-#ifdef CONFIG_HUGETLB_PAGE
-#ifdef CONFIG_PPC_BOOK3S_64
-static inline int hugepd_ok(hugepd_t hpd)
-{
-	/*
-	 * hugepd pointer, bottom two bits == 00 and next 4 bits
-	 * indicate size of table
-	 */
-	return (((hpd.pd & 0x3) == 0x0) && ((hpd.pd & HUGEPD_SHIFT_MASK) != 0));
-}
-#else
-static inline int hugepd_ok(hugepd_t hpd)
-{
-	return (hpd.pd > 0);
-}
-#endif
-
-#define is_hugepd(hpd)               (hugepd_ok(hpd))
-#define pgd_huge pgd_huge
-int pgd_huge(pgd_t pgd);
-#else /* CONFIG_HUGETLB_PAGE */
-#define is_hugepd(pdep)			0
-#define pgd_huge(pgd)			0
+#ifndef CONFIG_HUGETLB_PAGE
+#define is_hugepd(pdep)		(0)
+#define pgd_huge(pgd)		(0)
 #endif /* CONFIG_HUGETLB_PAGE */
+
 #define __hugepd(x) ((hugepd_t) { (x) })
 
 struct page;
diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
index 06c14523b787..98bb20c9f71d 100644
--- a/arch/powerpc/mm/hugetlbpage.c
+++ b/arch/powerpc/mm/hugetlbpage.c
@@ -53,59 +53,6 @@ static unsigned nr_gpages;
 
 #define hugepd_none(hpd)	((hpd).pd == 0)
 
-#ifdef CONFIG_PPC_BOOK3S_64
-/*
- * At this point we do the placement change only for BOOK3S 64. This would
- * possibly work on other subarchs.
- */
-
-/*
- * We have PGD_INDEX_SIZ = 12 and PTE_INDEX_SIZE = 8, so that we can have
- * 16GB hugepage pte in PGD and 16MB hugepage pte at PMD;
- *
- * Defined in such a way that we can optimize away code block at build time
- * if CONFIG_HUGETLB_PAGE=n.
- */
-int pmd_huge(pmd_t pmd)
-{
-	/*
-	 * leaf pte for huge page, bottom two bits != 00
-	 */
-	return ((pmd_val(pmd) & 0x3) != 0x0);
-}
-
-int pud_huge(pud_t pud)
-{
-	/*
-	 * leaf pte for huge page, bottom two bits != 00
-	 */
-	return ((pud_val(pud) & 0x3) != 0x0);
-}
-
-int pgd_huge(pgd_t pgd)
-{
-	/*
-	 * leaf pte for huge page, bottom two bits != 00
-	 */
-	return ((pgd_val(pgd) & 0x3) != 0x0);
-}
-#else
-int pmd_huge(pmd_t pmd)
-{
-	return 0;
-}
-
-int pud_huge(pud_t pud)
-{
-	return 0;
-}
-
-int pgd_huge(pgd_t pgd)
-{
-	return 0;
-}
-#endif
-
 pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr)
 {
 	/* Only called for hugetlbfs pages, hence can ignore THP */
-- 
2.5.0

  parent reply	other threads:[~2015-09-21  6:43 UTC|newest]

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-21  6:40 [PATCH 00/31] powerpc/mm: Update page table format for book3s 64 Aneesh Kumar K.V
2015-09-21  6:40 ` [PATCH 01/31] powerpc/mm: move pte headers to book3s directory Aneesh Kumar K.V
2015-09-21  6:40 ` [PATCH 02/31] powerpc/mm: move pte headers to book3s directory (part 2) Aneesh Kumar K.V
2015-09-21  6:40 ` [PATCH 03/31] powerpc/mm: make a separate copy for book3s Aneesh Kumar K.V
2015-09-21 21:58   ` Scott Wood
2015-09-22  6:42     ` Aneesh Kumar K.V
2015-09-21  6:40 ` [PATCH 04/31] powerpc/mm: make a separate copy for book3s (part 2) Aneesh Kumar K.V
2015-09-21  6:40 ` [PATCH 05/31] powerpc/mm: Move hash specific pte width and other defines to book3s Aneesh Kumar K.V
2015-09-21  6:40 ` [PATCH 06/31] powerpc/mm: Delete booke bits from book3s Aneesh Kumar K.V
2015-09-21  6:40 ` [PATCH 07/31] powerpc/mm: Don't have generic headers introduce functions touching pte bits Aneesh Kumar K.V
2015-09-21  6:40 ` [PATCH 08/31] powerpc/mm: Drop pte-common.h from BOOK3S 64 Aneesh Kumar K.V
2015-09-21  6:40 ` [PATCH 09/31] powerpc/mm: Don't use pte_val as lvalue Aneesh Kumar K.V
2015-09-22  2:22   ` Scott Wood
2015-09-22  6:44     ` Aneesh Kumar K.V
2015-09-22  6:46       ` Scott Wood
2015-09-21  6:40 ` [PATCH 10/31] powerpc/mm: Don't use pmd_val, pud_val and pgd_val " Aneesh Kumar K.V
2015-09-22  2:23   ` Scott Wood
2015-09-22  6:45     ` Aneesh Kumar K.V
2015-09-21  6:40 ` [PATCH 11/31] powerpc/mm: Move hash64 PTE bits from book3s/64/pgtable.h to hash.h Aneesh Kumar K.V
2015-09-21  6:40 ` [PATCH 12/31] powerpc/mm: Move PTE bits from generic functions to hash64 functions Aneesh Kumar K.V
2015-09-21  6:40 ` [PATCH 13/31] powerpc/booke: Move booke headers (part 1) Aneesh Kumar K.V
2015-09-21  6:40 ` [PATCH 14/31] powerpc/booke: Move booke headers (part 2) Aneesh Kumar K.V
2015-09-21  6:40 ` [PATCH 15/31] powerpc/booke: Move booke headers (part 3) Aneesh Kumar K.V
2015-09-21  6:40 ` [PATCH 16/31] powerpc/booke: Move booke headers (part 4) Aneesh Kumar K.V
2015-09-21  6:40 ` [PATCH 17/31] powerpc/booke: Move booke headers (part 5) Aneesh Kumar K.V
2015-09-21  6:40 ` [PATCH 18/31] powerpc/mm: Increase the pte frag size Aneesh Kumar K.V
2015-09-21  8:14   ` Benjamin Herrenschmidt
2015-09-21  8:45     ` Aneesh Kumar K.V
2015-09-21 11:06       ` Benjamin Herrenschmidt
2015-09-21 11:53         ` Aneesh Kumar K.V
2015-09-23 21:37           ` Benjamin Herrenschmidt
2015-09-28  4:55             ` Aneesh Kumar K.V
2015-09-21  6:40 ` [PATCH 19/31] powerpc/mm: Convert 4k hash insert to C Aneesh Kumar K.V
2015-09-21  8:16   ` Benjamin Herrenschmidt
2015-09-21  8:57     ` Aneesh Kumar K.V
2015-09-29  8:13     ` Aneesh Kumar K.V
2015-09-21  6:40 ` [PATCH 20/31] powerpc/mm: update __real_pte to take address as argument Aneesh Kumar K.V
2015-09-21  6:40 ` [PATCH 21/31] powerpc/mm: make pte page hash index slot 8 bits Aneesh Kumar K.V
2015-09-21  6:40 ` [PATCH 22/31] powerpc/mm: Don't track subpage valid bit in pte_t Aneesh Kumar K.V
2015-09-21  6:40 ` [PATCH 23/31] powerpc/mm: Increase the width of #define Aneesh Kumar K.V
2015-09-21  6:40 ` [PATCH 24/31] powerpc/mm: Convert __hash_page_64K to C Aneesh Kumar K.V
2015-09-23 13:56   ` Anshuman Khandual
2015-09-28  4:58     ` Aneesh Kumar K.V
2015-09-21  6:40 ` [PATCH 25/31] powerpc/mm: Convert 4k insert from asm " Aneesh Kumar K.V
2015-09-21  6:40 ` [PATCH 26/31] powerpc/mm: Remove the dependency on pte bit position in asm code Aneesh Kumar K.V
2015-09-21  6:40 ` [PATCH 27/31] powerpc/mm: Add helper for converting pte bit to hpte bits Aneesh Kumar K.V
2015-09-21  6:40 ` [PATCH 28/31] powerpc/mm: Move WIMG update to helper Aneesh Kumar K.V
2015-09-21  6:40 ` Aneesh Kumar K.V [this message]
2015-09-21  6:40 ` [PATCH 30/31] powerpc/mm: Move THP headers around Aneesh Kumar K.V
2015-09-21  6:40 ` [PATCH 31/31] powerpc/mm: Add a _PAGE_PTE bit Aneesh Kumar K.V
2015-09-21 21:48 ` [PATCH 00/31] powerpc/mm: Update page table format for book3s 64 Scott Wood
2015-09-22  6:48   ` Aneesh Kumar K.V
2015-09-22  6:57     ` Scott Wood
2015-09-28  4:56       ` Aneesh Kumar K.V
2015-09-28 16:41         ` Scott Wood
2015-09-30  1:44           ` Michael Ellerman
2015-09-29  0:12         ` Benjamin Herrenschmidt

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1442817658-2588-30-git-send-email-aneesh.kumar@linux.vnet.ibm.com \
    --to=aneesh.kumar@linux.vnet.ibm.com \
    --cc=benh@kernel.crashing.org \
    --cc=linuxppc-dev@lists.ozlabs.org \
    --cc=mpe@ellerman.id.au \
    --cc=paulus@samba.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).