From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
To: linuxppc-dev@ozlabs.org
Cc: mpe@ellerman.id.au, mikey@neuling.org, dja@axtens.net
Subject: [PATCH V11 01/10] powerpc/perf: Change name & type of 'pred' in power_pmu_bhrb_read
Date: Mon, 5 Oct 2015 15:29:03 +0530 [thread overview]
Message-ID: <1444039152-3665-2-git-send-email-khandual@linux.vnet.ibm.com> (raw)
In-Reply-To: <1444039152-3665-1-git-send-email-khandual@linux.vnet.ibm.com>
Branch record attributes 'mispred' and 'predicted' are single bit
fields as defined in the perf ABI. Hence the data type of the field
'pred' used during BHRB processing should be changed from integer
to bool. This patch also changes the name of the variable from 'pred'
to 'mispred' making the logical inversion process more meaningful
and readable.
Reported-by: Daniel Axtens <dja@axtens.net>
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
---
arch/powerpc/perf/core-book3s.c | 15 +++++++++------
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index b0382f3..d6b31d0 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -426,7 +426,8 @@ static void power_pmu_bhrb_read(struct cpu_hw_events *cpuhw)
{
u64 val;
u64 addr;
- int r_index, u_index, pred;
+ int r_index, u_index;
+ bool mispred;
r_index = 0;
u_index = 0;
@@ -438,7 +439,7 @@ static void power_pmu_bhrb_read(struct cpu_hw_events *cpuhw)
break;
else {
addr = val & BHRB_EA;
- pred = val & BHRB_PREDICTION;
+ mispred = val & BHRB_PREDICTION;
if (!addr)
/* invalid entry */
@@ -467,8 +468,9 @@ static void power_pmu_bhrb_read(struct cpu_hw_events *cpuhw)
* (ie. computed gotos/XL form)
*/
cpuhw->bhrb_entries[u_index].to = addr;
- cpuhw->bhrb_entries[u_index].mispred = pred;
- cpuhw->bhrb_entries[u_index].predicted = ~pred;
+ cpuhw->bhrb_entries[u_index].mispred = mispred;
+ cpuhw->bhrb_entries[u_index].predicted =
+ ~mispred;
/* Get from address in next entry */
val = read_bhrb(r_index++);
@@ -486,8 +488,9 @@ static void power_pmu_bhrb_read(struct cpu_hw_events *cpuhw)
cpuhw->bhrb_entries[u_index].from = addr;
cpuhw->bhrb_entries[u_index].to =
power_pmu_bhrb_to(addr);
- cpuhw->bhrb_entries[u_index].mispred = pred;
- cpuhw->bhrb_entries[u_index].predicted = ~pred;
+ cpuhw->bhrb_entries[u_index].mispred = mispred;
+ cpuhw->bhrb_entries[u_index].predicted =
+ ~mispred;
}
u_index++;
--
2.1.0
next prev parent reply other threads:[~2015-10-05 9:59 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-05 9:59 [PATCH V11 00/10] powerpc/perf: Enable SW branch filters Anshuman Khandual
2015-10-05 9:59 ` Anshuman Khandual [this message]
2015-10-05 9:59 ` [PATCH V11 02/10] powerpc/perf: Re organize PMU branch filter processing on POWER8 Anshuman Khandual
2015-10-05 9:59 ` [PATCH V11 03/10] powerpc/perf: Restore privilege level filter support for BHRB Anshuman Khandual
2015-10-05 9:59 ` [PATCH V11 04/10] powerpc/perf: Re organize BHRB processing Anshuman Khandual
2015-10-05 9:59 ` [PATCH V11 05/10] powerpc/perf: Change the name of HW PMU branch filter tracking variable Anshuman Khandual
2015-10-05 9:59 ` [PATCH V11 06/10] powerpc/lib: Add new branch analysis support functions Anshuman Khandual
2015-10-05 9:59 ` [PATCH V11 07/10] powerpc/perf: Enable SW filtering in branch stack sampling framework Anshuman Khandual
2015-10-05 9:59 ` [PATCH V11 08/10] powerpc/perf: Change POWER8 PMU configuration to work with SW filters Anshuman Khandual
2015-10-05 9:59 ` [PATCH V11 09/10] powerpc/perf: Enable privilege mode SW branch filters Anshuman Khandual
2015-10-05 9:59 ` [PATCH V11 10/10] selftests/powerpc: Add test for BHRB branch filters (HW & SW) Anshuman Khandual
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