From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
To: linux-kernel@vger.kernel.org, linuxppc-dev@ozlabs.org
Cc: peterz@infradead.org, akpm@linux-foundation.org,
tglx@linutronix.de, james.hogan@imgtec.com, avagin@openvz.org,
Paul.Clothier@imgtec.com, palves@redhat.com, oleg@redhat.com,
dhowells@redhat.com, davej@redhat.com, davem@davemloft.net,
mikey@neuling.org, benh@kernel.crashing.org,
sukadev@linux.vnet.ibm.com, mpe@ellerman.id.au,
sam.bobroff@au1.ibm.com, kirjanov@gmail.com,
shuahkh@osg.samsung.com, Ulrich.Weigand@de.ibm.com,
emachado@linux.vnet.ibm.com
Subject: [PATCH V9 04/28] powerpc, ptrace: Enable in transaction NT_PPC_VMX ptrace requests
Date: Thu, 8 Oct 2015 20:17:25 +0530 [thread overview]
Message-ID: <1444315669-23487-5-git-send-email-khandual@linux.vnet.ibm.com> (raw)
In-Reply-To: <1444315669-23487-1-git-send-email-khandual@linux.vnet.ibm.com>
This patch enables in transaction NT_PPC_VMX ptrace requests. The
function vr_get which gets the running value of all VMX registers
and the function vr_set which sets the running value of of all VMX
registers work on the running set of VMX registers whose location
will be different if transaction is active. This patch makes these
functions adapt to situations when the transaction is active.
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
---
arch/powerpc/kernel/ptrace.c | 90 ++++++++++++++++++++++++++++++++++++++++++--
1 file changed, 87 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 0ddaddd..b127db2 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -517,10 +517,28 @@ static int vr_active(struct task_struct *target,
return target->thread.used_vr ? regset->n : 0;
}
+/*
+ * When the transaction is active, 'transact_vr' holds the current running
+ * value of all the VMX registers and 'vr_state' holds the last checkpointed
+ * value of all the VMX registers for the current transaction to fall back
+ * on in case it aborts. When transaction is not active 'vr_state' holds
+ * the current running state of all the VMX registers. So this function which
+ * gets the current running values of all the VMX registers, needs to know
+ * whether any transaction is active or not.
+ *
+ * Userspace interface buffer layout:
+ *
+ * struct data {
+ * vector128 vr[32];
+ * vector128 vscr;
+ * vector128 vrsave;
+ * };
+ */
static int vr_get(struct task_struct *target, const struct user_regset *regset,
unsigned int pos, unsigned int count,
void *kbuf, void __user *ubuf)
{
+ struct thread_vr_state *addr;
int ret;
flush_altivec_to_thread(target);
@@ -528,8 +546,19 @@ static int vr_get(struct task_struct *target, const struct user_regset *regset,
BUILD_BUG_ON(offsetof(struct thread_vr_state, vscr) !=
offsetof(struct thread_vr_state, vr[32]));
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
+ if (MSR_TM_ACTIVE(target->thread.regs->msr)) {
+ flush_fp_to_thread(target);
+ flush_tmregs_to_thread(target);
+ addr = &target->thread.transact_vr;
+ } else {
+ addr = &target->thread.vr_state;
+ }
+#else
+ addr = &target->thread.vr_state;
+#endif
ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
- &target->thread.vr_state, 0,
+ addr, 0,
33 * sizeof(vector128));
if (!ret) {
/*
@@ -540,7 +569,16 @@ static int vr_get(struct task_struct *target, const struct user_regset *regset,
u32 word;
} vrsave;
memset(&vrsave, 0, sizeof(vrsave));
+
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
+ if (MSR_TM_ACTIVE(target->thread.regs->msr))
+ vrsave.word = target->thread.transact_vrsave;
+ else
+ vrsave.word = target->thread.vrsave;
+#else
vrsave.word = target->thread.vrsave;
+#endif
+
ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &vrsave,
33 * sizeof(vector128), -1);
}
@@ -548,10 +586,28 @@ static int vr_get(struct task_struct *target, const struct user_regset *regset,
return ret;
}
+/*
+ * When the transaction is active, 'transact_vr' holds the current running
+ * value of all the VMX registers and 'vr_state' holds the last checkpointed
+ * value of all the VMX registers for the current transaction to fall back
+ * on in case it aborts. When transaction is not active 'vr_state' holds
+ * the current running state of all the VMX registers. So this function which
+ * sets the current running values of all the VMX registers, needs to know
+ * whether any transaction is active or not.
+ *
+ * Userspace interface buffer layout:
+ *
+ * struct data {
+ * vector128 vr[32];
+ * vector128 vscr;
+ * vector128 vrsave;
+ * };
+ */
static int vr_set(struct task_struct *target, const struct user_regset *regset,
unsigned int pos, unsigned int count,
const void *kbuf, const void __user *ubuf)
{
+ struct thread_vr_state *addr;
int ret;
flush_altivec_to_thread(target);
@@ -559,8 +615,19 @@ static int vr_set(struct task_struct *target, const struct user_regset *regset,
BUILD_BUG_ON(offsetof(struct thread_vr_state, vscr) !=
offsetof(struct thread_vr_state, vr[32]));
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
+ if (MSR_TM_ACTIVE(target->thread.regs->msr)) {
+ flush_fp_to_thread(target);
+ flush_tmregs_to_thread(target);
+ addr = &target->thread.transact_vr;
+ } else {
+ addr = &target->thread.vr_state;
+ }
+#else
+ addr = &target->thread.vr_state;
+#endif
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
- &target->thread.vr_state, 0,
+ addr, 0,
33 * sizeof(vector128));
if (!ret && count > 0) {
/*
@@ -571,11 +638,28 @@ static int vr_set(struct task_struct *target, const struct user_regset *regset,
u32 word;
} vrsave;
memset(&vrsave, 0, sizeof(vrsave));
+
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
+ if (MSR_TM_ACTIVE(target->thread.regs->msr))
+ vrsave.word = target->thread.transact_vrsave;
+ else
+ vrsave.word = target->thread.vrsave;
+#else
vrsave.word = target->thread.vrsave;
+#endif
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &vrsave,
33 * sizeof(vector128), -1);
- if (!ret)
+ if (!ret) {
+
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
+ if (MSR_TM_ACTIVE(target->thread.regs->msr))
+ target->thread.transact_vrsave = vrsave.word;
+ else
+ target->thread.vrsave = vrsave.word;
+#else
target->thread.vrsave = vrsave.word;
+#endif
+ }
}
return ret;
--
2.1.0
next prev parent reply other threads:[~2015-10-08 14:49 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-08 14:47 [PATCH V9 00/28] Add new powerpc specific ELF core notes Anshuman Khandual
2015-10-08 14:47 ` [PATCH V9 01/28] elf: Add powerpc specific core note sections Anshuman Khandual
2015-10-08 14:47 ` [PATCH V9 02/28] powerpc, process: Add the function flush_tmregs_to_thread Anshuman Khandual
2015-10-08 14:47 ` [PATCH V9 03/28] powerpc, ptrace: Enable in transaction NT_PRFPREG ptrace requests Anshuman Khandual
2015-10-08 14:47 ` Anshuman Khandual [this message]
2015-10-08 14:47 ` [PATCH V9 05/28] powerpc, ptrace: Enable in transaction NT_PPC_VSX " Anshuman Khandual
2015-10-08 14:47 ` [PATCH V9 06/28] powerpc, ptrace: Adapt gpr32_get, gpr32_set functions for transaction Anshuman Khandual
2015-10-08 14:47 ` [PATCH V9 07/28] powerpc, ptrace: Enable support for NT_PPC_CGPR Anshuman Khandual
2015-10-08 14:47 ` [PATCH V9 08/28] powerpc, ptrace: Enable support for NT_PPC_CFPR Anshuman Khandual
2015-10-08 14:47 ` [PATCH V9 09/28] powerpc, ptrace: Enable support for NT_PPC_CVMX Anshuman Khandual
2015-10-08 14:47 ` [PATCH V9 10/28] powerpc, ptrace: Enable support for NT_PPC_CVSX Anshuman Khandual
2015-10-08 14:47 ` [PATCH V9 11/28] powerpc, ptrace: Enable support for TM SPR state Anshuman Khandual
2015-10-08 14:47 ` [PATCH V9 12/28] powerpc, ptrace: Enable NT_PPC_TM_CTAR, NT_PPC_TM_CPPR, NT_PPC_TM_CDSCR Anshuman Khandual
2015-10-08 14:47 ` [PATCH V9 13/28] powerpc, ptrace: Enable support for NT_PPPC_TAR, NT_PPC_PPR, NT_PPC_DSCR Anshuman Khandual
2015-10-08 14:47 ` [PATCH V9 14/28] powerpc, ptrace: Enable support for EBB registers Anshuman Khandual
2015-10-08 14:47 ` [PATCH V9 15/28] selftests, powerpc: Move 'reg.h' file outside of 'ebb' sub directory Anshuman Khandual
2015-10-08 14:47 ` [PATCH V9 16/28] selftests, powerpc: Add more SPR numbers, TM & VMX instructions to 'reg.h' Anshuman Khandual
2015-10-08 14:47 ` [PATCH V9 17/28] selftests, powerpc: Add ptrace tests for EBB Anshuman Khandual
2015-10-08 14:47 ` [PATCH V9 18/28] selftests, powerpc: Add ptrace tests for GPR/FPR registers Anshuman Khandual
2015-10-08 14:47 ` [PATCH V9 19/28] selftests, powerpc: Add ptrace tests for GPR/FPR registers in TM Anshuman Khandual
2015-10-08 14:47 ` [PATCH V9 20/28] selftests, powerpc: Add ptrace tests for GPR/FPR registers in suspended TM Anshuman Khandual
2015-10-08 14:47 ` [PATCH V9 21/28] selftests, powerpc: Add ptrace tests for TAR, PPR, DSCR registers Anshuman Khandual
2015-10-08 14:47 ` [PATCH V9 22/28] selftests, powerpc: Add ptrace tests for TAR, PPR, DSCR in TM Anshuman Khandual
2015-10-08 14:47 ` [PATCH V9 23/28] selftests, powerpc: Add ptrace tests for TAR, PPR, DSCR in suspended TM Anshuman Khandual
2015-10-08 14:47 ` [PATCH V9 24/28] selftests, powerpc: Add ptrace tests for VSX, VMX registers Anshuman Khandual
2015-10-08 14:47 ` [PATCH V9 25/28] selftests, powerpc: Add ptrace tests for VSX, VMX registers in TM Anshuman Khandual
2015-10-08 14:47 ` [PATCH V9 26/28] selftests, powerpc: Add ptrace tests for VSX, VMX registers in suspended TM Anshuman Khandual
2015-10-08 14:47 ` [PATCH V9 27/28] selftests, powerpc: Add ptrace tests for TM SPR registers Anshuman Khandual
2015-10-08 14:47 ` [PATCH V9 28/28] selftests, powerpc: Add .gitignore file for ptrace executables Anshuman Khandual
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