From: Joakim Tjernlund <joakim.tjernlund@transmode.se>
To: "linuxppc-dev@lists.ozlabs.org" <linuxppc-dev@lists.ozlabs.org>
Subject: devicetree and IRQ7 mapping for T1042(mpic)
Date: Wed, 14 Oct 2015 19:37:32 +0000 [thread overview]
Message-ID: <1444851451.28972.59.camel@transmode.se> (raw)
I am trying to figure out how to describe/map external IRQ7 in the devicetr=
ee.
Basically either IRQ7 to be left alone by Linux(becase u-boot already set i=
t up)
or map IRQ7 to sie 0(MPIC_EILR7=3D0xf0) and prio=3D0xf(MPIC_EIVPR7=3D0x4f00=
00)
There is no need for SW handler because IRQ7 will be routed to the DDR cont=
roller
and case an automatic Self Refresh just before CPU reset.
I cannot figure out how to do this. Any ideas?
If not possible from devicetree, then can one do it from board code?
Jocke=
next reply other threads:[~2015-10-14 19:37 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-14 19:37 Joakim Tjernlund [this message]
2015-10-15 0:11 ` devicetree and IRQ7 mapping for T1042(mpic) Scott Wood
2015-10-15 0:14 ` Scott Wood
2015-10-15 7:11 ` Joakim Tjernlund
2015-10-15 7:14 ` Scott Wood
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