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* devicetree and IRQ7 mapping for T1042(mpic)
@ 2015-10-14 19:37 Joakim Tjernlund
  2015-10-15  0:11 ` Scott Wood
  0 siblings, 1 reply; 5+ messages in thread
From: Joakim Tjernlund @ 2015-10-14 19:37 UTC (permalink / raw)
  To: linuxppc-dev@lists.ozlabs.org

I am trying to figure out how to describe/map external IRQ7 in the devicetr=
ee.

Basically either IRQ7 to be left alone by Linux(becase u-boot already set i=
t up)
or map IRQ7 to sie 0(MPIC_EILR7=3D0xf0) and prio=3D0xf(MPIC_EIVPR7=3D0x4f00=
00)

There is no need for SW handler because IRQ7 will be routed to the DDR cont=
roller
and case an automatic Self Refresh just before CPU reset.

I cannot figure out how to do this. Any ideas?

If not possible from devicetree, then can one do it from board code?

 Jocke=

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2015-10-15  7:14 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2015-10-14 19:37 devicetree and IRQ7 mapping for T1042(mpic) Joakim Tjernlund
2015-10-15  0:11 ` Scott Wood
2015-10-15  0:14   ` Scott Wood
2015-10-15  7:11   ` Joakim Tjernlund
2015-10-15  7:14     ` Scott Wood

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