* devicetree and IRQ7 mapping for T1042(mpic)
@ 2015-10-14 19:37 Joakim Tjernlund
2015-10-15 0:11 ` Scott Wood
0 siblings, 1 reply; 5+ messages in thread
From: Joakim Tjernlund @ 2015-10-14 19:37 UTC (permalink / raw)
To: linuxppc-dev@lists.ozlabs.org
I am trying to figure out how to describe/map external IRQ7 in the devicetr=
ee.
Basically either IRQ7 to be left alone by Linux(becase u-boot already set i=
t up)
or map IRQ7 to sie 0(MPIC_EILR7=3D0xf0) and prio=3D0xf(MPIC_EIVPR7=3D0x4f00=
00)
There is no need for SW handler because IRQ7 will be routed to the DDR cont=
roller
and case an automatic Self Refresh just before CPU reset.
I cannot figure out how to do this. Any ideas?
If not possible from devicetree, then can one do it from board code?
Jocke=
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: devicetree and IRQ7 mapping for T1042(mpic)
2015-10-14 19:37 devicetree and IRQ7 mapping for T1042(mpic) Joakim Tjernlund
@ 2015-10-15 0:11 ` Scott Wood
2015-10-15 0:14 ` Scott Wood
2015-10-15 7:11 ` Joakim Tjernlund
0 siblings, 2 replies; 5+ messages in thread
From: Scott Wood @ 2015-10-15 0:11 UTC (permalink / raw)
To: Joakim Tjernlund; +Cc: linuxppc-dev@lists.ozlabs.org
On Wed, 2015-10-14 at 19:37 +0000, Joakim Tjernlund wrote:
> I am trying to figure out how to describe/map external IRQ7 in the
> devicetree.
>
> Basically either IRQ7 to be left alone by Linux(becase u-boot already set
> it up)
> or map IRQ7 to sie 0(MPIC_EILR7=0xf0) and prio=0xf(MPIC_EIVPR7=0x4f0000)
>
> There is no need for SW handler because IRQ7 will be routed to the DDR
> controller
> and case an automatic Self Refresh just before CPU reset.
>
> I cannot figure out how to do this. Any ideas?
>
> If not possible from devicetree, then can one do it from board code?
The device tree describes the hardware. Priority is configuration, and thus
doesn't belong there. You can call mpic_irq_set_priority() from board code.
Likewise, the fact that you want to route irq7 to sie0 is configuration, not
hardware description. At most, the device tree should describe is what is
connected to each sie output. There's no current Linux support for routing
an interrupt to sie or anything other than "int".
-Scott
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: devicetree and IRQ7 mapping for T1042(mpic)
2015-10-15 0:11 ` Scott Wood
@ 2015-10-15 0:14 ` Scott Wood
2015-10-15 7:11 ` Joakim Tjernlund
1 sibling, 0 replies; 5+ messages in thread
From: Scott Wood @ 2015-10-15 0:14 UTC (permalink / raw)
To: Joakim Tjernlund; +Cc: linuxppc-dev@lists.ozlabs.org
On Wed, 2015-10-14 at 19:11 -0500, Scott Wood wrote:
> On Wed, 2015-10-14 at 19:37 +0000, Joakim Tjernlund wrote:
> > I am trying to figure out how to describe/map external IRQ7 in the
> > devicetree.
> >
> > Basically either IRQ7 to be left alone by Linux(becase u-boot already set
> > it up)
> > or map IRQ7 to sie 0(MPIC_EILR7=0xf0) and prio=0xf(MPIC_EIVPR7=0x4f0000)
> >
> > There is no need for SW handler because IRQ7 will be routed to the DDR
> > controller
> > and case an automatic Self Refresh just before CPU reset.
> >
> > I cannot figure out how to do this. Any ideas?
> >
> > If not possible from devicetree, then can one do it from board code?
>
> The device tree describes the hardware. Priority is configuration, and
> thus
> doesn't belong there. You can call mpic_irq_set_priority() from board code.
>
> Likewise, the fact that you want to route irq7 to sie0 is configuration,
> not
> hardware description. At most, the device tree should describe is what is
> connected to each sie output. There's no current Linux support for routing
> an interrupt to sie or anything other than "int".
BTW, priority is meaningless for interrupts routed to sie.
-Scott
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: devicetree and IRQ7 mapping for T1042(mpic)
2015-10-15 0:11 ` Scott Wood
2015-10-15 0:14 ` Scott Wood
@ 2015-10-15 7:11 ` Joakim Tjernlund
2015-10-15 7:14 ` Scott Wood
1 sibling, 1 reply; 5+ messages in thread
From: Joakim Tjernlund @ 2015-10-15 7:11 UTC (permalink / raw)
To: scottwood@freescale.com; +Cc: linuxppc-dev@lists.ozlabs.org
On Wed, 2015-10-14 at 19:11 -0500, Scott Wood wrote:
> On Wed, 2015-10-14 at 19:37 +0000, Joakim Tjernlund wrote:
> > I am trying to figure out how to describe/map external IRQ7 in the=20
> > devicetree.
> >=20
> > Basically either IRQ7 to be left alone by Linux(becase u-boot already s=
et=20
> > it up)
> > or map IRQ7 to sie 0(MPIC_EILR7=3D0xf0) and prio=3D0xf(MPIC_EIVPR7=3D0x=
4f0000)
> >=20
> > There is no need for SW handler because IRQ7 will be routed to the DDR=
=20
> > controller
> > and case an automatic Self Refresh just before CPU reset.
> >=20
> > I cannot figure out how to do this. Any ideas?
> >=20
> > If not possible from devicetree, then can one do it from board code?
>=20
> The device tree describes the hardware. Priority is configuration, and t=
hus=20
> doesn't belong there. You can call mpic_irq_set_priority() from board co=
de.
Right.
>=20
> Likewise, the fact that you want to route irq7 to sie0 is configuration, =
not=20
> hardware description. At most, the device tree should describe is what i=
s=20
> connected to each sie output. There's no current Linux support for routi=
ng=20
> an interrupt to sie or anything other than "int".
That explains why I could not find any mpic function for that ..
I found mpic dev. trees property "protected-sources" which might do what I =
want, just
leave the the irq alone but I cannot figure out what value to write there.
Could you give me any example how to calculate dev. tree irq number for IRQ=
7?
The mpic.txt mentions "Interrupt Source Configuration Registers" but google=
did
not turn up anything useful for me.
Jocke=
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: devicetree and IRQ7 mapping for T1042(mpic)
2015-10-15 7:11 ` Joakim Tjernlund
@ 2015-10-15 7:14 ` Scott Wood
0 siblings, 0 replies; 5+ messages in thread
From: Scott Wood @ 2015-10-15 7:14 UTC (permalink / raw)
To: Joakim Tjernlund; +Cc: linuxppc-dev@lists.ozlabs.org
On Thu, 2015-10-15 at 07:11 +0000, Joakim Tjernlund wrote:
> On Wed, 2015-10-14 at 19:11 -0500, Scott Wood wrote:
> > On Wed, 2015-10-14 at 19:37 +0000, Joakim Tjernlund wrote:
> > > I am trying to figure out how to describe/map external IRQ7 in the
> > > devicetree.
> > >
> > > Basically either IRQ7 to be left alone by Linux(becase u-boot already
> > > set
> > > it up)
> > > or map IRQ7 to sie 0(MPIC_EILR7=0xf0) and prio=0xf(MPIC_EIVPR7=0x4f0000)
> > >
> > > There is no need for SW handler because IRQ7 will be routed to the DDR
> > > controller
> > > and case an automatic Self Refresh just before CPU reset.
> > >
> > > I cannot figure out how to do this. Any ideas?
> > >
> > > If not possible from devicetree, then can one do it from board code?
> >
> > The device tree describes the hardware. Priority is configuration, and
> > thus
> > doesn't belong there. You can call mpic_irq_set_priority() from board
> > code.
>
> Right.
>
> >
> > Likewise, the fact that you want to route irq7 to sie0 is configuration,
> > not
> > hardware description. At most, the device tree should describe is what
> > is
> > connected to each sie output. There's no current Linux support for
> > routing
> > an interrupt to sie or anything other than "int".
>
> That explains why I could not find any mpic function for that ..
>
> I found mpic dev. trees property "protected-sources" which might do what I
> want, just
> leave the the irq alone but I cannot figure out what value to write there.
> Could you give me any example how to calculate dev. tree irq number for
> IRQ7?
>
> The mpic.txt mentions "Interrupt Source Configuration Registers" but google
> did
> not turn up anything useful for me.
The device tree number for external IRQ 7 is 7. Another option is to use the
pic-no-reset property.
-Scott
^ permalink raw reply [flat|nested] 5+ messages in thread
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2015-10-14 19:37 devicetree and IRQ7 mapping for T1042(mpic) Joakim Tjernlund
2015-10-15 0:11 ` Scott Wood
2015-10-15 0:14 ` Scott Wood
2015-10-15 7:11 ` Joakim Tjernlund
2015-10-15 7:14 ` Scott Wood
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