From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from e28smtp06.in.ibm.com (e28smtp06.in.ibm.com [122.248.162.6]) (using TLSv1 with cipher CAMELLIA256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 2B2D71A02B0 for ; Wed, 21 Oct 2015 07:12:51 +1100 (AEDT) Received: from /spool/local by e28smtp06.in.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Wed, 21 Oct 2015 01:42:49 +0530 Received: from d28relay05.in.ibm.com (d28relay05.in.ibm.com [9.184.220.62]) by d28dlp01.in.ibm.com (Postfix) with ESMTP id A005FE005F for ; Wed, 21 Oct 2015 01:42:49 +0530 (IST) Received: from d28av04.in.ibm.com (d28av04.in.ibm.com [9.184.220.66]) by d28relay05.in.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id t9KKCjQS62521546 for ; Wed, 21 Oct 2015 01:42:45 +0530 Received: from d28av04.in.ibm.com (localhost [127.0.0.1]) by d28av04.in.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id t9KKCjU5006440 for ; Wed, 21 Oct 2015 01:42:45 +0530 From: "Aneesh Kumar K.V" To: benh@kernel.crashing.org, paulus@samba.org, mpe@ellerman.id.au Cc: linuxppc-dev@lists.ozlabs.org, "Aneesh Kumar K.V" Subject: [RFC PATCH 5/7] powerpc/mm: update frag size Date: Wed, 21 Oct 2015 01:42:31 +0530 Message-Id: <1445371953-9627-6-git-send-email-aneesh.kumar@linux.vnet.ibm.com> In-Reply-To: <1445371953-9627-1-git-send-email-aneesh.kumar@linux.vnet.ibm.com> References: <1445371953-9627-1-git-send-email-aneesh.kumar@linux.vnet.ibm.com> List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , --- arch/powerpc/include/asm/book3s/64/hash-64k.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/powerpc/include/asm/book3s/64/hash-64k.h b/arch/powerpc/include/asm/book3s/64/hash-64k.h index 5062c6d423fd..a28dbfe2baed 100644 --- a/arch/powerpc/include/asm/book3s/64/hash-64k.h +++ b/arch/powerpc/include/asm/book3s/64/hash-64k.h @@ -39,14 +39,14 @@ */ #define PTE_RPN_SHIFT (30) /* - * we support 8 fragments per PTE page of 64K size. + * we support 32 fragments per PTE page of 64K size. */ -#define PTE_FRAG_NR 8 +#define PTE_FRAG_NR 32 /* * We use a 2K PTE page fragment and another 4K for storing * real_pte_t hash index. Rounding the entire thing to 8K */ -#define PTE_FRAG_SIZE_SHIFT 13 +#define PTE_FRAG_SIZE_SHIFT 11 #define PTE_FRAG_SIZE (1UL << PTE_FRAG_SIZE_SHIFT) /* -- 2.5.0