From: Michael Ellerman <mpe@ellerman.id.au>
To: Ram Pai <linuxram@us.ibm.com>, linuxppc-dev@lists.ozlabs.org
Cc: hbabu@us.ibm.com, nacc@us.ibm.com
Subject: Re: [PATCH] nx-842: Ignore bit 3 of condition register returned by icswx
Date: Mon, 02 Nov 2015 12:23:36 +1100 [thread overview]
Message-ID: <1446427416.31303.1.camel@ellerman.id.au> (raw)
In-Reply-To: <20151030223120.GA22550@ram.oc3035372033.ibm.com>
On Fri, 2015-10-30 at 15:31 -0700, Ram Pai wrote:
> icswx occasionally under heavy load sets bit 3 of condition register 0.
Why?
Also you seem to be using IBM bit numbering, so please be explicit about that,
or use normal bit numbering.
> It has no software implication.
What does it mean? You might be right but you don't give me enough info to
decide.
> Currently that bit is interpreted by the driver as a failure, when
> it should have calmly ignored it.
Should the fix be in icswx or the driver? Please justify your choice.
This sounds like it's fixing a bug so shouldn't the patch go to stable? And if
so which version(s) should it apply to?
cheers
next prev parent reply other threads:[~2015-11-02 1:23 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-30 22:31 [PATCH] nx-842: Ignore bit 3 of condition register returned by icswx Ram Pai
2015-11-02 1:23 ` Michael Ellerman [this message]
2015-11-02 18:41 ` Ram Pai
2015-11-02 22:24 ` Michael Ellerman
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