[PATCH 0/4] powerpc/perf: Export Power8 PMU events in sysfs

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* [PATCH 0/4] powerpc/perf: Export Power8 PMU events in sysfs
@ 2015-11-02 20:22 Sukadev Bhattiprolu
  2015-11-02 20:22 ` [PATCH 1/4] powerpc/perf: Remove PME_ prefix for power7 events Sukadev Bhattiprolu
                   ` (3 more replies)
  0 siblings, 4 replies; 5+ messages in thread
From: Sukadev Bhattiprolu @ 2015-11-02 20:22 UTC (permalink / raw)
  To: Michael Ellerman, Arnaldo Carvalho de Melo, mingo, Jiri Olsa
  Cc: linuxppc-dev, linux-kernel

For consistency with Power7, export Power8 PMU events in sysfs.
This would also allow users to specify the PMU events by name:

	perf stat -e 'cpu/PM_VSU1_FPSCR/' sleep 1

Sukadev Bhattiprolu (4):
  powerpc/perf: Remove PME_ prefix for power7 events
  powerpc/perf: Export Power8 generic and cache events in sysfs
  perf/powerpc: Rename some Power8 events
  powerpc/perf: Export all Power8 PMU events in sysfs

 arch/powerpc/include/asm/perf_event_server.h |    2 +-
 arch/powerpc/perf/power7-pmu.c               |   18 +-
 arch/powerpc/perf/power8-events-list.h       | 1077 ++++++++++++++++++++++++++
 arch/powerpc/perf/power8-pmu.c               |   82 +-
 4 files changed, 1128 insertions(+), 51 deletions(-)
 create mode 100644 arch/powerpc/perf/power8-events-list.h

-- 
2.5.3

^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH 1/4] powerpc/perf: Remove PME_ prefix for power7 events
  2015-11-02 20:22 [PATCH 0/4] powerpc/perf: Export Power8 PMU events in sysfs Sukadev Bhattiprolu
@ 2015-11-02 20:22 ` Sukadev Bhattiprolu
  2015-11-02 20:22 ` [PATCH 2/4] powerpc/perf: Export Power8 generic and cache events in sysfs Sukadev Bhattiprolu
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 5+ messages in thread
From: Sukadev Bhattiprolu @ 2015-11-02 20:22 UTC (permalink / raw)
  To: Michael Ellerman, Arnaldo Carvalho de Melo, mingo, Jiri Olsa
  Cc: linuxppc-dev, linux-kernel

We used the PME_ prefix earlier to avoid some macro/variable name
collisions.  We have since changed the way we define/use the event
macros so we no longer need the prefix.

By dropping the prefix, we keep the the event macros consistent with
their official names.

Reported-by: Michael Ellerman <ellerman@au1.ibm.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
---
 arch/powerpc/include/asm/perf_event_server.h |  2 +-
 arch/powerpc/perf/power7-pmu.c               | 18 +++++++++---------
 2 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/arch/powerpc/include/asm/perf_event_server.h b/arch/powerpc/include/asm/perf_event_server.h
index 8146221..0691087 100644
--- a/arch/powerpc/include/asm/perf_event_server.h
+++ b/arch/powerpc/include/asm/perf_event_server.h
@@ -141,7 +141,7 @@ extern ssize_t power_events_sysfs_show(struct device *dev,
 #define	EVENT_PTR(_id, _suffix)		&EVENT_VAR(_id, _suffix).attr.attr
 
 #define	EVENT_ATTR(_name, _id, _suffix)					\
-	PMU_EVENT_ATTR(_name, EVENT_VAR(_id, _suffix), PME_##_id,	\
+	PMU_EVENT_ATTR(_name, EVENT_VAR(_id, _suffix), _id,		\
 			power_events_sysfs_show)
 
 #define	GENERIC_EVENT_ATTR(_name, _id)	EVENT_ATTR(_name, _id, _g)
diff --git a/arch/powerpc/perf/power7-pmu.c b/arch/powerpc/perf/power7-pmu.c
index 5b62f238..a383c23 100644
--- a/arch/powerpc/perf/power7-pmu.c
+++ b/arch/powerpc/perf/power7-pmu.c
@@ -54,7 +54,7 @@
  * Power7 event codes.
  */
 #define EVENT(_name, _code) \
-	PME_##_name = _code,
+	_name = _code,
 
 enum {
 #include "power7-events-list.h"
@@ -318,14 +318,14 @@ static void power7_disable_pmc(unsigned int pmc, unsigned long mmcr[])
 }
 
 static int power7_generic_events[] = {
-	[PERF_COUNT_HW_CPU_CYCLES] =			PME_PM_CYC,
-	[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] =	PME_PM_GCT_NOSLOT_CYC,
-	[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] =	PME_PM_CMPLU_STALL,
-	[PERF_COUNT_HW_INSTRUCTIONS] =			PME_PM_INST_CMPL,
-	[PERF_COUNT_HW_CACHE_REFERENCES] =		PME_PM_LD_REF_L1,
-	[PERF_COUNT_HW_CACHE_MISSES] =			PME_PM_LD_MISS_L1,
-	[PERF_COUNT_HW_BRANCH_INSTRUCTIONS] =		PME_PM_BRU_FIN,
-	[PERF_COUNT_HW_BRANCH_MISSES] =			PME_PM_BR_MPRED,
+	[PERF_COUNT_HW_CPU_CYCLES] =			PM_CYC,
+	[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] =	PM_GCT_NOSLOT_CYC,
+	[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] =	PM_CMPLU_STALL,
+	[PERF_COUNT_HW_INSTRUCTIONS] =			PM_INST_CMPL,
+	[PERF_COUNT_HW_CACHE_REFERENCES] =		PM_LD_REF_L1,
+	[PERF_COUNT_HW_CACHE_MISSES] =			PM_LD_MISS_L1,
+	[PERF_COUNT_HW_BRANCH_INSTRUCTIONS] =		PM_BRU_FIN,
+	[PERF_COUNT_HW_BRANCH_MISSES] =			PM_BR_MPRED,
 };
 
 #define C(x)	PERF_COUNT_HW_CACHE_##x
-- 
2.5.3

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH 2/4] powerpc/perf: Export Power8 generic and cache events in sysfs
  2015-11-02 20:22 [PATCH 0/4] powerpc/perf: Export Power8 PMU events in sysfs Sukadev Bhattiprolu
  2015-11-02 20:22 ` [PATCH 1/4] powerpc/perf: Remove PME_ prefix for power7 events Sukadev Bhattiprolu
@ 2015-11-02 20:22 ` Sukadev Bhattiprolu
  2015-11-02 20:22 ` [PATCH 3/4] powerpc/perf: Rename some Power8 events Sukadev Bhattiprolu
  2015-11-02 20:22 ` [PATCH 4/4] powerpc/perf: Export all Power8 PMU events in sysfs Sukadev Bhattiprolu
  3 siblings, 0 replies; 5+ messages in thread
From: Sukadev Bhattiprolu @ 2015-11-02 20:22 UTC (permalink / raw)
  To: Michael Ellerman, Arnaldo Carvalho de Melo, mingo, Jiri Olsa
  Cc: linuxppc-dev, linux-kernel

Export generic and cache perf events for Power8 in sysfs.

Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
---
 arch/powerpc/perf/power8-events-list.h | 35 ++++++++++++++++
 arch/powerpc/perf/power8-pmu.c         | 76 +++++++++++++++++-----------------
 2 files changed, 73 insertions(+), 38 deletions(-)
 create mode 100644 arch/powerpc/perf/power8-events-list.h

diff --git a/arch/powerpc/perf/power8-events-list.h b/arch/powerpc/perf/power8-events-list.h
new file mode 100644
index 0000000..3262e26
--- /dev/null
+++ b/arch/powerpc/perf/power8-events-list.h
@@ -0,0 +1,35 @@
+/*
+ * Performance counter support for POWER8 processors.
+ *
+ * Copyright 2014 Sukadev Bhattiprolu, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+/*
+ * Power8 event codes.
+ */
+EVENT(PM_CYC,					0x0001e)
+EVENT(PM_GCT_NOSLOT_CYC,			0x100f8)
+EVENT(PM_CMPLU_STALL,				0x4000a)
+EVENT(PM_INST_CMPL,				0x00002)
+EVENT(PM_BRU_FIN,				0x10068)
+EVENT(PM_BR_MPRED_CMPL,				0x400f6)
+EVENT(PM_LD_REF_L1,				0x100ee)
+EVENT(PM_LD_MISS_L1,				0x3e054)
+EVENT(PM_ST_MISS_L1,				0x300f0)
+EVENT(PM_L1_PREF,				0x0d8b8)
+EVENT(PM_INST_FROM_L1,				0x04080)
+EVENT(PM_L1_ICACHE_MISS,			0x200fd)
+EVENT(PM_L1_DEMAND_WRITE,			0x0408c)
+EVENT(PM_IC_PREF_WRITE,				0x0408e)
+EVENT(PM_DATA_FROM_L3,				0x4c042)
+EVENT(PM_DATA_FROM_L3MISS,			0x300fe)
+EVENT(PM_L2_ST,					0x17080)
+EVENT(PM_L2_ST_MISS,				0x17082)
+EVENT(PM_L3_PREF_ALL,				0x4e052)
+EVENT(PM_DTLB_MISS,				0x300fc)
+EVENT(PM_ITLB_MISS,				0x400fc)
diff --git a/arch/powerpc/perf/power8-pmu.c b/arch/powerpc/perf/power8-pmu.c
index 396351d..11848af 100644
--- a/arch/powerpc/perf/power8-pmu.c
+++ b/arch/powerpc/perf/power8-pmu.c
@@ -17,48 +17,16 @@
 #include <asm/firmware.h>
 #include <asm/cputable.h>
 
-
 /*
  * Some power8 event codes.
  */
-#define PM_CYC				0x0001e
-#define PM_GCT_NOSLOT_CYC		0x100f8
-#define PM_CMPLU_STALL			0x4000a
-#define PM_INST_CMPL			0x00002
-#define PM_BRU_FIN			0x10068
-#define PM_BR_MPRED_CMPL		0x400f6
-
-/* All L1 D cache load references counted at finish, gated by reject */
-#define PM_LD_REF_L1			0x100ee
-/* Load Missed L1 */
-#define PM_LD_MISS_L1			0x3e054
-/* Store Missed L1 */
-#define PM_ST_MISS_L1			0x300f0
-/* L1 cache data prefetches */
-#define PM_L1_PREF			0x0d8b8
-/* Instruction fetches from L1 */
-#define PM_INST_FROM_L1			0x04080
-/* Demand iCache Miss */
-#define PM_L1_ICACHE_MISS		0x200fd
-/* Instruction Demand sectors wriittent into IL1 */
-#define PM_L1_DEMAND_WRITE		0x0408c
-/* Instruction prefetch written into IL1 */
-#define PM_IC_PREF_WRITE		0x0408e
-/* The data cache was reloaded from local core's L3 due to a demand load */
-#define PM_DATA_FROM_L3			0x4c042
-/* Demand LD - L3 Miss (not L2 hit and not L3 hit) */
-#define PM_DATA_FROM_L3MISS		0x300fe
-/* All successful D-side store dispatches for this thread */
-#define PM_L2_ST			0x17080
-/* All successful D-side store dispatches for this thread that were L2 Miss */
-#define PM_L2_ST_MISS			0x17082
-/* Total HW L3 prefetches(Load+store) */
-#define PM_L3_PREF_ALL			0x4e052
-/* Data PTEG reload */
-#define PM_DTLB_MISS			0x300fc
-/* ITLB Reloaded */
-#define PM_ITLB_MISS			0x400fc
+#define EVENT(_name, _code)	_name = _code,
+
+enum {
+#include "power8-events-list.h"
+};
 
+#undef EVENT
 
 /*
  * Raw event encoding for POWER8:
@@ -604,6 +572,37 @@ static void power8_disable_pmc(unsigned int pmc, unsigned long mmcr[])
 		mmcr[1] &= ~(0xffUL << MMCR1_PMCSEL_SHIFT(pmc + 1));
 }
 
+GENERIC_EVENT_ATTR(cpu-cyles,			PM_CYC);
+GENERIC_EVENT_ATTR(stalled-cycles-frontend,	PM_GCT_NOSLOT_CYC);
+GENERIC_EVENT_ATTR(stalled-cycles-backend,	PM_CMPLU_STALL);
+GENERIC_EVENT_ATTR(instructions,		PM_INST_CMPL);
+GENERIC_EVENT_ATTR(branch-instructions,		PM_BRU_FIN);
+GENERIC_EVENT_ATTR(branch-misses,		PM_BR_MPRED_CMPL);
+
+#define EVENT(_name, _code)	POWER_EVENT_ATTR(_name, _name);
+#include "power8-events-list.h"
+#undef EVENT
+
+#define EVENT(_name, _code)	POWER_EVENT_PTR(_name),
+
+static struct attribute *power8_events_attr[] = {
+	GENERIC_EVENT_PTR(PM_CYC),
+	GENERIC_EVENT_PTR(PM_GCT_NOSLOT_CYC),
+	GENERIC_EVENT_PTR(PM_CMPLU_STALL),
+	GENERIC_EVENT_PTR(PM_INST_CMPL),
+	GENERIC_EVENT_PTR(PM_BRU_FIN),
+	GENERIC_EVENT_PTR(PM_BR_MPRED_CMPL),
+
+	#include "power8-events-list.h"
+	#undef EVENT
+	NULL
+};
+
+static struct attribute_group power8_pmu_events_group = {
+	.name = "events",
+	.attrs = power8_events_attr,
+};
+
 PMU_FORMAT_ATTR(event,		"config:0-49");
 PMU_FORMAT_ATTR(pmcxsel,	"config:0-7");
 PMU_FORMAT_ATTR(mark,		"config:8");
@@ -640,6 +639,7 @@ struct attribute_group power8_pmu_format_group = {
 
 static const struct attribute_group *power8_pmu_attr_groups[] = {
 	&power8_pmu_format_group,
+	&power8_pmu_events_group,
 	NULL,
 };
 
-- 
2.5.3

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH 3/4] powerpc/perf: Rename some Power8 events
  2015-11-02 20:22 [PATCH 0/4] powerpc/perf: Export Power8 PMU events in sysfs Sukadev Bhattiprolu
  2015-11-02 20:22 ` [PATCH 1/4] powerpc/perf: Remove PME_ prefix for power7 events Sukadev Bhattiprolu
  2015-11-02 20:22 ` [PATCH 2/4] powerpc/perf: Export Power8 generic and cache events in sysfs Sukadev Bhattiprolu
@ 2015-11-02 20:22 ` Sukadev Bhattiprolu
  2015-11-02 20:22 ` [PATCH 4/4] powerpc/perf: Export all Power8 PMU events in sysfs Sukadev Bhattiprolu
  3 siblings, 0 replies; 5+ messages in thread
From: Sukadev Bhattiprolu @ 2015-11-02 20:22 UTC (permalink / raw)
  To: Michael Ellerman, Arnaldo Carvalho de Melo, mingo, Jiri Olsa
  Cc: linuxppc-dev, linux-kernel

Rename following events to be consistent with the specs.
	PM_L1_PREF to PM_LSU_L1_PREF
	PM_PPC_CMPL to PM_INST_CMPL

Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
---
 arch/powerpc/perf/power8-events-list.h | 2 +-
 arch/powerpc/perf/power8-pmu.c         | 6 +++---
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/perf/power8-events-list.h b/arch/powerpc/perf/power8-events-list.h
index 3262e26..69b1a25 100644
--- a/arch/powerpc/perf/power8-events-list.h
+++ b/arch/powerpc/perf/power8-events-list.h
@@ -21,7 +21,7 @@ EVENT(PM_BR_MPRED_CMPL,				0x400f6)
 EVENT(PM_LD_REF_L1,				0x100ee)
 EVENT(PM_LD_MISS_L1,				0x3e054)
 EVENT(PM_ST_MISS_L1,				0x300f0)
-EVENT(PM_L1_PREF,				0x0d8b8)
+EVENT(PM_LSU_L1_PREF,				0x0d8b8)
 EVENT(PM_INST_FROM_L1,				0x04080)
 EVENT(PM_L1_ICACHE_MISS,			0x200fd)
 EVENT(PM_L1_DEMAND_WRITE,			0x0408c)
diff --git a/arch/powerpc/perf/power8-pmu.c b/arch/powerpc/perf/power8-pmu.c
index 11848af..b453eb9 100644
--- a/arch/powerpc/perf/power8-pmu.c
+++ b/arch/powerpc/perf/power8-pmu.c
@@ -552,11 +552,11 @@ static int power8_get_alternatives(u64 event, unsigned int flags, u64 alt[])
 			case 0x600f4:	/* PM_RUN_CYC */
 				alt[j++] = 0x1e;
 				break;
-			case 0x2:	/* PM_PPC_CMPL */
+			case 0x2:	/* PM_INST_CMPL */
 				alt[j++] = 0x500fa;	/* PM_RUN_INST_CMPL */
 				break;
 			case 0x500fa:	/* PM_RUN_INST_CMPL */
-				alt[j++] = 0x2;	/* PM_PPC_CMPL */
+				alt[j++] = 0x2;	/* PM_INST_CMPL */
 				break;
 			}
 		}
@@ -709,7 +709,7 @@ static int power8_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
 			[ C(RESULT_MISS)   ] = PM_ST_MISS_L1,
 		},
 		[ C(OP_PREFETCH) ] = {
-			[ C(RESULT_ACCESS) ] = PM_L1_PREF,
+			[ C(RESULT_ACCESS) ] = PM_LSU_L1_PREF,
 			[ C(RESULT_MISS)   ] = 0,
 		},
 	},
-- 
2.5.3

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH 4/4] powerpc/perf: Export all Power8 PMU events in sysfs
  2015-11-02 20:22 [PATCH 0/4] powerpc/perf: Export Power8 PMU events in sysfs Sukadev Bhattiprolu
                   ` (2 preceding siblings ...)
  2015-11-02 20:22 ` [PATCH 3/4] powerpc/perf: Rename some Power8 events Sukadev Bhattiprolu
@ 2015-11-02 20:22 ` Sukadev Bhattiprolu
  3 siblings, 0 replies; 5+ messages in thread
From: Sukadev Bhattiprolu @ 2015-11-02 20:22 UTC (permalink / raw)
  To: Michael Ellerman, Arnaldo Carvalho de Melo, mingo, Jiri Olsa
  Cc: linuxppc-dev, linux-kernel

Export all Power8-specific PMU events in sysfs. These will be visible
in /sys/devices/cpu/events and can be used with perf:

        perf record -e 'cpu/PM_GCT_NOSLOT_CYC/' ...

Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
---
 arch/powerpc/perf/power8-events-list.h | 1076 +++++++++++++++++++++++++++++++-
 1 file changed, 1059 insertions(+), 17 deletions(-)

diff --git a/arch/powerpc/perf/power8-events-list.h b/arch/powerpc/perf/power8-events-list.h
index 69b1a25..4b37b3b 100644
--- a/arch/powerpc/perf/power8-events-list.h
+++ b/arch/powerpc/perf/power8-events-list.h
@@ -12,24 +12,1066 @@
 /*
  * Power8 event codes.
  */
-EVENT(PM_CYC,					0x0001e)
-EVENT(PM_GCT_NOSLOT_CYC,			0x100f8)
-EVENT(PM_CMPLU_STALL,				0x4000a)
-EVENT(PM_INST_CMPL,				0x00002)
+EVENT(PM_1LPAR_CYC,				0x1F05E)
+EVENT(PM_1PLUS_PPC_CMPL,			0x100F2)
+EVENT(PM_1PLUS_PPC_DISP,			0x400F2)
+EVENT(PM_2LPAR_CYC,				0x2006E)
+EVENT(PM_4LPAR_CYC,				0x4E05E)
+EVENT(PM_ALL_CHIP_PUMP_CPRED,			0x610050)
+EVENT(PM_ALL_GRP_PUMP_CPRED,			0x520050)
+EVENT(PM_ALL_GRP_PUMP_MPRED,			0x620052)
+EVENT(PM_ALL_GRP_PUMP_MPRED_RTY,		0x610052)
+EVENT(PM_ALL_PUMP_CPRED,			0x610054)
+EVENT(PM_ALL_PUMP_MPRED,			0x640052)
+EVENT(PM_ALL_SYS_PUMP_CPRED,			0x630050)
+EVENT(PM_ALL_SYS_PUMP_MPRED,			0x630052)
+EVENT(PM_ALL_SYS_PUMP_MPRED_RTY,		0x640050)
+EVENT(PM_ANY_THRD_RUN_CYC,			0x100FA)
+EVENT(PM_BACK_BR_CMPL,				0x2505E)
+EVENT(PM_BANK_CONFLICT,				0x04082)
+EVENT(PM_BR_2PATH,				0x20036)
+EVENT(PM_BR_BC_8,				0x05086)
+EVENT(PM_BR_BC_8_CONV,				0x05084)
+EVENT(PM_BR_CMPL,				0x40060)
+EVENT(PM_BR_MPRED_CCACHE,			0x040AC)
+EVENT(PM_BR_MPRED_CMPL,				0x400F6)
+EVENT(PM_BR_MPRED_CR,				0x040B8)
+EVENT(PM_BR_MPRED_LSTACK,			0x040AE)
+EVENT(PM_BR_MPRED_TA,				0x040BA)
+EVENT(PM_BR_MRK_2PATH,				0x10138)
+EVENT(PM_BR_PRED_BR0,				0x0409C)
+EVENT(PM_BR_PRED_BR1,				0x0409E)
+EVENT(PM_BR_PRED_BR_CMPL,			0x0489C)
+EVENT(PM_BR_PRED_CCACHE_BR0,			0x040A4)
+EVENT(PM_BR_PRED_CCACHE_BR1,			0x040A6)
+EVENT(PM_BR_PRED_CCACHE_CMPL,			0x048A4)
+EVENT(PM_BR_PRED_CR_BR0,			0x040B0)
+EVENT(PM_BR_PRED_CR_BR1,			0x040B2)
+EVENT(PM_BR_PRED_CR_CMPL,			0x048B0)
+EVENT(PM_BR_PRED_LSTACK_BR0,			0x040A8)
+EVENT(PM_BR_PRED_LSTACK_BR1,			0x040AA)
+EVENT(PM_BR_PRED_LSTACK_CMPL,			0x048A8)
+EVENT(PM_BR_PRED_TA_BR0,			0x040B4)
+EVENT(PM_BR_PRED_TA_BR1,			0x040B6)
+EVENT(PM_BR_PRED_TA_CMPL,			0x048B4)
+EVENT(PM_BR_TAKEN_CMPL,				0x200FA)
 EVENT(PM_BRU_FIN,				0x10068)
-EVENT(PM_BR_MPRED_CMPL,				0x400f6)
-EVENT(PM_LD_REF_L1,				0x100ee)
-EVENT(PM_LD_MISS_L1,				0x3e054)
-EVENT(PM_ST_MISS_L1,				0x300f0)
-EVENT(PM_LSU_L1_PREF,				0x0d8b8)
+EVENT(PM_BR_UNCOND_BR0,				0x040A0)
+EVENT(PM_BR_UNCOND_BR1,				0x040A2)
+EVENT(PM_BR_UNCOND_CMPL,			0x048A0)
+EVENT(PM_CASTOUT_ISSUED,			0x03094)
+EVENT(PM_CASTOUT_ISSUED_GPR,			0x03096)
+EVENT(PM_CHIP_PUMP_CPRED,			0x10050)
+EVENT(PM_CLB_HELD,				0x02090)
+EVENT(PM_CMPLU_STALL,				0x4000A)
+EVENT(PM_CMPLU_STALL_BRU,			0x4D018)
+EVENT(PM_CMPLU_STALL_BRU_CRU,			0x2D018)
+EVENT(PM_CMPLU_STALL_COQ_FULL,			0x30026)
+EVENT(PM_CMPLU_STALL_DCACHE_MISS,		0x2C012)
+EVENT(PM_CMPLU_STALL_DMISS_L21_L31,		0x2C018)
+EVENT(PM_CMPLU_STALL_DMISS_L2L3,		0x2C016)
+EVENT(PM_CMPLU_STALL_DMISS_L2L3_CONFLICT,	0x4C016)
+EVENT(PM_CMPLU_STALL_DMISS_L3MISS,		0x4C01A)
+EVENT(PM_CMPLU_STALL_DMISS_LMEM,		0x4C018)
+EVENT(PM_CMPLU_STALL_DMISS_REMOTE,		0x2C01C)
+EVENT(PM_CMPLU_STALL_ERAT_MISS,			0x4C012)
+EVENT(PM_CMPLU_STALL_FLUSH,			0x30038)
+EVENT(PM_CMPLU_STALL_FXLONG,			0x4D016)
+EVENT(PM_CMPLU_STALL_FXU,			0x2D016)
+EVENT(PM_CMPLU_STALL_HWSYNC,			0x30036)
+EVENT(PM_CMPLU_STALL_LOAD_FINISH,		0x4D014)
+EVENT(PM_CMPLU_STALL_LSU,			0x2C010)
+EVENT(PM_CMPLU_STALL_LWSYNC,			0x10036)
+EVENT(PM_CMPLU_STALL_MEM_ECC_DELAY,		0x30028)
+EVENT(PM_CMPLU_STALL_NO_NTF,			0x2E01C)
+EVENT(PM_CMPLU_STALL_NTCG_FLUSH,		0x2E01E)
+EVENT(PM_CMPLU_STALL_OTHER_CMPL,		0x30006)
+EVENT(PM_CMPLU_STALL_REJECT,			0x4C010)
+EVENT(PM_CMPLU_STALL_REJECT_LHS,		0x2C01A)
+EVENT(PM_CMPLU_STALL_REJ_LMQ_FULL,		0x4C014)
+EVENT(PM_CMPLU_STALL_SCALAR,			0x4D010)
+EVENT(PM_CMPLU_STALL_SCALAR_LONG,		0x2D010)
+EVENT(PM_CMPLU_STALL_ST_FWD,			0x4C01C)
+EVENT(PM_CMPLU_STALL_STORE,			0x2C014)
+EVENT(PM_CMPLU_STALL_THRD,			0x1001C)
+EVENT(PM_CMPLU_STALL_VECTOR,			0x2D014)
+EVENT(PM_CMPLU_STALL_VECTOR_LONG,		0x4D012)
+EVENT(PM_CMPLU_STALL_VSU,			0x2D012)
+EVENT(PM_CO0_ALLOC,				0x16083)
+EVENT(PM_CO0_BUSY,				0x16082)
+EVENT(PM_CO_DISP_FAIL,				0x517082)
+EVENT(PM_CO_TM_SC_FOOTPRINT,			0x527084)
+EVENT(PM_CO_USAGE,				0x3608A)
+EVENT(PM_CRU_FIN,				0x40066)
+EVENT(PM_CYC,					0x0001E)
+EVENT(PM_DATA_ALL_CHIP_PUMP_CPRED,		0x61C050)
+EVENT(PM_DATA_ALL_FROM_DL2L3_MOD,		0x64C048)
+EVENT(PM_DATA_ALL_FROM_DL2L3_SHR,		0x63C048)
+EVENT(PM_DATA_ALL_FROM_DL4,			0x63C04C)
+EVENT(PM_DATA_ALL_FROM_DMEM,			0x64C04C)
+EVENT(PM_DATA_ALL_FROM_L2,			0x61C042)
+EVENT(PM_DATA_ALL_FROM_L21_MOD,			0x64C046)
+EVENT(PM_DATA_ALL_FROM_L21_SHR,			0x63C046)
+EVENT(PM_DATA_ALL_FROM_L2_DISP_CONFLICT_LDHITST,0x63C040)
+EVENT(PM_DATA_ALL_FROM_L2_DISP_CONFLICT_OTHER,	0x64C040)
+EVENT(PM_DATA_ALL_FROM_L2_MEPF,			0x62C040)
+EVENT(PM_DATA_ALL_FROM_L2MISS_MOD,		0x61C04E)
+EVENT(PM_DATA_ALL_FROM_L2_NO_CONFLICT,		0x61C040)
+EVENT(PM_DATA_ALL_FROM_L3,			0x64C042)
+EVENT(PM_DATA_ALL_FROM_L31_ECO_MOD,		0x64C044)
+EVENT(PM_DATA_ALL_FROM_L31_ECO_SHR,		0x63C044)
+EVENT(PM_DATA_ALL_FROM_L31_MOD,			0x62C044)
+EVENT(PM_DATA_ALL_FROM_L31_SHR,			0x61C046)
+EVENT(PM_DATA_ALL_FROM_L3_DISP_CONFLICT,	0x63C042)
+EVENT(PM_DATA_ALL_FROM_L3_MEPF,			0x62C042)
+EVENT(PM_DATA_ALL_FROM_L3MISS_MOD,		0x64C04E)
+EVENT(PM_DATA_ALL_FROM_L3_NO_CONFLICT,		0x61C044)
+EVENT(PM_DATA_ALL_FROM_LL4,			0x61C04C)
+EVENT(PM_DATA_ALL_FROM_LMEM,			0x62C048)
+EVENT(PM_DATA_ALL_FROM_MEMORY,			0x62C04C)
+EVENT(PM_DATA_ALL_FROM_OFF_CHIP_CACHE,		0x64C04A)
+EVENT(PM_DATA_ALL_FROM_ON_CHIP_CACHE,		0x61C048)
+EVENT(PM_DATA_ALL_FROM_RL2L3_MOD,		0x62C046)
+EVENT(PM_DATA_ALL_FROM_RL2L3_SHR,		0x61C04A)
+EVENT(PM_DATA_ALL_FROM_RL4,			0x62C04A)
+EVENT(PM_DATA_ALL_FROM_RMEM,			0x63C04A)
+EVENT(PM_DATA_ALL_GRP_PUMP_CPRED,		0x62C050)
+EVENT(PM_DATA_ALL_GRP_PUMP_MPRED,		0x62C052)
+EVENT(PM_DATA_ALL_GRP_PUMP_MPRED_RTY,		0x61C052)
+EVENT(PM_DATA_ALL_PUMP_CPRED,			0x61C054)
+EVENT(PM_DATA_ALL_PUMP_MPRED,			0x64C052)
+EVENT(PM_DATA_ALL_SYS_PUMP_CPRED,		0x63C050)
+EVENT(PM_DATA_ALL_SYS_PUMP_MPRED,		0x63C052)
+EVENT(PM_DATA_ALL_SYS_PUMP_MPRED_RTY,		0x64C050)
+EVENT(PM_DATA_CHIP_PUMP_CPRED,			0x1C050)
+EVENT(PM_DATA_FROM_DL2L3_MOD,			0x4C048)
+EVENT(PM_DATA_FROM_DL2L3_SHR,			0x3C048)
+EVENT(PM_DATA_FROM_DL4,				0x3C04C)
+EVENT(PM_DATA_FROM_DMEM,			0x4C04C)
+EVENT(PM_DATA_FROM_L2,				0x1C042)
+EVENT(PM_DATA_FROM_L21_MOD,			0x4C046)
+EVENT(PM_DATA_FROM_L21_SHR,			0x3C046)
+EVENT(PM_DATA_FROM_L2_DISP_CONFLICT_LDHITST,	0x3C040)
+EVENT(PM_DATA_FROM_L2_DISP_CONFLICT_OTHER,	0x4C040)
+EVENT(PM_DATA_FROM_L2_MEPF,			0x2C040)
+EVENT(PM_DATA_FROM_L2MISS,			0x200FE)
+EVENT(PM_DATA_FROM_L2MISS_MOD,			0x1C04E)
+EVENT(PM_DATA_FROM_L2_NO_CONFLICT,		0x1C040)
+EVENT(PM_DATA_FROM_L3,				0x4C042)
+EVENT(PM_DATA_FROM_L31_ECO_MOD,			0x4C044)
+EVENT(PM_DATA_FROM_L31_ECO_SHR,			0x3C044)
+EVENT(PM_DATA_FROM_L31_MOD,			0x2C044)
+EVENT(PM_DATA_FROM_L31_SHR,			0x1C046)
+EVENT(PM_DATA_FROM_L3_DISP_CONFLICT,		0x3C042)
+EVENT(PM_DATA_FROM_L3_MEPF,			0x2C042)
+EVENT(PM_DATA_FROM_L3MISS,			0x300FE)
+EVENT(PM_DATA_FROM_L3MISS_MOD,			0x4C04E)
+EVENT(PM_DATA_FROM_L3_NO_CONFLICT,		0x1C044)
+EVENT(PM_DATA_FROM_LL4,				0x1C04C)
+EVENT(PM_DATA_FROM_LMEM,			0x2C048)
+EVENT(PM_DATA_FROM_MEM,				0x400FE)
+EVENT(PM_DATA_FROM_MEMORY,			0x2C04C)
+EVENT(PM_DATA_FROM_OFF_CHIP_CACHE,		0x4C04A)
+EVENT(PM_DATA_FROM_ON_CHIP_CACHE,		0x1C048)
+EVENT(PM_DATA_FROM_RL2L3_MOD,			0x2C046)
+EVENT(PM_DATA_FROM_RL2L3_SHR,			0x1C04A)
+EVENT(PM_DATA_FROM_RL4,				0x2C04A)
+EVENT(PM_DATA_FROM_RMEM,			0x3C04A)
+EVENT(PM_DATA_GRP_PUMP_CPRED,			0x2C050)
+EVENT(PM_DATA_GRP_PUMP_MPRED,			0x2C052)
+EVENT(PM_DATA_GRP_PUMP_MPRED_RTY,		0x1C052)
+EVENT(PM_DATA_PUMP_CPRED,			0x1C054)
+EVENT(PM_DATA_PUMP_MPRED,			0x4C052)
+EVENT(PM_DATA_SYS_PUMP_CPRED,			0x3C050)
+EVENT(PM_DATA_SYS_PUMP_MPRED,			0x3C052)
+EVENT(PM_DATA_SYS_PUMP_MPRED_RTY,		0x4C050)
+EVENT(PM_DATA_TABLEWALK_CYC,			0x3001A)
+EVENT(PM_DC_COLLISIONS,				0x0E0BC)
+EVENT(PM_DC_PREF_STREAM_ALLOC,			0x1E050)
+EVENT(PM_DC_PREF_STREAM_CONF,			0x2E050)
+EVENT(PM_DC_PREF_STREAM_FUZZY_CONF,		0x4E050)
+EVENT(PM_DC_PREF_STREAM_STRIDED_CONF,		0x3E050)
+EVENT(PM_DERAT_MISS_16G,			0x4C054)
+EVENT(PM_DERAT_MISS_16M,			0x3C054)
+EVENT(PM_DERAT_MISS_4K,				0x1C056)
+EVENT(PM_DERAT_MISS_64K,			0x2C054)
+EVENT(PM_DFU,					0x0B0BA)
+EVENT(PM_DFU_DCFFIX,				0x0B0BE)
+EVENT(PM_DFU_DENBCD,				0x0B0BC)
+EVENT(PM_DFU_MC,				0x0B0B8)
+EVENT(PM_DISP_CLB_HELD_BAL,			0x02092)
+EVENT(PM_DISP_CLB_HELD_RES,			0x02094)
+EVENT(PM_DISP_CLB_HELD_SB,			0x020A8)
+EVENT(PM_DISP_CLB_HELD_SYNC,			0x02098)
+EVENT(PM_DISP_CLB_HELD_TLBIE,			0x02096)
+EVENT(PM_DISP_HELD,				0x10006)
+EVENT(PM_DISP_HELD_IQ_FULL,			0x20006)
+EVENT(PM_DISP_HELD_MAP_FULL,			0x1002A)
+EVENT(PM_DISP_HELD_SRQ_FULL,			0x30018)
+EVENT(PM_DISP_HELD_SYNC_HOLD,			0x4003C)
+EVENT(PM_DISP_HOLD_GCT_FULL,			0x030A6)
+EVENT(PM_DISP_WT,				0x30008)
+EVENT(PM_DPTEG_FROM_DL2L3_MOD,			0x4E048)
+EVENT(PM_DPTEG_FROM_DL2L3_SHR,			0x3E048)
+EVENT(PM_DPTEG_FROM_DL4,			0x3E04C)
+EVENT(PM_DPTEG_FROM_DMEM,			0x4E04C)
+EVENT(PM_DPTEG_FROM_L2,				0x1E042)
+EVENT(PM_DPTEG_FROM_L21_MOD,			0x4E046)
+EVENT(PM_DPTEG_FROM_L21_SHR,			0x3E046)
+EVENT(PM_DPTEG_FROM_L2_DISP_CONFLICT_LDHITST,	0x3E040)
+EVENT(PM_DPTEG_FROM_L2_DISP_CONFLICT_OTHER,	0x4E040)
+EVENT(PM_DPTEG_FROM_L2_MEPF,			0x2E040)
+EVENT(PM_DPTEG_FROM_L2MISS,			0x1E04E)
+EVENT(PM_DPTEG_FROM_L2_NO_CONFLICT,		0x1E040)
+EVENT(PM_DPTEG_FROM_L3,				0x4E042)
+EVENT(PM_DPTEG_FROM_L31_ECO_MOD,		0x4E044)
+EVENT(PM_DPTEG_FROM_L31_ECO_SHR,		0x3E044)
+EVENT(PM_DPTEG_FROM_L31_MOD,			0x2E044)
+EVENT(PM_DPTEG_FROM_L31_SHR,			0x1E046)
+EVENT(PM_DPTEG_FROM_L3_DISP_CONFLICT,		0x3E042)
+EVENT(PM_DPTEG_FROM_L3_MEPF,			0x2E042)
+EVENT(PM_DPTEG_FROM_L3MISS,			0x4E04E)
+EVENT(PM_DPTEG_FROM_L3_NO_CONFLICT,		0x1E044)
+EVENT(PM_DPTEG_FROM_LL4,			0x1E04C)
+EVENT(PM_DPTEG_FROM_LMEM,			0x2E048)
+EVENT(PM_DPTEG_FROM_MEMORY,			0x2E04C)
+EVENT(PM_DPTEG_FROM_OFF_CHIP_CACHE,		0x4E04A)
+EVENT(PM_DPTEG_FROM_ON_CHIP_CACHE,		0x1E048)
+EVENT(PM_DPTEG_FROM_RL2L3_MOD,			0x2E046)
+EVENT(PM_DPTEG_FROM_RL2L3_SHR,			0x1E04A)
+EVENT(PM_DPTEG_FROM_RL4,			0x2E04A)
+EVENT(PM_DPTEG_FROM_RMEM,			0x3E04A)
+EVENT(PM_DSLB_MISS,				0x0D094)
+EVENT(PM_DTLB_MISS,				0x300FC)
+EVENT(PM_DTLB_MISS_16G,				0x1C058)
+EVENT(PM_DTLB_MISS_16M,				0x4C056)
+EVENT(PM_DTLB_MISS_4K,				0x2C056)
+EVENT(PM_DTLB_MISS_64K,				0x3C056)
+EVENT(PM_EAT_FORCE_MISPRED,			0x050A8)
+EVENT(PM_EAT_FULL_CYC,				0x04084)
+EVENT(PM_EE_OFF_EXT_INT,			0x02080)
+EVENT(PM_EXT_INT,				0x200F8)
+EVENT(PM_FAV_TBEGIN,				0x020B4)
+EVENT(PM_FLOP,					0x100F4)
+EVENT(PM_FLOP_SUM_SCALAR,			0x0A0AE)
+EVENT(PM_FLOP_SUM_VEC,				0x0A0AC)
+EVENT(PM_FLUSH,					0x400F8)
+EVENT(PM_FLUSH_BR_MPRED,			0x02084)
+EVENT(PM_FLUSH_COMPLETION,			0x30012)
+EVENT(PM_FLUSH_DISP,				0x02082)
+EVENT(PM_FLUSH_DISP_SB,				0x0208C)
+EVENT(PM_FLUSH_DISP_SYNC,			0x02088)
+EVENT(PM_FLUSH_DISP_TLBIE,			0x0208A)
+EVENT(PM_FLUSH_LSU,				0x0208E)
+EVENT(PM_FLUSH_PARTIAL,				0x02086)
+EVENT(PM_FPU0_FCONV,				0x0A0B0)
+EVENT(PM_FPU0_FEST,				0x0A0B8)
+EVENT(PM_FPU0_FRSP,				0x0A0B4)
+EVENT(PM_FPU1_FCONV,				0x0A0B2)
+EVENT(PM_FPU1_FEST,				0x0A0BA)
+EVENT(PM_FPU1_FRSP,				0x0A0B6)
+EVENT(PM_FREQ_DOWN,				0x3000C)
+EVENT(PM_FREQ_UP,				0x4000C)
+EVENT(PM_FUSION_TOC_GRP0_1,			0x050B0)
+EVENT(PM_FUSION_TOC_GRP0_2,			0x050AE)
+EVENT(PM_FUSION_TOC_GRP0_3,			0x050AC)
+EVENT(PM_FUSION_TOC_GRP1_1,			0x050B2)
+EVENT(PM_FUSION_VSX_GRP0_1,			0x050B8)
+EVENT(PM_FUSION_VSX_GRP0_2,			0x050B6)
+EVENT(PM_FUSION_VSX_GRP0_3,			0x050B4)
+EVENT(PM_FUSION_VSX_GRP1_1,			0x050BA)
+EVENT(PM_FXU0_BUSY_FXU1_IDLE,			0x3000E)
+EVENT(PM_FXU0_FIN,				0x10004)
+EVENT(PM_FXU1_BUSY_FXU0_IDLE,			0x4000E)
+EVENT(PM_FXU1_FIN,				0x40004)
+EVENT(PM_FXU_BUSY,				0x2000E)
+EVENT(PM_FXU_IDLE,				0x1000E)
+EVENT(PM_GCT_EMPTY_CYC,				0x20008)
+EVENT(PM_GCT_MERGE,				0x030A4)
+EVENT(PM_GCT_NOSLOT_BR_MPRED,			0x4D01E)
+EVENT(PM_GCT_NOSLOT_BR_MPRED_ICMISS,		0x4D01A)
+EVENT(PM_GCT_NOSLOT_CYC,			0x100F8)
+EVENT(PM_GCT_NOSLOT_DISP_HELD_ISSQ,		0x2D01E)
+EVENT(PM_GCT_NOSLOT_DISP_HELD_MAP,		0x4D01C)
+EVENT(PM_GCT_NOSLOT_DISP_HELD_OTHER,		0x2E010)
+EVENT(PM_GCT_NOSLOT_DISP_HELD_SRQ,		0x2D01C)
+EVENT(PM_GCT_NOSLOT_IC_L3MISS,			0x4E010)
+EVENT(PM_GCT_NOSLOT_IC_MISS,			0x2D01A)
+EVENT(PM_GCT_UTIL_11_14_ENTRIES,		0x020A2)
+EVENT(PM_GCT_UTIL_1_2_ENTRIES,			0x0209C)
+EVENT(PM_GCT_UTIL_15_17_ENTRIES,		0x020A4)
+EVENT(PM_GCT_UTIL_18_ENTRIES,			0x020A6)
+EVENT(PM_GCT_UTIL_3_6_ENTRIES,			0x0209E)
+EVENT(PM_GCT_UTIL_7_10_ENTRIES,			0x020A0)
+EVENT(PM_GRP_BR_MPRED_NONSPEC,			0x1000A)
+EVENT(PM_GRP_CMPL,				0x30004)
+EVENT(PM_GRP_DISP,				0x3000A)
+EVENT(PM_GRP_IC_MISS_NONSPEC,			0x1000C)
+EVENT(PM_GRP_MRK,				0x10130)
+EVENT(PM_GRP_NON_FULL_GROUP,			0x0509C)
+EVENT(PM_GRP_PUMP_CPRED,			0x20050)
+EVENT(PM_GRP_PUMP_MPRED,			0x20052)
+EVENT(PM_GRP_PUMP_MPRED_RTY,			0x10052)
+EVENT(PM_GRP_TERM_2ND_BRANCH,			0x050A4)
+EVENT(PM_GRP_TERM_FPU_AFTER_BR,			0x050A6)
+EVENT(PM_GRP_TERM_NOINST,			0x0509E)
+EVENT(PM_GRP_TERM_OTHER,			0x050A0)
+EVENT(PM_GRP_TERM_SLOT_LIMIT,			0x050A2)
+EVENT(PM_HV_CYC,				0x2000A)
+EVENT(PM_IBUF_FULL_CYC,				0x04086)
+EVENT(PM_IC_DEMAND_CYC,				0x10018)
+EVENT(PM_IC_DEMAND_L2_BHT_REDIRECT,		0x04098)
+EVENT(PM_IC_DEMAND_L2_BR_REDIRECT,		0x0409A)
+EVENT(PM_IC_DEMAND_REQ,				0x04088)
+EVENT(PM_IC_INVALIDATE,				0x0508A)
+EVENT(PM_IC_PREF_CANCEL_HIT,			0x04092)
+EVENT(PM_IC_PREF_CANCEL_L2,			0x04094)
+EVENT(PM_IC_PREF_CANCEL_PAGE,			0x04090)
+EVENT(PM_IC_PREF_REQ,				0x0408A)
+EVENT(PM_IC_PREF_WRITE,				0x0408E)
+EVENT(PM_IC_RELOAD_PRIVATE,			0x04096)
+EVENT(PM_IERAT_RELOAD,				0x100F6)
+EVENT(PM_IERAT_RELOAD_16M,			0x4006A)
+EVENT(PM_IERAT_RELOAD_4K,			0x20064)
+EVENT(PM_IERAT_RELOAD_64K,			0x3006A)
+EVENT(PM_IFETCH_THROTTLE,			0x3405E)
+EVENT(PM_IFU_L2_TOUCH,				0x05088)
+EVENT(PM_INST_ALL_CHIP_PUMP_CPRED,		0x514050)
+EVENT(PM_INST_ALL_FROM_DL2L3_MOD,		0x544048)
+EVENT(PM_INST_ALL_FROM_DL2L3_SHR,		0x534048)
+EVENT(PM_INST_ALL_FROM_DL4,			0x53404C)
+EVENT(PM_INST_ALL_FROM_DMEM,			0x54404C)
+EVENT(PM_INST_ALL_FROM_L2,			0x514042)
+EVENT(PM_INST_ALL_FROM_L21_MOD,			0x544046)
+EVENT(PM_INST_ALL_FROM_L21_SHR,			0x534046)
+EVENT(PM_INST_ALL_FROM_L2_DISP_CONFLICT_LDHITST,0x534040)
+EVENT(PM_INST_ALL_FROM_L2_DISP_CONFLICT_OTHER,	0x544040)
+EVENT(PM_INST_ALL_FROM_L2_MEPF,			0x524040)
+EVENT(PM_INST_ALL_FROM_L2MISS,			0x51404E)
+EVENT(PM_INST_ALL_FROM_L2_NO_CONFLICT,		0x514040)
+EVENT(PM_INST_ALL_FROM_L3,			0x544042)
+EVENT(PM_INST_ALL_FROM_L31_ECO_MOD,		0x544044)
+EVENT(PM_INST_ALL_FROM_L31_ECO_SHR,		0x534044)
+EVENT(PM_INST_ALL_FROM_L31_MOD,			0x524044)
+EVENT(PM_INST_ALL_FROM_L31_SHR,			0x514046)
+EVENT(PM_INST_ALL_FROM_L3_DISP_CONFLICT,	0x534042)
+EVENT(PM_INST_ALL_FROM_L3_MEPF,			0x524042)
+EVENT(PM_INST_ALL_FROM_L3MISS_MOD,		0x54404E)
+EVENT(PM_INST_ALL_FROM_L3_NO_CONFLICT,		0x514044)
+EVENT(PM_INST_ALL_FROM_LL4,			0x51404C)
+EVENT(PM_INST_ALL_FROM_LMEM,			0x524048)
+EVENT(PM_INST_ALL_FROM_MEMORY,			0x52404C)
+EVENT(PM_INST_ALL_FROM_OFF_CHIP_CACHE,		0x54404A)
+EVENT(PM_INST_ALL_FROM_ON_CHIP_CACHE,		0x514048)
+EVENT(PM_INST_ALL_FROM_RL2L3_MOD,		0x524046)
+EVENT(PM_INST_ALL_FROM_RL2L3_SHR,		0x51404A)
+EVENT(PM_INST_ALL_FROM_RL4,			0x52404A)
+EVENT(PM_INST_ALL_FROM_RMEM,			0x53404A)
+EVENT(PM_INST_ALL_GRP_PUMP_CPRED,		0x524050)
+EVENT(PM_INST_ALL_GRP_PUMP_MPRED,		0x524052)
+EVENT(PM_INST_ALL_GRP_PUMP_MPRED_RTY,		0x514052)
+EVENT(PM_INST_ALL_PUMP_CPRED,			0x514054)
+EVENT(PM_INST_ALL_PUMP_MPRED,			0x544052)
+EVENT(PM_INST_ALL_SYS_PUMP_CPRED,		0x534050)
+EVENT(PM_INST_ALL_SYS_PUMP_MPRED,		0x534052)
+EVENT(PM_INST_ALL_SYS_PUMP_MPRED_RTY,		0x544050)
+EVENT(PM_INST_CHIP_PUMP_CPRED,			0x14050)
+EVENT(PM_INST_CMPL,				0x00002)
+EVENT(PM_INST_DISP,				0x200F2)
+EVENT(PM_INST_FROM_DL2L3_MOD,			0x44048)
+EVENT(PM_INST_FROM_DL2L3_SHR,			0x34048)
+EVENT(PM_INST_FROM_DL4,				0x3404C)
+EVENT(PM_INST_FROM_DMEM,			0x4404C)
 EVENT(PM_INST_FROM_L1,				0x04080)
-EVENT(PM_L1_ICACHE_MISS,			0x200fd)
-EVENT(PM_L1_DEMAND_WRITE,			0x0408c)
-EVENT(PM_IC_PREF_WRITE,				0x0408e)
-EVENT(PM_DATA_FROM_L3,				0x4c042)
-EVENT(PM_DATA_FROM_L3MISS,			0x300fe)
+EVENT(PM_INST_FROM_L2,				0x14042)
+EVENT(PM_INST_FROM_L21_MOD,			0x44046)
+EVENT(PM_INST_FROM_L21_SHR,			0x34046)
+EVENT(PM_INST_FROM_L2_DISP_CONFLICT_LDHITST,	0x34040)
+EVENT(PM_INST_FROM_L2_DISP_CONFLICT_OTHER,	0x44040)
+EVENT(PM_INST_FROM_L2_MEPF,			0x24040)
+EVENT(PM_INST_FROM_L2MISS,			0x1404E)
+EVENT(PM_INST_FROM_L2_NO_CONFLICT,		0x14040)
+EVENT(PM_INST_FROM_L3,				0x44042)
+EVENT(PM_INST_FROM_L31_ECO_MOD,			0x44044)
+EVENT(PM_INST_FROM_L31_ECO_SHR,			0x34044)
+EVENT(PM_INST_FROM_L31_MOD,			0x24044)
+EVENT(PM_INST_FROM_L31_SHR,			0x14046)
+EVENT(PM_INST_FROM_L3_DISP_CONFLICT,		0x34042)
+EVENT(PM_INST_FROM_L3_MEPF,			0x24042)
+EVENT(PM_INST_FROM_L3MISS,			0x300FA)
+EVENT(PM_INST_FROM_L3MISS_MOD,			0x4404E)
+EVENT(PM_INST_FROM_L3_NO_CONFLICT,		0x14044)
+EVENT(PM_INST_FROM_LL4,				0x1404C)
+EVENT(PM_INST_FROM_LMEM,			0x24048)
+EVENT(PM_INST_FROM_MEMORY,			0x2404C)
+EVENT(PM_INST_FROM_OFF_CHIP_CACHE,		0x4404A)
+EVENT(PM_INST_FROM_ON_CHIP_CACHE,		0x14048)
+EVENT(PM_INST_FROM_RL2L3_MOD,			0x24046)
+EVENT(PM_INST_FROM_RL2L3_SHR,			0x1404A)
+EVENT(PM_INST_FROM_RL4,				0x2404A)
+EVENT(PM_INST_FROM_RMEM,			0x3404A)
+EVENT(PM_INST_GRP_PUMP_CPRED,			0x24050)
+EVENT(PM_INST_GRP_PUMP_MPRED,			0x24052)
+EVENT(PM_INST_GRP_PUMP_MPRED_RTY,		0x14052)
+EVENT(PM_INST_IMC_MATCH_CMPL,			0x1003A)
+EVENT(PM_INST_IMC_MATCH_DISP,			0x30016)
+EVENT(PM_INST_PUMP_CPRED,			0x14054)
+EVENT(PM_INST_PUMP_MPRED,			0x44052)
+EVENT(PM_INST_SYS_PUMP_CPRED,			0x34050)
+EVENT(PM_INST_SYS_PUMP_MPRED,			0x34052)
+EVENT(PM_INST_SYS_PUMP_MPRED_RTY,		0x44050)
+EVENT(PM_IOPS_CMPL,				0x10014)
+EVENT(PM_IOPS_DISP,				0x30014)
+EVENT(PM_IPTEG_FROM_DL2L3_MOD,			0x45048)
+EVENT(PM_IPTEG_FROM_DL2L3_SHR,			0x35048)
+EVENT(PM_IPTEG_FROM_DL4,			0x3504C)
+EVENT(PM_IPTEG_FROM_DMEM,			0x4504C)
+EVENT(PM_IPTEG_FROM_L2,				0x15042)
+EVENT(PM_IPTEG_FROM_L21_MOD,			0x45046)
+EVENT(PM_IPTEG_FROM_L21_SHR,			0x35046)
+EVENT(PM_IPTEG_FROM_L2_DISP_CONFLICT_LDHITST,	0x35040)
+EVENT(PM_IPTEG_FROM_L2_DISP_CONFLICT_OTHER,	0x45040)
+EVENT(PM_IPTEG_FROM_L2_MEPF,			0x25040)
+EVENT(PM_IPTEG_FROM_L2MISS,			0x1504E)
+EVENT(PM_IPTEG_FROM_L2_NO_CONFLICT,		0x15040)
+EVENT(PM_IPTEG_FROM_L3,				0x45042)
+EVENT(PM_IPTEG_FROM_L31_ECO_MOD,		0x45044)
+EVENT(PM_IPTEG_FROM_L31_ECO_SHR,		0x35044)
+EVENT(PM_IPTEG_FROM_L31_MOD,			0x25044)
+EVENT(PM_IPTEG_FROM_L31_SHR,			0x15046)
+EVENT(PM_IPTEG_FROM_L3_DISP_CONFLICT,		0x35042)
+EVENT(PM_IPTEG_FROM_L3_MEPF,			0x25042)
+EVENT(PM_IPTEG_FROM_L3MISS,			0x4504E)
+EVENT(PM_IPTEG_FROM_L3_NO_CONFLICT,		0x15044)
+EVENT(PM_IPTEG_FROM_LL4,			0x1504C)
+EVENT(PM_IPTEG_FROM_LMEM,			0x25048)
+EVENT(PM_IPTEG_FROM_MEMORY,			0x2504C)
+EVENT(PM_IPTEG_FROM_OFF_CHIP_CACHE,		0x4504A)
+EVENT(PM_IPTEG_FROM_ON_CHIP_CACHE,		0x15048)
+EVENT(PM_IPTEG_FROM_RL2L3_MOD,			0x25046)
+EVENT(PM_IPTEG_FROM_RL2L3_SHR,			0x1504A)
+EVENT(PM_IPTEG_FROM_RL4,			0x2504A)
+EVENT(PM_IPTEG_FROM_RMEM,			0x3504A)
+EVENT(PM_ISIDE_DISP,				0x617082)
+EVENT(PM_ISIDE_DISP_FAIL,			0x627084)
+EVENT(PM_ISIDE_DISP_FAIL_OTHER,			0x627086)
+EVENT(PM_ISIDE_L2MEMACC,			0x4608E)
+EVENT(PM_ISIDE_MRU_TOUCH,			0x44608E)
+EVENT(PM_ISLB_MISS,				0x0D096)
+EVENT(PM_ISU_REF_FX0,				0x030AC)
+EVENT(PM_ISU_REF_FX1,				0x030AE)
+EVENT(PM_ISU_REF_FXU,				0x038AC)
+EVENT(PM_ISU_REF_LS0,				0x030B0)
+EVENT(PM_ISU_REF_LS1,				0x030B2)
+EVENT(PM_ISU_REF_LS2,				0x030B4)
+EVENT(PM_ISU_REF_LS3,				0x030B6)
+EVENT(PM_ISU_REJECT_RES_NA,			0x030A2)
+EVENT(PM_ISU_REJECTS_ALL,			0x0309C)
+EVENT(PM_ISU_REJECT_SAR_BYPASS,			0x0309E)
+EVENT(PM_ISU_REJECT_SRC_NA,			0x030A0)
+EVENT(PM_ISU_REJ_VS0,				0x030A8)
+EVENT(PM_ISU_REJ_VS1,				0x030AA)
+EVENT(PM_ISU_REJ_VSU,				0x038A8)
+EVENT(PM_ISYNC,					0x030B8)
+EVENT(PM_ITLB_MISS,				0x400FC)
+EVENT(PM_L1_DCACHE_RELOADED_ALL,		0x1002C)
+EVENT(PM_L1_DCACHE_RELOAD_VALID,		0x300F6)
+EVENT(PM_L1_DEMAND_WRITE,			0x0408C)
+EVENT(PM_L1_ICACHE_MISS,			0x200FD)
+EVENT(PM_L1_ICACHE_RELOADED_ALL,		0x40012)
+EVENT(PM_L1_ICACHE_RELOADED_PREF,		0x30068)
+EVENT(PM_L1MISS_LAT_EXC_1024,			0x200301EA)
+EVENT(PM_L1MISS_LAT_EXC_2048,			0x200401EC)
+EVENT(PM_L1MISS_LAT_EXC_256,			0x200101E8)
+EVENT(PM_L1MISS_LAT_EXC_32,			0x200201E6)
+EVENT(PM_L1PF_L2MEMACC,				0x26086)
+EVENT(PM_L2_CASTOUT_MOD,			0x417080)
+EVENT(PM_L2_CASTOUT_SHR,			0x417082)
+EVENT(PM_L2_CHIP_PUMP,				0x27084)
+EVENT(PM_L2_DC_INV,				0x427086)
+EVENT(PM_L2_DISP_ALL_L2MISS,			0x44608C)
+EVENT(PM_L2_GROUP_PUMP,				0x64608E)
+EVENT(PM_L2_GRP_GUESS_CORRECT,			0x626084)
+EVENT(PM_L2_GRP_GUESS_WRONG,			0x626086)
+EVENT(PM_L2_IC_INV,				0x427084)
+EVENT(PM_L2_INST,				0x436088)
+EVENT(PM_L2_INST_MISS,				0x43608A)
+EVENT(PM_L2_LD,					0x416080)
+EVENT(PM_L2_LD_DISP,				0x437088)
+EVENT(PM_L2_LD_HIT,				0x43708A)
+EVENT(PM_L2_LD_MISS,				0x426084)
+EVENT(PM_L2_LOC_GUESS_CORRECT,			0x616080)
+EVENT(PM_L2_LOC_GUESS_WRONG,			0x616082)
+EVENT(PM_L2_RCLD_DISP,				0x516080)
+EVENT(PM_L2_RCLD_DISP_FAIL_ADDR,		0x516082)
+EVENT(PM_L2_RCLD_DISP_FAIL_OTHER,		0x526084)
+EVENT(PM_L2_RCST_DISP,				0x536088)
+EVENT(PM_L2_RCST_DISP_FAIL_ADDR,		0x53608A)
+EVENT(PM_L2_RCST_DISP_FAIL_OTHER,		0x54608C)
+EVENT(PM_L2_RC_ST_DONE,				0x537088)
+EVENT(PM_L2_RTY_LD,				0x63708A)
+EVENT(PM_L2_RTY_ST,				0x3708A)
+EVENT(PM_L2_SN_M_RD_DONE,			0x54708C)
+EVENT(PM_L2_SN_M_WR_DONE,			0x54708E)
+EVENT(PM_L2_SN_SX_I_DONE,			0x53708A)
 EVENT(PM_L2_ST,					0x17080)
+EVENT(PM_L2_ST_DISP,				0x44708C)
+EVENT(PM_L2_ST_HIT,				0x44708E)
 EVENT(PM_L2_ST_MISS,				0x17082)
-EVENT(PM_L3_PREF_ALL,				0x4e052)
-EVENT(PM_DTLB_MISS,				0x300fc)
-EVENT(PM_ITLB_MISS,				0x400fc)
+EVENT(PM_L2_SYS_GUESS_CORRECT,			0x636088)
+EVENT(PM_L2_SYS_GUESS_WRONG,			0x63608A)
+EVENT(PM_L2_SYS_PUMP,				0x37088)
+EVENT(PM_L2_TM_REQ_ABORT,			0x1E05E)
+EVENT(PM_L2_TM_ST_ABORT_SISTER,			0x3E05C)
+EVENT(PM_L3_CI_HIT,				0x128084)
+EVENT(PM_L3_CI_MISS,				0x128086)
+EVENT(PM_L3_CINJ,				0x23808A)
+EVENT(PM_L3_CI_USAGE,				0x819082)
+EVENT(PM_L3_CO0_ALLOC,				0x83908B)
+EVENT(PM_L3_CO0_BUSY,				0x83908A)
+EVENT(PM_L3_CO,					0x438088)
+EVENT(PM_L3_CO_L31,				0x28086)
+EVENT(PM_L3_CO_LCO,				0x238088)
+EVENT(PM_L3_CO_MEM,				0x28084)
+EVENT(PM_L3_CO_MEPF,				0x18082)
+EVENT(PM_L3_GRP_GUESS_CORRECT,			0xB19082)
+EVENT(PM_L3_GRP_GUESS_WRONG_HIGH,		0xB3908A)
+EVENT(PM_L3_GRP_GUESS_WRONG_LOW,		0xB39088)
+EVENT(PM_L3_HIT,				0x218080)
+EVENT(PM_L3_L2_CO_HIT,				0x138088)
+EVENT(PM_L3_L2_CO_MISS,				0x13808A)
+EVENT(PM_L3_LAT_CI_HIT,				0x14808C)
+EVENT(PM_L3_LAT_CI_MISS,			0x14808E)
+EVENT(PM_L3_LD_HIT,				0x228084)
+EVENT(PM_L3_LD_MISS,				0x228086)
+EVENT(PM_L3_LD_PREF,				0x1E052)
+EVENT(PM_L3_LOC_GUESS_CORRECT,			0xB19080)
+EVENT(PM_L3_LOC_GUESS_WRONG,			0xB29086)
+EVENT(PM_L3_MISS,				0x218082)
+EVENT(PM_L3_P0_CO_L31,				0x54808C)
+EVENT(PM_L3_P0_CO_MEM,				0x538088)
+EVENT(PM_L3_P0_CO_RTY,				0x929084)
+EVENT(PM_L3_P0_GRP_PUMP,			0xA29084)
+EVENT(PM_L3_P0_LCO_DATA,			0x528084)
+EVENT(PM_L3_P0_LCO_NO_DATA,			0x518080)
+EVENT(PM_L3_P0_LCO_RTY,				0xA4908C)
+EVENT(PM_L3_P0_NODE_PUMP,			0xA19080)
+EVENT(PM_L3_P0_PF_RTY,				0x919080)
+EVENT(PM_L3_P0_SN_HIT,				0x939088)
+EVENT(PM_L3_P0_SN_INV,				0x118080)
+EVENT(PM_L3_P0_SN_MISS,				0x94908C)
+EVENT(PM_L3_P0_SYS_PUMP,			0xA39088)
+EVENT(PM_L3_P1_CO_L31,				0x54808E)
+EVENT(PM_L3_P1_CO_MEM,				0x53808A)
+EVENT(PM_L3_P1_CO_RTY,				0x929086)
+EVENT(PM_L3_P1_GRP_PUMP,			0xA29086)
+EVENT(PM_L3_P1_LCO_DATA,			0x528086)
+EVENT(PM_L3_P1_LCO_NO_DATA,			0x518082)
+EVENT(PM_L3_P1_LCO_RTY,				0xA4908E)
+EVENT(PM_L3_P1_NODE_PUMP,			0xA19082)
+EVENT(PM_L3_P1_PF_RTY,				0x919082)
+EVENT(PM_L3_P1_SN_HIT,				0x93908A)
+EVENT(PM_L3_P1_SN_INV,				0x118082)
+EVENT(PM_L3_P1_SN_MISS,				0x94908E)
+EVENT(PM_L3_P1_SYS_PUMP,			0xA3908A)
+EVENT(PM_L3_PF0_ALLOC,				0x84908D)
+EVENT(PM_L3_PF0_BUSY,				0x84908C)
+EVENT(PM_L3_PF_HIT_L3,				0x428084)
+EVENT(PM_L3_PF_MISS_L3,				0x18080)
+EVENT(PM_L3_PF_OFF_CHIP_CACHE,			0x3808A)
+EVENT(PM_L3_PF_OFF_CHIP_MEM,			0x4808E)
+EVENT(PM_L3_PF_ON_CHIP_CACHE,			0x38088)
+EVENT(PM_L3_PF_ON_CHIP_MEM,			0x4808C)
+EVENT(PM_L3_PF_USAGE,				0x829084)
+EVENT(PM_L3_PREF_ALL,				0x4E052)
+EVENT(PM_L3_RD0_ALLOC,				0x84908F)
+EVENT(PM_L3_RD0_BUSY,				0x84908E)
+EVENT(PM_L3_RD_USAGE,				0x829086)
+EVENT(PM_L3_SN0_ALLOC,				0x839089)
+EVENT(PM_L3_SN0_BUSY,				0x839088)
+EVENT(PM_L3_SN_USAGE,				0x819080)
+EVENT(PM_L3_ST_PREF,				0x2E052)
+EVENT(PM_L3_SW_PREF,				0x3E052)
+EVENT(PM_L3_SYS_GUESS_CORRECT,			0xB29084)
+EVENT(PM_L3_SYS_GUESS_WRONG,			0xB4908C)
+EVENT(PM_L3_TRANS_PF,				0x24808E)
+EVENT(PM_L3_WI0_ALLOC,				0x18081)
+EVENT(PM_L3_WI0_BUSY,				0x418080)
+EVENT(PM_L3_WI_USAGE,				0x418082)
+EVENT(PM_LARX_FIN,				0x3C058)
+EVENT(PM_LD_CMPL,				0x1002E)
+EVENT(PM_LD_L3MISS_PEND_CYC,			0x10062)
+EVENT(PM_LD_MISS_L1,				0x3E054)
+EVENT(PM_LD_REF_L1,				0x100EE)
+EVENT(PM_LD_REF_L1_LSU0,			0x0C080)
+EVENT(PM_LD_REF_L1_LSU1,			0x0C082)
+EVENT(PM_LD_REF_L1_LSU2,			0x0C094)
+EVENT(PM_LD_REF_L1_LSU3,			0x0C096)
+EVENT(PM_LINK_STACK_INVALID_PTR,		0x0509A)
+EVENT(PM_LINK_STACK_WRONG_ADD_PRED,		0x05098)
+EVENT(PM_LS0_ERAT_MISS_PREF,			0x0E080)
+EVENT(PM_LS0_L1_PREF,				0x0D0B8)
+EVENT(PM_LS0_L1_SW_PREF,			0x0C098)
+EVENT(PM_LS1_ERAT_MISS_PREF,			0x0E082)
+EVENT(PM_LS1_L1_PREF,				0x0D0BA)
+EVENT(PM_LS1_L1_SW_PREF,			0x0C09A)
+EVENT(PM_LSU0_FLUSH_LRQ,			0x0C0B0)
+EVENT(PM_LSU0_FLUSH_SRQ,			0x0C0B8)
+EVENT(PM_LSU0_FLUSH_ULD,			0x0C0A4)
+EVENT(PM_LSU0_FLUSH_UST,			0x0C0AC)
+EVENT(PM_LSU0_L1_CAM_CANCEL,			0x0F088)
+EVENT(PM_LSU0_LARX_FIN,				0x1E056)
+EVENT(PM_LSU0_LMQ_LHR_MERGE,			0x0D08C)
+EVENT(PM_LSU0_NCLD,				0x0C08C)
+EVENT(PM_LSU0_PRIMARY_ERAT_HIT,			0x0E090)
+EVENT(PM_LSU0_REJECT,				0x1E05A)
+EVENT(PM_LSU0_SRQ_STFWD,			0x0C09C)
+EVENT(PM_LSU0_STORE_REJECT,			0x0F084)
+EVENT(PM_LSU0_TMA_REQ_L2,			0x0E0A8)
+EVENT(PM_LSU0_TM_L1_HIT,			0x0E098)
+EVENT(PM_LSU0_TM_L1_MISS,			0x0E0A0)
+EVENT(PM_LSU1_FLUSH_LRQ,			0x0C0B2)
+EVENT(PM_LSU1_FLUSH_SRQ,			0x0C0BA)
+EVENT(PM_LSU1_FLUSH_ULD,			0x0C0A6)
+EVENT(PM_LSU1_FLUSH_UST,			0x0C0AE)
+EVENT(PM_LSU1_L1_CAM_CANCEL,			0x0F08A)
+EVENT(PM_LSU1_LARX_FIN,				0x2E056)
+EVENT(PM_LSU1_LMQ_LHR_MERGE,			0x0D08E)
+EVENT(PM_LSU1_NCLD,				0x0C08E)
+EVENT(PM_LSU1_PRIMARY_ERAT_HIT,			0x0E092)
+EVENT(PM_LSU1_REJECT,				0x2E05A)
+EVENT(PM_LSU1_SRQ_STFWD,			0x0C09E)
+EVENT(PM_LSU1_STORE_REJECT,			0x0F086)
+EVENT(PM_LSU1_TMA_REQ_L2,			0x0E0AA)
+EVENT(PM_LSU1_TM_L1_HIT,			0x0E09A)
+EVENT(PM_LSU1_TM_L1_MISS,			0x0E0A2)
+EVENT(PM_LSU2_FLUSH_LRQ,			0x0C0B4)
+EVENT(PM_LSU2_FLUSH_SRQ,			0x0C0BC)
+EVENT(PM_LSU2_FLUSH_ULD,			0x0C0A8)
+EVENT(PM_LSU2_L1_CAM_CANCEL,			0x0F08C)
+EVENT(PM_LSU2_LARX_FIN,				0x3E056)
+EVENT(PM_LSU2_LDF,				0x0C084)
+EVENT(PM_LSU2_LDX,				0x0C088)
+EVENT(PM_LSU2_LMQ_LHR_MERGE,			0x0D090)
+EVENT(PM_LSU2_PRIMARY_ERAT_HIT,			0x0E094)
+EVENT(PM_LSU2_REJECT,				0x3E05A)
+EVENT(PM_LSU2_SRQ_STFWD,			0x0C0A0)
+EVENT(PM_LSU2_TMA_REQ_L2,			0x0E0AC)
+EVENT(PM_LSU2_TM_L1_HIT,			0x0E09C)
+EVENT(PM_LSU2_TM_L1_MISS,			0x0E0A4)
+EVENT(PM_LSU3_FLUSH_LRQ,			0x0C0B6)
+EVENT(PM_LSU3_FLUSH_SRQ,			0x0C0BE)
+EVENT(PM_LSU3_FLUSH_ULD,			0x0C0AA)
+EVENT(PM_LSU3_L1_CAM_CANCEL,			0x0F08E)
+EVENT(PM_LSU3_LARX_FIN,				0x4E056)
+EVENT(PM_LSU3_LDF,				0x0C086)
+EVENT(PM_LSU3_LDX,				0x0C08A)
+EVENT(PM_LSU3_LMQ_LHR_MERGE,			0x0D092)
+EVENT(PM_LSU3_PRIMARY_ERAT_HIT,			0x0E096)
+EVENT(PM_LSU3_REJECT,				0x4E05A)
+EVENT(PM_LSU3_SRQ_STFWD,			0x0C0A2)
+EVENT(PM_LSU3_TMA_REQ_L2,			0x0E0AE)
+EVENT(PM_LSU3_TM_L1_HIT,			0x0E09E)
+EVENT(PM_LSU3_TM_L1_MISS,			0x0E0A6)
+EVENT(PM_LSU_DERAT_MISS,			0x200F6)
+EVENT(PM_LSU_ERAT_MISS_PREF,			0x0E880)
+EVENT(PM_LSU_FIN,				0x30066)
+EVENT(PM_LSU_FLUSH_UST,				0x0C8AC)
+EVENT(PM_LSU_FOUR_TABLEWALK_CYC,		0x0D0A4)
+EVENT(PM_LSU_FX_FIN,				0x10066)
+EVENT(PM_LSU_L1_PREF,				0x0D8B8)
+EVENT(PM_LSU_L1_SW_PREF,			0x0C898)
+EVENT(PM_LSU_LDF,				0x0C884)
+EVENT(PM_LSU_LDX,				0x0C888)
+EVENT(PM_LSU_LMQ_FULL_CYC,			0x0D0A2)
+EVENT(PM_LSU_LMQ_S0_ALLOC,			0x0D0A1)
+EVENT(PM_LSU_LMQ_S0_VALID,			0x0D0A0)
+EVENT(PM_LSU_LMQ_SRQ_EMPTY_ALL_CYC,		0x3001C)
+EVENT(PM_LSU_LMQ_SRQ_EMPTY_CYC,			0x2003E)
+EVENT(PM_LSU_LRQ_S0_ALLOC,			0x0D09F)
+EVENT(PM_LSU_LRQ_S0_VALID,			0x0D09E)
+EVENT(PM_LSU_LRQ_S43_ALLOC,			0x0F091)
+EVENT(PM_LSU_LRQ_S43_VALID,			0x0F090)
+EVENT(PM_LSU_MRK_DERAT_MISS,			0x30162)
+EVENT(PM_LSU_NCLD,				0x0C88C)
+EVENT(PM_LSU_NCST,				0x0C092)
+EVENT(PM_LSU_REJECT,				0x10064)
+EVENT(PM_LSU_REJECT_ERAT_MISS,			0x2E05C)
+EVENT(PM_LSU_REJECT_LHS,			0x4E05C)
+EVENT(PM_LSU_REJECT_LMQ_FULL,			0x1E05C)
+EVENT(PM_LSU_SET_MPRED,				0x0D082)
+EVENT(PM_LSU_SRQ_EMPTY_CYC,			0x40008)
+EVENT(PM_LSU_SRQ_FULL_CYC,			0x1001A)
+EVENT(PM_LSU_SRQ_S0_ALLOC,			0x0D09D)
+EVENT(PM_LSU_SRQ_S0_VALID,			0x0D09C)
+EVENT(PM_LSU_SRQ_S39_ALLOC,			0x0F093)
+EVENT(PM_LSU_SRQ_S39_VALID,			0x0F092)
+EVENT(PM_LSU_SRQ_SYNC,				0x0D09B)
+EVENT(PM_LSU_SRQ_SYNC_CYC,			0x0D09A)
+EVENT(PM_LSU_STORE_REJECT,			0x0F084)
+EVENT(PM_LSU_TWO_TABLEWALK_CYC,			0x0D0A6)
+EVENT(PM_LWSYNC,				0x05094)
+EVENT(PM_LWSYNC_HELD,				0x0209A)
+EVENT(PM_MEM_CO,				0x4C058)
+EVENT(PM_MEM_LOC_THRESH_IFU,			0x10058)
+EVENT(PM_MEM_LOC_THRESH_LSU_HIGH,		0x40056)
+EVENT(PM_MEM_LOC_THRESH_LSU_MED,		0x1C05E)
+EVENT(PM_MEM_PREF,				0x2C058)
+EVENT(PM_MEM_READ,				0x10056)
+EVENT(PM_MEM_RWITM,				0x3C05E)
+EVENT(PM_MRK_BACK_BR_CMPL,			0x3515E)
+EVENT(PM_MRK_BR_CMPL,				0x1016E)
+EVENT(PM_MRK_BR_MPRED_CMPL,			0x301E4)
+EVENT(PM_MRK_BR_TAKEN_CMPL,			0x101E2)
+EVENT(PM_MRK_BRU_FIN,				0x2013A)
+EVENT(PM_MRK_CRU_FIN,				0x3013A)
+EVENT(PM_MRK_DATA_FROM_DL2L3_MOD,		0x4D148)
+EVENT(PM_MRK_DATA_FROM_DL2L3_MOD_CYC,		0x2D128)
+EVENT(PM_MRK_DATA_FROM_DL2L3_SHR,		0x3D148)
+EVENT(PM_MRK_DATA_FROM_DL2L3_SHR_CYC,		0x2C128)
+EVENT(PM_MRK_DATA_FROM_DL4,			0x3D14C)
+EVENT(PM_MRK_DATA_FROM_DL4_CYC,			0x2C12C)
+EVENT(PM_MRK_DATA_FROM_DMEM,			0x4D14C)
+EVENT(PM_MRK_DATA_FROM_DMEM_CYC,		0x2D12C)
+EVENT(PM_MRK_DATA_FROM_L2,			0x1D142)
+EVENT(PM_MRK_DATA_FROM_L21_MOD,			0x4D146)
+EVENT(PM_MRK_DATA_FROM_L21_MOD_CYC,		0x2D126)
+EVENT(PM_MRK_DATA_FROM_L21_SHR,			0x3D146)
+EVENT(PM_MRK_DATA_FROM_L21_SHR_CYC,		0x2C126)
+EVENT(PM_MRK_DATA_FROM_L2_CYC,			0x4C122)
+EVENT(PM_MRK_DATA_FROM_L2_DISP_CONFLICT_LDHITST,0x3D140)
+EVENT(PM_MRK_DATA_FROM_L2_DISP_CONFLICT_LDHITST_CYC,0x2C120)
+EVENT(PM_MRK_DATA_FROM_L2_DISP_CONFLICT_OTHER,	0x4D140)
+EVENT(PM_MRK_DATA_FROM_L2_DISP_CONFLICT_OTHER_CYC,0x2D120)
+EVENT(PM_MRK_DATA_FROM_L2_MEPF,			0x2D140)
+EVENT(PM_MRK_DATA_FROM_L2_MEPF_CYC,		0x4D120)
+EVENT(PM_MRK_DATA_FROM_L2MISS,			0x401E8)
+EVENT(PM_MRK_DATA_FROM_L2MISS_CYC,		0x4C12E)
+EVENT(PM_MRK_DATA_FROM_L2_NO_CONFLICT,		0x1D140)
+EVENT(PM_MRK_DATA_FROM_L2_NO_CONFLICT_CYC,	0x4C120)
+EVENT(PM_MRK_DATA_FROM_L3,			0x4D142)
+EVENT(PM_MRK_DATA_FROM_L31_ECO_MOD,		0x4D144)
+EVENT(PM_MRK_DATA_FROM_L31_ECO_MOD_CYC,		0x2D124)
+EVENT(PM_MRK_DATA_FROM_L31_ECO_SHR,		0x3D144)
+EVENT(PM_MRK_DATA_FROM_L31_ECO_SHR_CYC,		0x2C124)
+EVENT(PM_MRK_DATA_FROM_L31_MOD,			0x2D144)
+EVENT(PM_MRK_DATA_FROM_L31_MOD_CYC,		0x4D124)
+EVENT(PM_MRK_DATA_FROM_L31_SHR,			0x1D146)
+EVENT(PM_MRK_DATA_FROM_L31_SHR_CYC,		0x4C126)
+EVENT(PM_MRK_DATA_FROM_L3_CYC,			0x2D122)
+EVENT(PM_MRK_DATA_FROM_L3_DISP_CONFLICT,	0x3D142)
+EVENT(PM_MRK_DATA_FROM_L3_DISP_CONFLICT_CYC,	0x2C122)
+EVENT(PM_MRK_DATA_FROM_L3_MEPF,			0x2D142)
+EVENT(PM_MRK_DATA_FROM_L3_MEPF_CYC,		0x4D122)
+EVENT(PM_MRK_DATA_FROM_L3MISS,			0x201E4)
+EVENT(PM_MRK_DATA_FROM_L3MISS_CYC,		0x2D12E)
+EVENT(PM_MRK_DATA_FROM_L3_NO_CONFLICT,		0x1D144)
+EVENT(PM_MRK_DATA_FROM_L3_NO_CONFLICT_CYC,	0x4C124)
+EVENT(PM_MRK_DATA_FROM_LL4,			0x1D14C)
+EVENT(PM_MRK_DATA_FROM_LL4_CYC,			0x4C12C)
+EVENT(PM_MRK_DATA_FROM_LMEM,			0x2D148)
+EVENT(PM_MRK_DATA_FROM_LMEM_CYC,		0x4D128)
+EVENT(PM_MRK_DATA_FROM_MEM,			0x201E0)
+EVENT(PM_MRK_DATA_FROM_MEMORY,			0x2D14C)
+EVENT(PM_MRK_DATA_FROM_MEMORY_CYC,		0x4D12C)
+EVENT(PM_MRK_DATA_FROM_OFF_CHIP_CACHE,		0x4D14A)
+EVENT(PM_MRK_DATA_FROM_OFF_CHIP_CACHE_CYC,	0x2D12A)
+EVENT(PM_MRK_DATA_FROM_ON_CHIP_CACHE,		0x1D148)
+EVENT(PM_MRK_DATA_FROM_ON_CHIP_CACHE_CYC,	0x4C128)
+EVENT(PM_MRK_DATA_FROM_RL2L3_MOD,		0x2D146)
+EVENT(PM_MRK_DATA_FROM_RL2L3_MOD_CYC,		0x4D126)
+EVENT(PM_MRK_DATA_FROM_RL2L3_SHR,		0x1D14A)
+EVENT(PM_MRK_DATA_FROM_RL2L3_SHR_CYC,		0x4C12A)
+EVENT(PM_MRK_DATA_FROM_RL4,			0x2D14A)
+EVENT(PM_MRK_DATA_FROM_RL4_CYC,			0x4D12A)
+EVENT(PM_MRK_DATA_FROM_RMEM,			0x3D14A)
+EVENT(PM_MRK_DATA_FROM_RMEM_CYC,		0x2C12A)
+EVENT(PM_MRK_DCACHE_RELOAD_INTV,		0x40118)
+EVENT(PM_MRK_DERAT_MISS,			0x301E6)
+EVENT(PM_MRK_DERAT_MISS_16G,			0x4D154)
+EVENT(PM_MRK_DERAT_MISS_16M,			0x3D154)
+EVENT(PM_MRK_DERAT_MISS_4K,			0x1D156)
+EVENT(PM_MRK_DERAT_MISS_64K,			0x2D154)
+EVENT(PM_MRK_DFU_FIN,				0x20132)
+EVENT(PM_MRK_DPTEG_FROM_DL2L3_MOD,		0x4F148)
+EVENT(PM_MRK_DPTEG_FROM_DL2L3_SHR,		0x3F148)
+EVENT(PM_MRK_DPTEG_FROM_DL4,			0x3F14C)
+EVENT(PM_MRK_DPTEG_FROM_DMEM,			0x4F14C)
+EVENT(PM_MRK_DPTEG_FROM_L2,			0x1F142)
+EVENT(PM_MRK_DPTEG_FROM_L21_MOD,		0x4F146)
+EVENT(PM_MRK_DPTEG_FROM_L21_SHR,		0x3F146)
+EVENT(PM_MRK_DPTEG_FROM_L2_DISP_CONFLICT_LDHITST,0x3F140)
+EVENT(PM_MRK_DPTEG_FROM_L2_DISP_CONFLICT_OTHER,	0x4F140)
+EVENT(PM_MRK_DPTEG_FROM_L2_MEPF,		0x2F140)
+EVENT(PM_MRK_DPTEG_FROM_L2MISS,			0x1F14E)
+EVENT(PM_MRK_DPTEG_FROM_L2_NO_CONFLICT,		0x1F140)
+EVENT(PM_MRK_DPTEG_FROM_L3,			0x4F142)
+EVENT(PM_MRK_DPTEG_FROM_L31_ECO_MOD,		0x4F144)
+EVENT(PM_MRK_DPTEG_FROM_L31_ECO_SHR,		0x3F144)
+EVENT(PM_MRK_DPTEG_FROM_L31_MOD,		0x2F144)
+EVENT(PM_MRK_DPTEG_FROM_L31_SHR,		0x1F146)
+EVENT(PM_MRK_DPTEG_FROM_L3_DISP_CONFLICT,	0x3F142)
+EVENT(PM_MRK_DPTEG_FROM_L3_MEPF,		0x2F142)
+EVENT(PM_MRK_DPTEG_FROM_L3MISS,			0x4F14E)
+EVENT(PM_MRK_DPTEG_FROM_L3_NO_CONFLICT,		0x1F144)
+EVENT(PM_MRK_DPTEG_FROM_LL4,			0x1F14C)
+EVENT(PM_MRK_DPTEG_FROM_LMEM,			0x2F148)
+EVENT(PM_MRK_DPTEG_FROM_MEMORY,			0x2F14C)
+EVENT(PM_MRK_DPTEG_FROM_OFF_CHIP_CACHE,		0x4F14A)
+EVENT(PM_MRK_DPTEG_FROM_ON_CHIP_CACHE,		0x1F148)
+EVENT(PM_MRK_DPTEG_FROM_RL2L3_MOD,		0x2F146)
+EVENT(PM_MRK_DPTEG_FROM_RL2L3_SHR,		0x1F14A)
+EVENT(PM_MRK_DPTEG_FROM_RL4,			0x2F14A)
+EVENT(PM_MRK_DPTEG_FROM_RMEM,			0x3F14A)
+EVENT(PM_MRK_DTLB_MISS,				0x401E4)
+EVENT(PM_MRK_DTLB_MISS_16G,			0x1D158)
+EVENT(PM_MRK_DTLB_MISS_16M,			0x4D156)
+EVENT(PM_MRK_DTLB_MISS_4K,			0x2D156)
+EVENT(PM_MRK_DTLB_MISS_64K,			0x3D156)
+EVENT(PM_MRK_FAB_RSP_BKILL,			0x40154)
+EVENT(PM_MRK_FAB_RSP_BKILL_CYC,			0x2F150)
+EVENT(PM_MRK_FAB_RSP_CLAIM_RTY,			0x3015E)
+EVENT(PM_MRK_FAB_RSP_DCLAIM,			0x30154)
+EVENT(PM_MRK_FAB_RSP_DCLAIM_CYC,		0x2F152)
+EVENT(PM_MRK_FAB_RSP_MATCH,			0x30156)
+EVENT(PM_MRK_FAB_RSP_MATCH_CYC,			0x4F152)
+EVENT(PM_MRK_FAB_RSP_RD_RTY,			0x4015E)
+EVENT(PM_MRK_FAB_RSP_RD_T_INTV,			0x1015E)
+EVENT(PM_MRK_FAB_RSP_RWITM_CYC,			0x4F150)
+EVENT(PM_MRK_FAB_RSP_RWITM_RTY,			0x2015E)
+EVENT(PM_MRK_FILT_MATCH,			0x3012E)
+EVENT(PM_MRK_FIN_STALL_CYC,			0x1013C)
+EVENT(PM_MRK_FXU_FIN,				0x20134)
+EVENT(PM_MRK_GRP_CMPL,				0x40130)
+EVENT(PM_MRK_GRP_IC_MISS,			0x4013A)
+EVENT(PM_MRK_GRP_NTC,				0x3013C)
+EVENT(PM_MRK_INST_CMPL,				0x401E0)
+EVENT(PM_MRK_INST_DECODED,			0x20130)
+EVENT(PM_MRK_INST_DISP,				0x101E0)
+EVENT(PM_MRK_INST_FIN,				0x30130)
+EVENT(PM_MRK_INST_FROM_L3MISS,			0x401E6)
+EVENT(PM_MRK_INST_ISSUED,			0x10132)
+EVENT(PM_MRK_INST_TIMEO,			0x40134)
+EVENT(PM_MRK_L1_ICACHE_MISS,			0x101E4)
+EVENT(PM_MRK_L1_RELOAD_VALID,			0x101EA)
+EVENT(PM_MRK_L2_RC_DISP,			0x20114)
+EVENT(PM_MRK_L2_RC_DONE,			0x3012A)
+EVENT(PM_MRK_LARX_FIN,				0x40116)
+EVENT(PM_MRK_LD_MISS_EXPOSED,			0x1013F)
+EVENT(PM_MRK_LD_MISS_EXPOSED_CYC,		0x1013E)
+EVENT(PM_MRK_LD_MISS_L1,			0x201E2)
+EVENT(PM_MRK_LD_MISS_L1_CYC,			0x4013E)
+EVENT(PM_MRK_LSU_FIN,				0x40132)
+EVENT(PM_MRK_LSU_FLUSH,				0x0D180)
+EVENT(PM_MRK_LSU_FLUSH_LRQ,			0x0D188)
+EVENT(PM_MRK_LSU_FLUSH_SRQ,			0x0D18A)
+EVENT(PM_MRK_LSU_FLUSH_ULD,			0x0D184)
+EVENT(PM_MRK_LSU_FLUSH_UST,			0x0D186)
+EVENT(PM_MRK_LSU_REJECT,			0x40164)
+EVENT(PM_MRK_LSU_REJECT_ERAT_MISS,		0x30164)
+EVENT(PM_MRK_NTF_FIN,				0x20112)
+EVENT(PM_MRK_RUN_CYC,				0x1D15E)
+EVENT(PM_MRK_SRC_PREF_TRACK_EFF,		0x1D15A)
+EVENT(PM_MRK_SRC_PREF_TRACK_INEFF,		0x3D15A)
+EVENT(PM_MRK_SRC_PREF_TRACK_MOD,		0x4D15C)
+EVENT(PM_MRK_SRC_PREF_TRACK_MOD_L2,		0x1D15C)
+EVENT(PM_MRK_SRC_PREF_TRACK_MOD_L3,		0x3D15C)
+EVENT(PM_MRK_STALL_CMPLU_CYC,			0x3013E)
+EVENT(PM_MRK_ST_CMPL,				0x10134)
+EVENT(PM_MRK_ST_CMPL_INT,			0x30134)
+EVENT(PM_MRK_STCX_FAIL,				0x3E158)
+EVENT(PM_MRK_ST_DRAIN_TO_L2DISP_CYC,		0x3F150)
+EVENT(PM_MRK_ST_FWD,				0x3012C)
+EVENT(PM_MRK_ST_L2DISP_TO_CMPL_CYC,		0x1F150)
+EVENT(PM_MRK_ST_NEST,				0x20138)
+EVENT(PM_MRK_TGT_PREF_TRACK_EFF,		0x1C15A)
+EVENT(PM_MRK_TGT_PREF_TRACK_INEFF,		0x3C15A)
+EVENT(PM_MRK_TGT_PREF_TRACK_MOD,		0x4C15C)
+EVENT(PM_MRK_TGT_PREF_TRACK_MOD_L2,		0x1C15C)
+EVENT(PM_MRK_TGT_PREF_TRACK_MOD_L3,		0x3C15C)
+EVENT(PM_MRK_VSU_FIN,				0x30132)
+EVENT(PM_MULT_MRK,				0x3D15E)
+EVENT(PM_NESTED_TEND,				0x020B0)
+EVENT(PM_NEST_REF_CLK,				0x3006E)
+EVENT(PM_NON_FAV_TBEGIN,			0x020B6)
+EVENT(PM_NON_TM_RST_SC,				0x328084)
+EVENT(PM_NTCG_ALL_FIN,				0x2001A)
+EVENT(PM_OUTER_TBEGIN,				0x020AC)
+EVENT(PM_OUTER_TEND,				0x020AE)
+EVENT(PM_PMC1_OVERFLOW,				0x20010)
+EVENT(PM_PMC2_OVERFLOW,				0x30010)
+EVENT(PM_PMC2_REWIND,				0x30020)
+EVENT(PM_PMC2_SAVED,				0x10022)
+EVENT(PM_PMC3_OVERFLOW,				0x40010)
+EVENT(PM_PMC4_OVERFLOW,				0x10010)
+EVENT(PM_PMC4_REWIND,				0x10020)
+EVENT(PM_PMC4_SAVED,				0x30022)
+EVENT(PM_PMC5_OVERFLOW,				0x10024)
+EVENT(PM_PMC6_OVERFLOW,				0x30024)
+EVENT(PM_PREF_TRACKED,				0x2005A)
+EVENT(PM_PREF_TRACK_EFF,			0x1005A)
+EVENT(PM_PREF_TRACK_INEFF,			0x3005A)
+EVENT(PM_PREF_TRACK_MOD,			0x4005A)
+EVENT(PM_PREF_TRACK_MOD_L2,			0x1005C)
+EVENT(PM_PREF_TRACK_MOD_L3,			0x3005C)
+EVENT(PM_PROBE_NOP_DISP,			0x40014)
+EVENT(PM_PTE_PREFETCH,				0x0E084)
+EVENT(PM_PUMP_CPRED,				0x10054)
+EVENT(PM_PUMP_MPRED,				0x40052)
+EVENT(PM_RC0_ALLOC,				0x16081)
+EVENT(PM_RC0_BUSY,				0x16080)
+EVENT(PM_RC_LIFETIME_EXC_1024,			0x200301EA)
+EVENT(PM_RC_LIFETIME_EXC_2048,			0x200401EC)
+EVENT(PM_RC_LIFETIME_EXC_256,			0x200101E8)
+EVENT(PM_RC_LIFETIME_EXC_32,			0x200201E6)
+EVENT(PM_RC_USAGE,				0x36088)
+EVENT(PM_RD_CLEARING_SC,			0x34808E)
+EVENT(PM_RD_FORMING_SC,				0x34808C)
+EVENT(PM_RD_HIT_PF,				0x428086)
+EVENT(PM_REAL_SRQ_FULL,				0x20004)
+EVENT(PM_RUN_CYC,				0x600F4)
+EVENT(PM_RUN_CYC_SMT2_MODE,			0x3006C)
+EVENT(PM_RUN_CYC_SMT2_SHRD_MODE,		0x2006A)
+EVENT(PM_RUN_CYC_SMT2_SPLIT_MODE,		0x1006A)
+EVENT(PM_RUN_CYC_SMT4_MODE,			0x2006C)
+EVENT(PM_RUN_CYC_SMT8_MODE,			0x4006C)
+EVENT(PM_RUN_CYC_ST_MODE,			0x1006C)
+EVENT(PM_RUN_INST_CMPL,				0x500FA)
+EVENT(PM_RUN_PURR,				0x400F4)
+EVENT(PM_RUN_SPURR,				0x10008)
+EVENT(PM_SEC_ERAT_HIT,				0x0F082)
+EVENT(PM_SHL_CREATED,				0x0508C)
+EVENT(PM_SHL_ST_CONVERT,			0x0508E)
+EVENT(PM_SHL_ST_DISABLE,			0x05090)
+EVENT(PM_SN0_ALLOC,				0x26085)
+EVENT(PM_SN0_BUSY,				0x26084)
+EVENT(PM_SNOOP_TLBIE,				0x0D0B2)
+EVENT(PM_SNP_TM_HIT_M,				0x338088)
+EVENT(PM_SNP_TM_HIT_T,				0x33808A)
+EVENT(PM_SN_USAGE,				0x4608C)
+EVENT(PM_STALL_END_GCT_EMPTY,			0x10028)
+EVENT(PM_ST_CAUSED_FAIL,			0x717080)
+EVENT(PM_ST_CMPL,				0x20016)
+EVENT(PM_STCX_FAIL,				0x1E058)
+EVENT(PM_STCX_LSU,				0x0C090)
+EVENT(PM_ST_FIN,				0x200F0)
+EVENT(PM_ST_FWD,				0x20018)
+EVENT(PM_ST_MISS_L1,				0x300F0)
+EVENT(PM_SUSPENDED,				0x00000)
+EVENT(PM_SWAP_CANCEL,				0x03090)
+EVENT(PM_SWAP_CANCEL_GPR,			0x03092)
+EVENT(PM_SWAP_COMPLETE,				0x0308C)
+EVENT(PM_SWAP_COMPLETE_GPR,			0x0308E)
+EVENT(PM_SYNC_MRK_BR_LINK,			0x15152)
+EVENT(PM_SYNC_MRK_BR_MPRED,			0x1515C)
+EVENT(PM_SYNC_MRK_FX_DIVIDE,			0x15156)
+EVENT(PM_SYNC_MRK_L2HIT,			0x15158)
+EVENT(PM_SYNC_MRK_L2MISS,			0x1515A)
+EVENT(PM_SYNC_MRK_L3MISS,			0x15154)
+EVENT(PM_SYNC_MRK_PROBE_NOP,			0x15150)
+EVENT(PM_SYS_PUMP_CPRED,			0x30050)
+EVENT(PM_SYS_PUMP_MPRED,			0x30052)
+EVENT(PM_SYS_PUMP_MPRED_RTY,			0x40050)
+EVENT(PM_TABLEWALK_CYC,				0x10026)
+EVENT(PM_TABLEWALK_CYC_PREF,			0x0E086)
+EVENT(PM_TABORT_TRECLAIM,			0x020B2)
+EVENT(PM_TB_BIT_TRANS,				0x300F8)
+EVENT(PM_TEND_PEND_CYC,				0x0E0BA)
+EVENT(PM_THRD_ALL_RUN_CYC,			0x2000C)
+EVENT(PM_THRD_CONC_RUN_INST,			0x300F4)
+EVENT(PM_THRD_GRP_CMPL_BOTH_CYC,		0x10012)
+EVENT(PM_THRD_PRIO_0_1_CYC,			0x040BC)
+EVENT(PM_THRD_PRIO_2_3_CYC,			0x040BE)
+EVENT(PM_THRD_PRIO_4_5_CYC,			0x05080)
+EVENT(PM_THRD_PRIO_6_7_CYC,			0x05082)
+EVENT(PM_THRD_REBAL_CYC,			0x03098)
+EVENT(PM_THRESH_EXC_1024,			0x301EA)
+EVENT(PM_THRESH_EXC_128,			0x401EA)
+EVENT(PM_THRESH_EXC_2048,			0x401EC)
+EVENT(PM_THRESH_EXC_256,			0x101E8)
+EVENT(PM_THRESH_EXC_32,				0x201E6)
+EVENT(PM_THRESH_EXC_4096,			0x101E6)
+EVENT(PM_THRESH_EXC_512,			0x201E8)
+EVENT(PM_THRESH_EXC_64,				0x301E8)
+EVENT(PM_THRESH_MET,				0x101EC)
+EVENT(PM_THRESH_NOT_MET,			0x4016E)
+EVENT(PM_TLBIE_FIN,				0x30058)
+EVENT(PM_TLB_MISS,				0x20066)
+EVENT(PM_TM_BEGIN_ALL,				0x020B8)
+EVENT(PM_TM_CAM_OVERFLOW,			0x318082)
+EVENT(PM_TM_CAP_OVERFLOW,			0x74708C)
+EVENT(PM_TM_END_ALL,				0x020BA)
+EVENT(PM_TM_FAIL_CONF_NON_TM,			0x03086)
+EVENT(PM_TM_FAIL_CON_TM,			0x03088)
+EVENT(PM_TM_FAIL_DISALLOW,			0x0E0B2)
+EVENT(PM_TM_FAIL_FOOTPRINT_OVERFLOW,		0x03084)
+EVENT(PM_TM_FAIL_NON_TX_CONFLICT,		0x0E0B8)
+EVENT(PM_TM_FAIL_SELF,				0x0308A)
+EVENT(PM_TM_FAIL_TLBIE,				0x0E0B4)
+EVENT(PM_TM_FAIL_TX_CONFLICT,			0x0E0B6)
+EVENT(PM_TM_FAV_CAUSED_FAIL,			0x727086)
+EVENT(PM_TM_LD_CAUSED_FAIL,			0x717082)
+EVENT(PM_TM_LD_CONF,				0x727084)
+EVENT(PM_TM_RST_SC,				0x328086)
+EVENT(PM_TM_SC_CO,				0x318080)
+EVENT(PM_TM_ST_CAUSED_FAIL,			0x73708A)
+EVENT(PM_TM_ST_CONF,				0x737088)
+EVENT(PM_TM_TBEGIN,				0x020BC)
+EVENT(PM_TM_TRANS_RUN_CYC,			0x10060)
+EVENT(PM_TM_TRANS_RUN_INST,			0x30060)
+EVENT(PM_TM_TRESUME,				0x03080)
+EVENT(PM_TM_TSUSPEND,				0x020BE)
+EVENT(PM_TM_TX_PASS_RUN_CYC,			0x2E012)
+EVENT(PM_TM_TX_PASS_RUN_INST,			0x4E014)
+EVENT(PM_UP_PREF_L3,				0x0E08C)
+EVENT(PM_UP_PREF_POINTER,			0x0E08E)
+EVENT(PM_VSU0_16FLOP,				0x0A0A4)
+EVENT(PM_VSU0_1FLOP,				0x0A080)
+EVENT(PM_VSU0_2FLOP,				0x0A098)
+EVENT(PM_VSU0_4FLOP,				0x0A09C)
+EVENT(PM_VSU0_8FLOP,				0x0A0A0)
+EVENT(PM_VSU0_COMPLEX_ISSUED,			0x0B0A4)
+EVENT(PM_VSU0_CY_ISSUED,			0x0B0B4)
+EVENT(PM_VSU0_DD_ISSUED,			0x0B0A8)
+EVENT(PM_VSU0_DP_2FLOP,				0x0A08C)
+EVENT(PM_VSU0_DP_FMA,				0x0A090)
+EVENT(PM_VSU0_DP_FSQRT_FDIV,			0x0A094)
+EVENT(PM_VSU0_DQ_ISSUED,			0x0B0AC)
+EVENT(PM_VSU0_EX_ISSUED,			0x0B0B0)
+EVENT(PM_VSU0_FIN,				0x0A0BC)
+EVENT(PM_VSU0_FMA,				0x0A084)
+EVENT(PM_VSU0_FPSCR,				0x0B098)
+EVENT(PM_VSU0_FSQRT_FDIV,			0x0A088)
+EVENT(PM_VSU0_PERMUTE_ISSUED,			0x0B090)
+EVENT(PM_VSU0_SCALAR_DP_ISSUED,			0x0B088)
+EVENT(PM_VSU0_SIMPLE_ISSUED,			0x0B094)
+EVENT(PM_VSU0_SINGLE,				0x0A0A8)
+EVENT(PM_VSU0_SQ,				0x0B09C)
+EVENT(PM_VSU0_STF,				0x0B08C)
+EVENT(PM_VSU0_VECTOR_DP_ISSUED,			0x0B080)
+EVENT(PM_VSU0_VECTOR_SP_ISSUED,			0x0B084)
+EVENT(PM_VSU1_16FLOP,				0x0A0A6)
+EVENT(PM_VSU1_1FLOP,				0x0A082)
+EVENT(PM_VSU1_2FLOP,				0x0A09A)
+EVENT(PM_VSU1_4FLOP,				0x0A09E)
+EVENT(PM_VSU1_8FLOP,				0x0A0A2)
+EVENT(PM_VSU1_COMPLEX_ISSUED,			0x0B0A6)
+EVENT(PM_VSU1_CY_ISSUED,			0x0B0B6)
+EVENT(PM_VSU1_DD_ISSUED,			0x0B0AA)
+EVENT(PM_VSU1_DP_2FLOP,				0x0A08E)
+EVENT(PM_VSU1_DP_FMA,				0x0A092)
+EVENT(PM_VSU1_DP_FSQRT_FDIV,			0x0A096)
+EVENT(PM_VSU1_DQ_ISSUED,			0x0B0AE)
+EVENT(PM_VSU1_EX_ISSUED,			0x0B0B2)
+EVENT(PM_VSU1_FIN,				0x0A0BE)
+EVENT(PM_VSU1_FMA,				0x0A086)
+EVENT(PM_VSU1_FPSCR,				0x0B09A)
+EVENT(PM_VSU1_FSQRT_FDIV,			0x0A08A)
+EVENT(PM_VSU1_PERMUTE_ISSUED,			0x0B092)
+EVENT(PM_VSU1_SCALAR_DP_ISSUED,			0x0B08A)
+EVENT(PM_VSU1_SIMPLE_ISSUED,			0x0B096)
+EVENT(PM_VSU1_SINGLE,				0x0A0AA)
+EVENT(PM_VSU1_SQ,				0x0B09E)
+EVENT(PM_VSU1_STF,				0x0B08E)
+EVENT(PM_VSU1_VECTOR_DP_ISSUED,			0x0B082)
+EVENT(PM_VSU1_VECTOR_SP_ISSUED,			0x0B086)
-- 
2.5.3

^ permalink raw reply related	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2015-11-02 20:25 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2015-11-02 20:22 [PATCH 0/4] powerpc/perf: Export Power8 PMU events in sysfs Sukadev Bhattiprolu
2015-11-02 20:22 ` [PATCH 1/4] powerpc/perf: Remove PME_ prefix for power7 events Sukadev Bhattiprolu
2015-11-02 20:22 ` [PATCH 2/4] powerpc/perf: Export Power8 generic and cache events in sysfs Sukadev Bhattiprolu
2015-11-02 20:22 ` [PATCH 3/4] powerpc/perf: Rename some Power8 events Sukadev Bhattiprolu
2015-11-02 20:22 ` [PATCH 4/4] powerpc/perf: Export all Power8 PMU events in sysfs Sukadev Bhattiprolu

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