* [PATCH V4 1/5] dt-bindings: Add QorIQ TMU thermal bindings
2015-11-24 6:52 [PATCH V4 0/5] TMU support for QorIQ platform Jia Hongtao
@ 2015-11-24 6:52 ` Jia Hongtao
2015-11-24 23:20 ` Rob Herring
2015-11-24 6:52 ` [PATCH V4 2/5] thermal: qoriq: Add thermal management support Jia Hongtao
` (3 subsequent siblings)
4 siblings, 1 reply; 7+ messages in thread
From: Jia Hongtao @ 2015-11-24 6:52 UTC (permalink / raw)
To: edubezval; +Cc: linux-pm, linuxppc-dev, devicetree, scottwood, hongtao.jia
Add bindings documentation for TMU (Thermal Monitoring Unit) on QorIQ
platform.
Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
Reviewed-by: Scott Wood <scottwood@freescale.com>
---
.../devicetree/bindings/thermal/qoriq-thermal.txt | 63 ++++++++++++++++++++++
1 file changed, 63 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
diff --git a/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt b/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
new file mode 100644
index 0000000..66223d5
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
@@ -0,0 +1,63 @@
+* Thermal Monitoring Unit (TMU) on Freescale QorIQ SoCs
+
+Required properties:
+- compatible : Must include "fsl,qoriq-tmu". The version of the device is
+ determined by the TMU IP Block Revision Register (IPBRR0) at
+ offset 0x0BF8.
+ Table of correspondences between IPBRR0 values and example chips:
+ Value Device
+ ---------- -----
+ 0x01900102 T1040
+- reg : Address range of TMU registers.
+- interrupts : Contains the interrupt for TMU.
+- fsl,tmu-range : The values to be programmed into TTRnCR, as specified by
+ the SoC reference manual. The first cell is TTR0CR, the second is
+ TTR1CR, etc.
+- fsl,tmu-calibration : A list of cell pairs containing temperature
+ calibration data, as specified by the SoC reference manual.
+ The first cell of each pair is the value to be written to TTCFGR,
+ and the second is the value to be written to TSCFGR.
+
+Example:
+
+tmu@f0000 {
+ compatible = "fsl,qoriq-tmu";
+ reg = <0xf0000 0x1000>;
+ interrupts = <18 2 0 0>;
+ fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>;
+ fsl,tmu-calibration = <0x00000000 0x00000025
+ 0x00000001 0x00000028
+ 0x00000002 0x0000002d
+ 0x00000003 0x00000031
+ 0x00000004 0x00000036
+ 0x00000005 0x0000003a
+ 0x00000006 0x00000040
+ 0x00000007 0x00000044
+ 0x00000008 0x0000004a
+ 0x00000009 0x0000004f
+ 0x0000000a 0x00000054
+
+ 0x00010000 0x0000000d
+ 0x00010001 0x00000013
+ 0x00010002 0x00000019
+ 0x00010003 0x0000001f
+ 0x00010004 0x00000025
+ 0x00010005 0x0000002d
+ 0x00010006 0x00000033
+ 0x00010007 0x00000043
+ 0x00010008 0x0000004b
+ 0x00010009 0x00000053
+
+ 0x00020000 0x00000010
+ 0x00020001 0x00000017
+ 0x00020002 0x0000001f
+ 0x00020003 0x00000029
+ 0x00020004 0x00000031
+ 0x00020005 0x0000003c
+ 0x00020006 0x00000042
+ 0x00020007 0x0000004d
+ 0x00020008 0x00000056
+
+ 0x00030000 0x00000012
+ 0x00030001 0x0000001d>;
+};
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH V4 1/5] dt-bindings: Add QorIQ TMU thermal bindings
2015-11-24 6:52 ` [PATCH V4 1/5] dt-bindings: Add QorIQ TMU thermal bindings Jia Hongtao
@ 2015-11-24 23:20 ` Rob Herring
0 siblings, 0 replies; 7+ messages in thread
From: Rob Herring @ 2015-11-24 23:20 UTC (permalink / raw)
To: Jia Hongtao; +Cc: edubezval, linux-pm, linuxppc-dev, devicetree, scottwood
On Tue, Nov 24, 2015 at 02:52:44PM +0800, Jia Hongtao wrote:
> Add bindings documentation for TMU (Thermal Monitoring Unit) on QorIQ
> platform.
>
> Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
> Reviewed-by: Scott Wood <scottwood@freescale.com>
Acked-by: Rob Herring <robh@kernel.org>
> ---
> .../devicetree/bindings/thermal/qoriq-thermal.txt | 63 ++++++++++++++++++++++
> 1 file changed, 63 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
>
> diff --git a/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt b/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
> new file mode 100644
> index 0000000..66223d5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
> @@ -0,0 +1,63 @@
> +* Thermal Monitoring Unit (TMU) on Freescale QorIQ SoCs
> +
> +Required properties:
> +- compatible : Must include "fsl,qoriq-tmu". The version of the device is
> + determined by the TMU IP Block Revision Register (IPBRR0) at
> + offset 0x0BF8.
> + Table of correspondences between IPBRR0 values and example chips:
> + Value Device
> + ---------- -----
> + 0x01900102 T1040
> +- reg : Address range of TMU registers.
> +- interrupts : Contains the interrupt for TMU.
> +- fsl,tmu-range : The values to be programmed into TTRnCR, as specified by
> + the SoC reference manual. The first cell is TTR0CR, the second is
> + TTR1CR, etc.
> +- fsl,tmu-calibration : A list of cell pairs containing temperature
> + calibration data, as specified by the SoC reference manual.
> + The first cell of each pair is the value to be written to TTCFGR,
> + and the second is the value to be written to TSCFGR.
> +
> +Example:
> +
> +tmu@f0000 {
> + compatible = "fsl,qoriq-tmu";
> + reg = <0xf0000 0x1000>;
> + interrupts = <18 2 0 0>;
> + fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>;
> + fsl,tmu-calibration = <0x00000000 0x00000025
> + 0x00000001 0x00000028
> + 0x00000002 0x0000002d
> + 0x00000003 0x00000031
> + 0x00000004 0x00000036
> + 0x00000005 0x0000003a
> + 0x00000006 0x00000040
> + 0x00000007 0x00000044
> + 0x00000008 0x0000004a
> + 0x00000009 0x0000004f
> + 0x0000000a 0x00000054
> +
> + 0x00010000 0x0000000d
> + 0x00010001 0x00000013
> + 0x00010002 0x00000019
> + 0x00010003 0x0000001f
> + 0x00010004 0x00000025
> + 0x00010005 0x0000002d
> + 0x00010006 0x00000033
> + 0x00010007 0x00000043
> + 0x00010008 0x0000004b
> + 0x00010009 0x00000053
> +
> + 0x00020000 0x00000010
> + 0x00020001 0x00000017
> + 0x00020002 0x0000001f
> + 0x00020003 0x00000029
> + 0x00020004 0x00000031
> + 0x00020005 0x0000003c
> + 0x00020006 0x00000042
> + 0x00020007 0x0000004d
> + 0x00020008 0x00000056
> +
> + 0x00030000 0x00000012
> + 0x00030001 0x0000001d>;
> +};
> --
> 2.1.0.27.g96db324
>
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH V4 2/5] thermal: qoriq: Add thermal management support
2015-11-24 6:52 [PATCH V4 0/5] TMU support for QorIQ platform Jia Hongtao
2015-11-24 6:52 ` [PATCH V4 1/5] dt-bindings: Add QorIQ TMU thermal bindings Jia Hongtao
@ 2015-11-24 6:52 ` Jia Hongtao
2015-11-24 6:52 ` [PATCH V4 3/5] powerpc/mpc85xx: Add TMU device tree support for T1040/T1042 Jia Hongtao
` (2 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Jia Hongtao @ 2015-11-24 6:52 UTC (permalink / raw)
To: edubezval; +Cc: linux-pm, linuxppc-dev, devicetree, scottwood, hongtao.jia
This driver add thermal management support by enabling TMU (Thermal
Monitoring Unit) on QorIQ platform.
It's based on thermal of framework:
- Trip points defined in device tree.
- Cpufreq as cooling device registered in qoriq cpufreq driver.
Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
Reviewed-by: Scott Wood <scottwood@freescale.com>
---
V4 changes:
- Code cleanup:
* Remove unnecessary comments.
* Remove unnecessary cpufreq.h inclusion.
* Remove unnecessary ENABLE mode setting in probe function.
* Redefine tmu_get_temp function.
V3 changes:
- Using thermal of framework.
drivers/thermal/Kconfig | 10 ++
drivers/thermal/Makefile | 1 +
drivers/thermal/qoriq_thermal.c | 262 ++++++++++++++++++++++++++++++++++++++++
3 files changed, 273 insertions(+)
create mode 100644 drivers/thermal/qoriq_thermal.c
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index c463c89..43a925c 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -194,6 +194,16 @@ config IMX_THERMAL
cpufreq is used as the cooling device to throttle CPUs when the
passive trip is crossed.
+config QORIQ_THERMAL
+ tristate "Freescale QorIQ Thermal Monitoring Unit"
+ depends on CPU_THERMAL
+ depends on THERMAL_OF
+ help
+ Enable thermal management based on Freescale QorIQ Thermal Monitoring
+ Unit (TMU). It supports one critical trip point and one passive trip
+ point. The cpufreq is used as the cooling device to throttle CPUs when
+ the passive trip is crossed.
+
config SPEAR_THERMAL
bool "SPEAr thermal sensor driver"
depends on PLAT_SPEAR || COMPILE_TEST
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index cfae6a6..e269979 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -36,6 +36,7 @@ obj-$(CONFIG_DOVE_THERMAL) += dove_thermal.o
obj-$(CONFIG_DB8500_THERMAL) += db8500_thermal.o
obj-$(CONFIG_ARMADA_THERMAL) += armada_thermal.o
obj-$(CONFIG_IMX_THERMAL) += imx_thermal.o
+obj-$(CONFIG_QORIQ_THERMAL) += qoriq_thermal.o
obj-$(CONFIG_DB8500_CPUFREQ_COOLING) += db8500_cpufreq_cooling.o
obj-$(CONFIG_INTEL_POWERCLAMP) += intel_powerclamp.o
obj-$(CONFIG_X86_PKG_TEMP_THERMAL) += x86_pkg_temp_thermal.o
diff --git a/drivers/thermal/qoriq_thermal.c b/drivers/thermal/qoriq_thermal.c
new file mode 100644
index 0000000..2a563f9
--- /dev/null
+++ b/drivers/thermal/qoriq_thermal.c
@@ -0,0 +1,262 @@
+/*
+ * Copyright 2015 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/thermal.h>
+
+#include "thermal_core.h"
+
+#define SITES_MAX 16
+
+/*
+ * QorIQ TMU Registers
+ */
+struct qoriq_tmu_site_regs {
+ __be32 tritsr; /* Immediate Temperature Site Register */
+ __be32 tratsr; /* Average Temperature Site Register */
+ u8 res0[0x8];
+} __packed;
+
+struct qoriq_tmu_regs {
+ __be32 tmr; /* Mode Register */
+#define TMR_DISABLE 0x0
+#define TMR_ME 0x80000000
+#define TMR_ALPF 0x0c000000
+#define TMR_MSITE 0x00008000 /* Core temperature site */
+#define TMR_ALL (TMR_ME | TMR_ALPF | TMR_MSITE)
+ __be32 tsr; /* Status Register */
+ __be32 tmtmir; /* Temperature measurement interval Register */
+#define TMTMIR_DEFAULT 0x0000000f
+ u8 res0[0x14];
+ __be32 tier; /* Interrupt Enable Register */
+#define TIER_DISABLE 0x0
+ __be32 tidr; /* Interrupt Detect Register */
+ __be32 tiscr; /* Interrupt Site Capture Register */
+ __be32 ticscr; /* Interrupt Critical Site Capture Register */
+ u8 res1[0x10];
+ __be32 tmhtcrh; /* High Temperature Capture Register */
+ __be32 tmhtcrl; /* Low Temperature Capture Register */
+ u8 res2[0x8];
+ __be32 tmhtitr; /* High Temperature Immediate Threshold */
+ __be32 tmhtatr; /* High Temperature Average Threshold */
+ __be32 tmhtactr; /* High Temperature Average Crit Threshold */
+ u8 res3[0x24];
+ __be32 ttcfgr; /* Temperature Configuration Register */
+ __be32 tscfgr; /* Sensor Configuration Register */
+ u8 res4[0x78];
+ struct qoriq_tmu_site_regs site[SITES_MAX];
+ u8 res5[0x9f8];
+ __be32 ipbrr0; /* IP Block Revision Register 0 */
+ __be32 ipbrr1; /* IP Block Revision Register 1 */
+ u8 res6[0x310];
+ __be32 ttr0cr; /* Temperature Range 0 Control Register */
+ __be32 ttr1cr; /* Temperature Range 1 Control Register */
+ __be32 ttr2cr; /* Temperature Range 2 Control Register */
+ __be32 ttr3cr; /* Temperature Range 3 Control Register */
+};
+
+/*
+ * Thermal zone data
+ */
+struct qoriq_tmu_data {
+ struct thermal_zone_device *tz;
+ struct qoriq_tmu_regs __iomem *regs;
+};
+
+static int tmu_get_temp(void *p, int *temp)
+{
+ u32 val;
+ struct qoriq_tmu_data *data = p;
+
+ val = ioread32be(&data->regs->site[0].tritsr);
+ *temp = (val & 0xff) * 1000;
+
+ return 0;
+}
+
+static int qoriq_tmu_calibration(struct platform_device *pdev)
+{
+ int i, val, len;
+ u32 range[4];
+ const __be32 *calibration;
+ struct device_node *node = pdev->dev.of_node;
+ struct qoriq_tmu_data *data = platform_get_drvdata(pdev);
+
+ /* Disable monitoring before calibration */
+ iowrite32be(TMR_DISABLE, &data->regs->tmr);
+
+ if (of_property_read_u32_array(node, "fsl,tmu-range", range, 4)) {
+ dev_err(&pdev->dev, "TMU: missing calibration range.\n");
+ return -ENODEV;
+ }
+
+ /* Init temperature range registers */
+ iowrite32be(range[0], &data->regs->ttr0cr);
+ iowrite32be(range[1], &data->regs->ttr1cr);
+ iowrite32be(range[2], &data->regs->ttr2cr);
+ iowrite32be(range[3], &data->regs->ttr3cr);
+
+ calibration = of_get_property(node, "fsl,tmu-calibration", &len);
+ if (calibration == NULL) {
+ dev_err(&pdev->dev, "TMU: missing calibration data.\n");
+ return -ENODEV;
+ }
+
+ for (i = 0; i < len; i += 8, calibration += 2) {
+ val = of_read_number(calibration, 1);
+ iowrite32be(val, &data->regs->ttcfgr);
+ val = of_read_number(calibration + 1, 1);
+ iowrite32be(val, &data->regs->tscfgr);
+ }
+
+ return 0;
+}
+
+static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)
+{
+ /* Disable interrupt, using polling instead */
+ iowrite32be(TIER_DISABLE, &data->regs->tier);
+
+ /* Set update_interval */
+ iowrite32be(TMTMIR_DEFAULT, &data->regs->tmtmir);
+
+ /* Enable monitoring */
+ iowrite32be(TMR_ALL, &data->regs->tmr);
+}
+
+static struct thermal_zone_of_device_ops tmu_tz_ops = {
+ .get_temp = tmu_get_temp,
+};
+
+static int qoriq_tmu_probe(struct platform_device *pdev)
+{
+ int ret;
+ const struct thermal_trip *trip;
+ struct qoriq_tmu_data *data;
+
+ if (!pdev->dev.of_node) {
+ dev_err(&pdev->dev, "Device OF-Node is NULL");
+ return -ENODEV;
+ }
+
+ data = devm_kzalloc(&pdev->dev, sizeof(struct qoriq_tmu_data),
+ GFP_KERNEL);
+ if (!data)
+ return -ENOMEM;
+
+ platform_set_drvdata(pdev, data);
+ data->regs = of_iomap(pdev->dev.of_node, 0);
+
+ if (!data->regs) {
+ dev_err(&pdev->dev, "Failed to get memory region\n");
+ ret = -ENODEV;
+ goto err_iomap;
+ }
+
+ ret = qoriq_tmu_calibration(pdev); /* TMU calibration */
+ if (ret < 0)
+ goto err_tmu;
+
+ qoriq_tmu_init_device(data); /* TMU initialization */
+
+ data->tz = thermal_zone_of_sensor_register(&pdev->dev, 0,
+ data, &tmu_tz_ops);
+ if (IS_ERR(data->tz)) {
+ ret = PTR_ERR(data->tz);
+ dev_err(&pdev->dev,
+ "Failed to register thermal zone device %d\n", ret);
+ goto err_tmu;
+ }
+
+ trip = of_thermal_get_trip_points(data->tz);
+
+ return 0;
+
+err_tmu:
+ iounmap(data->regs);
+
+err_iomap:
+ platform_set_drvdata(pdev, NULL);
+ devm_kfree(&pdev->dev, data);
+
+ return ret;
+}
+
+static int qoriq_tmu_remove(struct platform_device *pdev)
+{
+ struct qoriq_tmu_data *data = platform_get_drvdata(pdev);
+
+ /* Disable monitoring */
+ iowrite32be(TMR_DISABLE, &data->regs->tmr);
+
+ thermal_zone_of_sensor_unregister(&pdev->dev, data->tz);
+ iounmap(data->regs);
+
+ platform_set_drvdata(pdev, NULL);
+ devm_kfree(&pdev->dev, data);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int qoriq_tmu_suspend(struct device *dev)
+{
+ struct qoriq_tmu_data *data = dev_get_drvdata(dev);
+
+ /* Disable monitoring */
+ iowrite32be(TMR_DISABLE, &data->regs->tmr);
+ data->tz->ops->set_mode(data->tz, THERMAL_DEVICE_DISABLED);
+
+ return 0;
+}
+
+static int qoriq_tmu_resume(struct device *dev)
+{
+ struct qoriq_tmu_data *data = dev_get_drvdata(dev);
+
+ /* Enable monitoring */
+ iowrite32be(TMR_ALL, &data->regs->tmr);
+ data->tz->ops->set_mode(data->tz, THERMAL_DEVICE_ENABLED);
+
+ return 0;
+}
+#endif
+
+static SIMPLE_DEV_PM_OPS(qoriq_tmu_pm_ops,
+ qoriq_tmu_suspend, qoriq_tmu_resume);
+
+static const struct of_device_id qoriq_tmu_match[] = {
+ { .compatible = "fsl,qoriq-tmu", },
+ {},
+};
+
+static struct platform_driver qoriq_tmu = {
+ .driver = {
+ .name = "qoriq_thermal",
+ .pm = &qoriq_tmu_pm_ops,
+ .of_match_table = qoriq_tmu_match,
+ },
+ .probe = qoriq_tmu_probe,
+ .remove = qoriq_tmu_remove,
+};
+module_platform_driver(qoriq_tmu);
+
+MODULE_AUTHOR("Jia Hongtao <hongtao.jia@freescale.com>");
+MODULE_DESCRIPTION("Freescale QorIQ Thermal Monitoring Unit driver");
+MODULE_LICENSE("GPL v2");
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH V4 3/5] powerpc/mpc85xx: Add TMU device tree support for T1040/T1042
2015-11-24 6:52 [PATCH V4 0/5] TMU support for QorIQ platform Jia Hongtao
2015-11-24 6:52 ` [PATCH V4 1/5] dt-bindings: Add QorIQ TMU thermal bindings Jia Hongtao
2015-11-24 6:52 ` [PATCH V4 2/5] thermal: qoriq: Add thermal management support Jia Hongtao
@ 2015-11-24 6:52 ` Jia Hongtao
2015-11-24 6:52 ` [PATCH V4 4/5] powerpc/mpc85xx: Add TMU device tree support for T1023/T1024 Jia Hongtao
2015-11-24 6:52 ` [PATCH V4 5/5] arm/ls1021a: Add TMU device tree support for LS1021A Jia Hongtao
4 siblings, 0 replies; 7+ messages in thread
From: Jia Hongtao @ 2015-11-24 6:52 UTC (permalink / raw)
To: edubezval; +Cc: linux-pm, linuxppc-dev, devicetree, scottwood, hongtao.jia
Also add nodes and properties for thermal management support. Meanwhile
preprocessor support is needed using thermal of framework.
Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
Reviewed-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/boot/dts/fsl/t1040d4rdb.dts | 2 +-
arch/powerpc/boot/dts/fsl/t1040qds.dts | 2 +-
arch/powerpc/boot/dts/fsl/t1040rdb.dts | 2 +-
arch/powerpc/boot/dts/fsl/t1040si-post.dtsi | 94 +++++++++++++++++++++++++++++
arch/powerpc/boot/dts/fsl/t1042d4rdb.dts | 2 +-
arch/powerpc/boot/dts/fsl/t1042qds.dts | 2 +-
arch/powerpc/boot/dts/fsl/t1042rdb.dts | 2 +-
arch/powerpc/boot/dts/fsl/t1042rdb_pi.dts | 2 +-
arch/powerpc/boot/dts/fsl/t1042si-post.dtsi | 2 +-
arch/powerpc/boot/dts/fsl/t104xsi-pre.dtsi | 4 ++
10 files changed, 106 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/boot/dts/fsl/t1040d4rdb.dts b/arch/powerpc/boot/dts/fsl/t1040d4rdb.dts
index 681746e..fb6bc02 100644
--- a/arch/powerpc/boot/dts/fsl/t1040d4rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/t1040d4rdb.dts
@@ -43,4 +43,4 @@
interrupt-parent = <&mpic>;
};
-/include/ "t1040si-post.dtsi"
+#include "t1040si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/t1040qds.dts b/arch/powerpc/boot/dts/fsl/t1040qds.dts
index 4d29865..5f76edc 100644
--- a/arch/powerpc/boot/dts/fsl/t1040qds.dts
+++ b/arch/powerpc/boot/dts/fsl/t1040qds.dts
@@ -43,4 +43,4 @@
interrupt-parent = <&mpic>;
};
-/include/ "t1040si-post.dtsi"
+#include "t1040si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/t1040rdb.dts b/arch/powerpc/boot/dts/fsl/t1040rdb.dts
index 8f9e65b..cf19415 100644
--- a/arch/powerpc/boot/dts/fsl/t1040rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/t1040rdb.dts
@@ -45,4 +45,4 @@
};
};
-/include/ "t1040si-post.dtsi"
+#include "t1040si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
index d30b3de..e0f4da5 100644
--- a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
@@ -32,6 +32,8 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include <dt-bindings/thermal/thermal.h>
+
&bman_fbpr {
compatible = "fsl,bman-fbpr";
alloc-ranges = <0 0 0x10000 0>;
@@ -484,6 +486,98 @@
reg = <0xea000 0x4000>;
};
+ tmu: tmu@f0000 {
+ compatible = "fsl,qoriq-tmu";
+ reg = <0xf0000 0x1000>;
+ interrupts = <18 2 0 0>;
+ fsl,tmu-range = <0xa0000 0x90026 0x8004a 0x1006a>;
+ fsl,tmu-calibration = <0x00000000 0x00000025
+ 0x00000001 0x00000028
+ 0x00000002 0x0000002d
+ 0x00000003 0x00000031
+ 0x00000004 0x00000036
+ 0x00000005 0x0000003a
+ 0x00000006 0x00000040
+ 0x00000007 0x00000044
+ 0x00000008 0x0000004a
+ 0x00000009 0x0000004f
+ 0x0000000a 0x00000054
+
+ 0x00010000 0x0000000d
+ 0x00010001 0x00000013
+ 0x00010002 0x00000019
+ 0x00010003 0x0000001f
+ 0x00010004 0x00000025
+ 0x00010005 0x0000002d
+ 0x00010006 0x00000033
+ 0x00010007 0x00000043
+ 0x00010008 0x0000004b
+ 0x00010009 0x00000053
+
+ 0x00020000 0x00000010
+ 0x00020001 0x00000017
+ 0x00020002 0x0000001f
+ 0x00020003 0x00000029
+ 0x00020004 0x00000031
+ 0x00020005 0x0000003c
+ 0x00020006 0x00000042
+ 0x00020007 0x0000004d
+ 0x00020008 0x00000056
+
+ 0x00030000 0x00000012
+ 0x00030001 0x0000001d>;
+ #thermal-sensor-cells = <0>;
+ };
+
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+
+ thermal-sensors = <&tmu>;
+
+ trips {
+ cpu_alert: cpu-alert {
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ cpu_crit: cpu-crit {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert>;
+ cooling-device =
+ <&cpu0 THERMAL_NO_LIMIT
+ THERMAL_NO_LIMIT>;
+ };
+ map1 {
+ trip = <&cpu_alert>;
+ cooling-device =
+ <&cpu1 THERMAL_NO_LIMIT
+ THERMAL_NO_LIMIT>;
+ };
+ map2 {
+ trip = <&cpu_alert>;
+ cooling-device =
+ <&cpu2 THERMAL_NO_LIMIT
+ THERMAL_NO_LIMIT>;
+ };
+ map3 {
+ trip = <&cpu_alert>;
+ cooling-device =
+ <&cpu3 THERMAL_NO_LIMIT
+ THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+ };
+
scfg: global-utilities@fc000 {
compatible = "fsl,t1040-scfg";
reg = <0xfc000 0x1000>;
diff --git a/arch/powerpc/boot/dts/fsl/t1042d4rdb.dts b/arch/powerpc/boot/dts/fsl/t1042d4rdb.dts
index b245b31..2a5a90d 100644
--- a/arch/powerpc/boot/dts/fsl/t1042d4rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/t1042d4rdb.dts
@@ -50,4 +50,4 @@
};
};
-/include/ "t1040si-post.dtsi"
+#include "t1042si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/t1042qds.dts b/arch/powerpc/boot/dts/fsl/t1042qds.dts
index 4ab9bbe..90a4a73 100644
--- a/arch/powerpc/boot/dts/fsl/t1042qds.dts
+++ b/arch/powerpc/boot/dts/fsl/t1042qds.dts
@@ -43,4 +43,4 @@
interrupt-parent = <&mpic>;
};
-/include/ "t1042si-post.dtsi"
+#include "t1042si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/t1042rdb.dts b/arch/powerpc/boot/dts/fsl/t1042rdb.dts
index 67af56b..8d908e7 100644
--- a/arch/powerpc/boot/dts/fsl/t1042rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/t1042rdb.dts
@@ -45,4 +45,4 @@
};
};
-/include/ "t1042si-post.dtsi"
+#include "t1042si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/t1042rdb_pi.dts b/arch/powerpc/boot/dts/fsl/t1042rdb_pi.dts
index 2f67677..98c0010 100644
--- a/arch/powerpc/boot/dts/fsl/t1042rdb_pi.dts
+++ b/arch/powerpc/boot/dts/fsl/t1042rdb_pi.dts
@@ -54,4 +54,4 @@
};
};
-/include/ "t1042si-post.dtsi"
+#include "t1042si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/t1042si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1042si-post.dtsi
index 319b74f..a5544f9 100644
--- a/arch/powerpc/boot/dts/fsl/t1042si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t1042si-post.dtsi
@@ -32,6 +32,6 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-/include/ "t1040si-post.dtsi"
+#include "t1040si-post.dtsi"
/* Place holder for ethernet related device tree nodes */
diff --git a/arch/powerpc/boot/dts/fsl/t104xsi-pre.dtsi b/arch/powerpc/boot/dts/fsl/t104xsi-pre.dtsi
index fcfa38a..6db0ee8 100644
--- a/arch/powerpc/boot/dts/fsl/t104xsi-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t104xsi-pre.dtsi
@@ -76,6 +76,7 @@
reg = <0>;
clocks = <&mux0>;
next-level-cache = <&L2_1>;
+ #cooling-cells = <2>;
L2_1: l2-cache {
next-level-cache = <&cpc>;
};
@@ -85,6 +86,7 @@
reg = <1>;
clocks = <&mux1>;
next-level-cache = <&L2_2>;
+ #cooling-cells = <2>;
L2_2: l2-cache {
next-level-cache = <&cpc>;
};
@@ -94,6 +96,7 @@
reg = <2>;
clocks = <&mux2>;
next-level-cache = <&L2_3>;
+ #cooling-cells = <2>;
L2_3: l2-cache {
next-level-cache = <&cpc>;
};
@@ -103,6 +106,7 @@
reg = <3>;
clocks = <&mux3>;
next-level-cache = <&L2_4>;
+ #cooling-cells = <2>;
L2_4: l2-cache {
next-level-cache = <&cpc>;
};
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH V4 4/5] powerpc/mpc85xx: Add TMU device tree support for T1023/T1024
2015-11-24 6:52 [PATCH V4 0/5] TMU support for QorIQ platform Jia Hongtao
` (2 preceding siblings ...)
2015-11-24 6:52 ` [PATCH V4 3/5] powerpc/mpc85xx: Add TMU device tree support for T1040/T1042 Jia Hongtao
@ 2015-11-24 6:52 ` Jia Hongtao
2015-11-24 6:52 ` [PATCH V4 5/5] arm/ls1021a: Add TMU device tree support for LS1021A Jia Hongtao
4 siblings, 0 replies; 7+ messages in thread
From: Jia Hongtao @ 2015-11-24 6:52 UTC (permalink / raw)
To: edubezval; +Cc: linux-pm, linuxppc-dev, devicetree, scottwood, hongtao.jia
Also add nodes and properties for thermal management support. Meanwhile
preprocessor support is needed using thermal of framework.
Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
Reviewed-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/boot/dts/fsl/t1023rdb.dts | 2 +-
arch/powerpc/boot/dts/fsl/t1023si-post.dtsi | 86 +++++++++++++++++++++++++++++
arch/powerpc/boot/dts/fsl/t1024qds.dts | 2 +-
arch/powerpc/boot/dts/fsl/t1024rdb.dts | 2 +-
arch/powerpc/boot/dts/fsl/t1024si-post.dtsi | 2 +-
arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi | 2 +
6 files changed, 92 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/boot/dts/fsl/t1023rdb.dts b/arch/powerpc/boot/dts/fsl/t1023rdb.dts
index 2b2fff4..6bd842b 100644
--- a/arch/powerpc/boot/dts/fsl/t1023rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/t1023rdb.dts
@@ -159,4 +159,4 @@
};
};
-/include/ "t1023si-post.dtsi"
+#include "t1023si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
index 518ddaa..99e421d 100644
--- a/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
@@ -32,6 +32,8 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include <dt-bindings/thermal/thermal.h>
+
&ifc {
#address-cells = <2>;
#size-cells = <1>;
@@ -275,6 +277,90 @@
reg = <0xea000 0x4000>;
};
+ tmu: tmu@f0000 {
+ compatible = "fsl,qoriq-tmu";
+ reg = <0xf0000 0x1000>;
+ interrupts = <18 2 0 0>;
+ fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x30061>;
+ fsl,tmu-calibration = <0x00000000 0x0000000f
+ 0x00000001 0x00000017
+ 0x00000002 0x0000001e
+ 0x00000003 0x00000026
+ 0x00000004 0x0000002e
+ 0x00000005 0x00000035
+ 0x00000006 0x0000003d
+ 0x00000007 0x00000044
+ 0x00000008 0x0000004c
+ 0x00000009 0x00000053
+ 0x0000000a 0x0000005b
+ 0x0000000b 0x00000064
+
+ 0x00010000 0x00000011
+ 0x00010001 0x0000001c
+ 0x00010002 0x00000024
+ 0x00010003 0x0000002b
+ 0x00010004 0x00000034
+ 0x00010005 0x00000039
+ 0x00010006 0x00000042
+ 0x00010007 0x0000004c
+ 0x00010008 0x00000051
+ 0x00010009 0x0000005a
+ 0x0001000a 0x00000063
+
+ 0x00020000 0x00000013
+ 0x00020001 0x00000019
+ 0x00020002 0x00000024
+ 0x00020003 0x0000002c
+ 0x00020004 0x00000035
+ 0x00020005 0x0000003d
+ 0x00020006 0x00000046
+ 0x00020007 0x00000050
+ 0x00020008 0x00000059
+
+ 0x00030000 0x00000002
+ 0x00030001 0x0000000d
+ 0x00030002 0x00000019
+ 0x00030003 0x00000024>;
+ #thermal-sensor-cells = <0>;
+ };
+
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+
+ thermal-sensors = <&tmu>;
+
+ trips {
+ cpu_alert: cpu-alert {
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ cpu_crit: cpu-crit {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert>;
+ cooling-device =
+ <&cpu0 THERMAL_NO_LIMIT
+ THERMAL_NO_LIMIT>;
+ };
+ map1 {
+ trip = <&cpu_alert>;
+ cooling-device =
+ <&cpu1 THERMAL_NO_LIMIT
+ THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+ };
+
scfg: global-utilities@fc000 {
compatible = "fsl,t1023-scfg";
reg = <0xfc000 0x1000>;
diff --git a/arch/powerpc/boot/dts/fsl/t1024qds.dts b/arch/powerpc/boot/dts/fsl/t1024qds.dts
index 43cd5b5..6a3581b 100644
--- a/arch/powerpc/boot/dts/fsl/t1024qds.dts
+++ b/arch/powerpc/boot/dts/fsl/t1024qds.dts
@@ -248,4 +248,4 @@
};
};
-/include/ "t1024si-post.dtsi"
+#include "t1024si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/t1024rdb.dts b/arch/powerpc/boot/dts/fsl/t1024rdb.dts
index 429d8c7..0ccc7d0 100644
--- a/arch/powerpc/boot/dts/fsl/t1024rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/t1024rdb.dts
@@ -188,4 +188,4 @@
};
};
-/include/ "t1024si-post.dtsi"
+#include "t1024si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/t1024si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1024si-post.dtsi
index 95e3af8..bb48034 100644
--- a/arch/powerpc/boot/dts/fsl/t1024si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t1024si-post.dtsi
@@ -32,7 +32,7 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-/include/ "t1023si-post.dtsi"
+#include "t1023si-post.dtsi"
/ {
aliases {
diff --git a/arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi b/arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi
index 3e1528a..9d08a36 100644
--- a/arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi
@@ -76,6 +76,7 @@
reg = <0>;
clocks = <&mux0>;
next-level-cache = <&L2_1>;
+ #cooling-cells = <2>;
L2_1: l2-cache {
next-level-cache = <&cpc>;
};
@@ -85,6 +86,7 @@
reg = <1>;
clocks = <&mux1>;
next-level-cache = <&L2_2>;
+ #cooling-cells = <2>;
L2_2: l2-cache {
next-level-cache = <&cpc>;
};
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH V4 5/5] arm/ls1021a: Add TMU device tree support for LS1021A
2015-11-24 6:52 [PATCH V4 0/5] TMU support for QorIQ platform Jia Hongtao
` (3 preceding siblings ...)
2015-11-24 6:52 ` [PATCH V4 4/5] powerpc/mpc85xx: Add TMU device tree support for T1023/T1024 Jia Hongtao
@ 2015-11-24 6:52 ` Jia Hongtao
4 siblings, 0 replies; 7+ messages in thread
From: Jia Hongtao @ 2015-11-24 6:52 UTC (permalink / raw)
To: edubezval; +Cc: linux-pm, linuxppc-dev, devicetree, scottwood, hongtao.jia
Also add nodes and properties for thermal management support.
Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
Reviewed-by: Scott Wood <scottwood@freescale.com>
---
arch/arm/boot/dts/ls1021a.dtsi | 84 +++++++++++++++++++++++++++++++++++++++++-
1 file changed, 82 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 9430a99..d31a811 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -47,6 +47,7 @@
#include "skeleton64.dtsi"
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/thermal/thermal.h>
/ {
compatible = "fsl,ls1021a";
@@ -70,14 +71,15 @@
#address-cells = <1>;
#size-cells = <0>;
- cpu@f00 {
+ cpu0: cpu@f00 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <0xf00>;
clocks = <&cluster1_clk>;
+ #cooling-cells = <2>;
};
- cpu@f01 {
+ cpu1: cpu@f01 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <0xf01>;
@@ -226,6 +228,84 @@
};
};
+ tmu: tmu@1f00000 {
+ compatible = "fsl,qoriq-tmu";
+ reg = <0x0 0x1f00000 0x0 0x10000>;
+ interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+ fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x30061>;
+ fsl,tmu-calibration = <0x00000000 0x0000000f
+ 0x00000001 0x00000017
+ 0x00000002 0x0000001e
+ 0x00000003 0x00000026
+ 0x00000004 0x0000002e
+ 0x00000005 0x00000035
+ 0x00000006 0x0000003d
+ 0x00000007 0x00000044
+ 0x00000008 0x0000004c
+ 0x00000009 0x00000053
+ 0x0000000a 0x0000005b
+ 0x0000000b 0x00000064
+
+ 0x00010000 0x00000011
+ 0x00010001 0x0000001c
+ 0x00010002 0x00000024
+ 0x00010003 0x0000002b
+ 0x00010004 0x00000034
+ 0x00010005 0x00000039
+ 0x00010006 0x00000042
+ 0x00010007 0x0000004c
+ 0x00010008 0x00000051
+ 0x00010009 0x0000005a
+ 0x0001000a 0x00000063
+
+ 0x00020000 0x00000013
+ 0x00020001 0x00000019
+ 0x00020002 0x00000024
+ 0x00020003 0x0000002c
+ 0x00020004 0x00000035
+ 0x00020005 0x0000003d
+ 0x00020006 0x00000046
+ 0x00020007 0x00000050
+ 0x00020008 0x00000059
+
+ 0x00030000 0x00000002
+ 0x00030001 0x0000000d
+ 0x00030002 0x00000019
+ 0x00030003 0x00000024>;
+ #thermal-sensor-cells = <0>;
+ };
+
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+
+ thermal-sensors = <&tmu>;
+
+ trips {
+ cpu_alert: cpu-alert {
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ cpu_crit: cpu-crit {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert>;
+ cooling-device =
+ <&cpu0 THERMAL_NO_LIMIT
+ THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+ };
+
dspi0: dspi@2100000 {
compatible = "fsl,ls1021a-v1.0-dspi";
#address-cells = <1>;
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 7+ messages in thread