From: Chenhui Zhao <chenhui.zhao@freescale.com>
To: Denis Kirjanov <kda@linux-powerpc.org>
Cc: <linuxppc-dev@lists.ozlabs.org>, <scottwood@freescale.com>
Subject: Re: [PATCH v3 1/6] powerpc/mm: any thread in one core can be the first to setup TLB1
Date: Thu, 3 Dec 2015 19:27:21 +0800 [thread overview]
Message-ID: <1449142041.11289.0@remotesmtp.freescale.net> (raw)
In-Reply-To: <CAOJe8K1_S1EwfjO1qW6mBKA+ighFBKbuKCW6-Q5B_og4-NuzFg@mail.gmail.com>
On Wed, Dec 2, 2015 at 8:12 PM, Denis Kirjanov <kda@linux-powerpc.org>
wrote:
> On 11/20/15, Chenhui Zhao <chenhui.zhao@freescale.com> wrote:
>> On e6500, in the case of cpu hotplug, either thread in one core
>> may be the first thread initilzing the TLB1. The subsequent threads
>> must not setup it again.
>>
>> The code is derived from the comment of Scott Wood.
>>
>> Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
>> ---
>> arch/powerpc/include/asm/cputhreads.h | 7 +++++++
>> arch/powerpc/mm/tlb_nohash.c | 4 +---
>> 2 files changed, 8 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/powerpc/include/asm/cputhreads.h
>> b/arch/powerpc/include/asm/cputhreads.h
>> index ba42e46..b56cece 100644
>> --- a/arch/powerpc/include/asm/cputhreads.h
>> +++ b/arch/powerpc/include/asm/cputhreads.h
>> @@ -94,6 +94,13 @@ static inline int cpu_last_thread_sibling(int
>> cpu)
>> return cpu | (threads_per_core - 1);
>> }
>>
>> +static inline u32 get_tensr(void)
>> +{
>> + if (cpu_has_feature(CPU_FTR_SMT))
>> + return mfspr(SPRN_TENSR);
>> + else
>> + return 1;
>> +}
> If i get it right, SPRN_TENSR used in the code only if CONFIG_PPC64
> is defined. Then we can make it noop on ppc32.
>
> Thanks!
Yeah, SPRN_TENSR is defined when CONFIG_BOOKE or CONFIG_40x is enabled.
I'd like to change the code like:
static inline u32 get_tensr(void)
{
#ifdef CONFIG_BOOKE
if (cpu_has_feature(CPU_FTR_SMT))
return mfspr(SPRN_TENSR);
#endif
return 1;
}
Thanks,
Chenhui
next prev parent reply other threads:[~2015-12-03 11:59 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-20 9:13 [PATCH v3 1/6] powerpc/mm: any thread in one core can be the first to setup TLB1 Chenhui Zhao
2015-11-20 9:13 ` [PATCH v3 2/6] powerpc/cache: add cache flush operation for various e500 Chenhui Zhao
2015-11-20 9:13 ` [PATCH v3 3/6] powerpc/rcpm: add RCPM driver Chenhui Zhao
2015-11-20 9:14 ` [PATCH v3 4/6] powerpc/mpc85xx: refactor the PM operations Chenhui Zhao
2015-11-20 9:14 ` [PATCH v3 5/6] powerpc/mpc85xx: Add hotplug support on E5500 and E500MC cores Chenhui Zhao
2015-11-20 9:14 ` [PATCH v3 6/6] powerpc/mpc85xx: Add CPU hotplug support for E6500 Chenhui Zhao
2015-12-02 11:04 ` [PATCH v3 1/6] powerpc/mm: any thread in one core can be the first to setup TLB1 Chenhui Zhao
2015-12-02 12:12 ` Denis Kirjanov
2015-12-03 11:27 ` Chenhui Zhao [this message]
2015-12-23 21:27 ` Scott Wood
2015-12-24 0:47 ` Zhao C.H.
2015-12-03 19:26 ` Scott Wood
2015-12-04 8:04 ` Denis Kirjanov
2015-12-04 19:48 ` Scott Wood
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