From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
To: linux-kernel@vger.kernel.org, linuxppc-dev@ozlabs.org
Cc: peterz@infradead.org, akpm@linux-foundation.org,
tglx@linutronix.de, james.hogan@imgtec.com, avagin@openvz.org,
Paul.Clothier@imgtec.com, palves@redhat.com, oleg@redhat.com,
dhowells@redhat.com, davej@redhat.com, davem@davemloft.net,
mikey@neuling.org, benh@kernel.crashing.org,
sukadev@linux.vnet.ibm.com, mpe@ellerman.id.au,
sam.bobroff@au1.ibm.com, kirjanov@gmail.com,
shuahkh@osg.samsung.com, Ulrich.Weigand@de.ibm.com,
emachado@linux.vnet.ibm.com
Subject: [PATCH V10 13/28] powerpc, ptrace: Enable support for NT_PPPC_TAR, NT_PPC_PPR, NT_PPC_DSCR
Date: Tue, 16 Feb 2016 14:29:43 +0530 [thread overview]
Message-ID: <1455613198-5113-14-git-send-email-khandual@linux.vnet.ibm.com> (raw)
In-Reply-To: <1455613198-5113-1-git-send-email-khandual@linux.vnet.ibm.com>
This patch enables support for running TAR, PPR, DSCR registers
related ELF core notes NT_PPPC_TAR, NT_PPC_PPR, NT_PPC_DSCR based
ptrace requests through PTRACE_GETREGSET, PTRACE_SETREGSET calls.
This is achieved through adding three new register sets REGSET_TAR,
REGSET_PPR, REGSET_DSCR in powerpc corresponding to the ELF core
note sections added in this regad. It implements the get, set and
active functions for all these new register sets added.
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
---
arch/powerpc/kernel/ptrace.c | 117 +++++++++++++++++++++++++++++++++++++++++++
1 file changed, 117 insertions(+)
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index c3339a0..587f031 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -1689,6 +1689,78 @@ static int tm_dscr_set(struct task_struct *target,
}
#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
+#ifdef CONFIG_PPC64
+static int ppr_get(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ void *kbuf, void __user *ubuf)
+{
+ int ret;
+
+ ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
+ &target->thread.ppr, 0, sizeof(u64));
+ return ret;
+}
+
+static int ppr_set(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ const void *kbuf, const void __user *ubuf)
+{
+ int ret;
+
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+ &target->thread.ppr, 0, sizeof(u64));
+ return ret;
+}
+
+static int dscr_get(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ void *kbuf, void __user *ubuf)
+{
+ int ret;
+
+ ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
+ &target->thread.dscr, 0, sizeof(u64));
+ return ret;
+}
+static int dscr_set(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ const void *kbuf, const void __user *ubuf)
+{
+ int ret;
+
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+ &target->thread.dscr, 0, sizeof(u64));
+ return ret;
+}
+#endif
+#ifdef CONFIG_PPC_BOOK3S_64
+static int tar_get(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ void *kbuf, void __user *ubuf)
+{
+ int ret;
+
+ ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
+ &target->thread.tar, 0, sizeof(u64));
+ return ret;
+}
+static int tar_set(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ const void *kbuf, const void __user *ubuf)
+{
+ int ret;
+
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+ &target->thread.tar, 0, sizeof(u64));
+ return ret;
+}
+#endif
/*
* These are our native regset flavors.
*/
@@ -1714,6 +1786,13 @@ enum powerpc_regset {
REGSET_TM_CPPR, /* TM checkpointed PPR register */
REGSET_TM_CDSCR, /* TM checkpointed DSCR register */
#endif
+#ifdef CONFIG_PPC64
+ REGSET_PPR, /* PPR register */
+ REGSET_DSCR, /* DSCR register */
+#endif
+#ifdef CONFIG_PPC_BOOK3S_64
+ REGSET_TAR, /* TAR register */
+#endif
};
static const struct user_regset native_regsets[] = {
@@ -1790,6 +1869,25 @@ static const struct user_regset native_regsets[] = {
.active = tm_dscr_active, .get = tm_dscr_get, .set = tm_dscr_set
},
#endif
+#ifdef CONFIG_PPC64
+ [REGSET_PPR] = {
+ .core_note_type = NT_PPC_PPR, .n = 1,
+ .size = sizeof(u64), .align = sizeof(u64),
+ .get = ppr_get, .set = ppr_set
+ },
+ [REGSET_DSCR] = {
+ .core_note_type = NT_PPC_DSCR, .n = 1,
+ .size = sizeof(u64), .align = sizeof(u64),
+ .get = dscr_get, .set = dscr_set
+ },
+#endif
+#ifdef CONFIG_PPC_BOOK3S_64
+ [REGSET_TAR] = {
+ .core_note_type = NT_PPC_TAR, .n = 1,
+ .size = sizeof(u64), .align = sizeof(u64),
+ .get = tar_get, .set = tar_set
+ },
+#endif
};
static const struct user_regset_view user_ppc_native_view = {
@@ -2057,6 +2155,25 @@ static const struct user_regset compat_regsets[] = {
.active = tm_dscr_active, .get = tm_dscr_get, .set = tm_dscr_set
},
#endif
+#ifdef CONFIG_PPC64
+ [REGSET_PPR] = {
+ .core_note_type = NT_PPC_PPR, .n = 1,
+ .size = sizeof(u64), .align = sizeof(u64),
+ .get = ppr_get, .set = ppr_set
+ },
+ [REGSET_DSCR] = {
+ .core_note_type = NT_PPC_DSCR, .n = 1,
+ .size = sizeof(u64), .align = sizeof(u64),
+ .get = dscr_get, .set = dscr_set
+ },
+#endif
+#ifdef CONFIG_PPC_BOOK3S_64
+ [REGSET_TAR] = {
+ .core_note_type = NT_PPC_TAR, .n = 1,
+ .size = sizeof(u64), .align = sizeof(u64),
+ .get = tar_get, .set = tar_set
+ },
+#endif
};
static const struct user_regset_view user_ppc_compat_view = {
--
2.1.0
next prev parent reply other threads:[~2016-02-16 9:02 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-16 8:59 [PATCH V10 00/28] Add new powerpc specific ELF core notes Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 01/28] elf: Add powerpc specific core note sections Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 02/28] powerpc, process: Add the function flush_tmregs_to_thread Anshuman Khandual
2016-03-02 0:15 ` Cyril Bur
2016-03-02 4:29 ` Anshuman Khandual
2016-03-02 4:56 ` Cyril Bur
2016-02-16 8:59 ` [PATCH V10 03/28] powerpc, ptrace: Enable in transaction NT_PRFPREG ptrace requests Anshuman Khandual
2016-02-16 9:09 ` Denis Kirjanov
2016-02-16 10:16 ` Michael Ellerman
2016-02-16 8:59 ` [PATCH V10 04/28] powerpc, ptrace: Enable in transaction NT_PPC_VMX " Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 05/28] powerpc, ptrace: Enable in transaction NT_PPC_VSX " Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 06/28] powerpc, ptrace: Adapt gpr32_get, gpr32_set functions for transaction Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 07/28] powerpc, ptrace: Enable support for NT_PPC_CGPR Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 08/28] powerpc, ptrace: Enable support for NT_PPC_CFPR Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 09/28] powerpc, ptrace: Enable support for NT_PPC_CVMX Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 10/28] powerpc, ptrace: Enable support for NT_PPC_CVSX Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 11/28] powerpc, ptrace: Enable support for TM SPR state Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 12/28] powerpc, ptrace: Enable NT_PPC_TM_CTAR, NT_PPC_TM_CPPR, NT_PPC_TM_CDSCR Anshuman Khandual
2016-02-16 8:59 ` Anshuman Khandual [this message]
2016-02-16 8:59 ` [PATCH V10 14/28] powerpc, ptrace: Enable support for EBB registers Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 15/28] selftests, powerpc: Move 'reg.h' file outside of 'ebb' sub directory Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 16/28] selftests, powerpc: Add more SPR numbers, TM & VMX instructions to 'reg.h' Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 17/28] selftests, powerpc: Add ptrace tests for EBB Anshuman Khandual
2016-03-02 0:32 ` Cyril Bur
2016-03-02 8:59 ` Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 18/28] selftests, powerpc: Add ptrace tests for GPR/FPR registers Anshuman Khandual
2016-03-02 0:40 ` Cyril Bur
2016-03-02 9:05 ` Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 19/28] selftests, powerpc: Add ptrace tests for GPR/FPR registers in TM Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 20/28] selftests, powerpc: Add ptrace tests for GPR/FPR registers in suspended TM Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 21/28] selftests, powerpc: Add ptrace tests for TAR, PPR, DSCR registers Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 22/28] selftests, powerpc: Add ptrace tests for TAR, PPR, DSCR in TM Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 23/28] selftests, powerpc: Add ptrace tests for TAR, PPR, DSCR in suspended TM Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 24/28] selftests, powerpc: Add ptrace tests for VSX, VMX registers Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 25/28] selftests, powerpc: Add ptrace tests for VSX, VMX registers in TM Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 26/28] selftests, powerpc: Add ptrace tests for VSX, VMX registers in suspended TM Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 27/28] selftests, powerpc: Add ptrace tests for TM SPR registers Anshuman Khandual
2016-02-16 8:59 ` [PATCH V10 28/28] selftests, powerpc: Add .gitignore file for ptrace executables Anshuman Khandual
2016-04-07 9:23 ` [PATCH V10 00/28] Add new powerpc specific ELF core notes Laurent Dufour
2016-04-07 21:49 ` Michael Ellerman
2016-04-11 6:32 ` Edjunior Barbosa Machado
2016-04-13 5:36 ` Michael Ellerman
2016-04-26 13:23 ` Edjunior Barbosa Machado
2016-04-11 7:40 ` Laurent Dufour
2016-04-13 5:14 ` Michael Ellerman
2016-04-21 16:00 ` Laurent Dufour
2016-05-27 8:07 ` Laurent Dufour
2016-05-30 23:12 ` Michael Ellerman
2016-06-01 8:26 ` Anshuman Khandual
2016-06-02 22:26 ` Cyril Bur
2016-06-06 8:57 ` Anshuman Khandual
2016-06-08 11:18 ` Michael Ellerman
2016-05-06 11:49 ` Michael Ellerman
2016-05-09 12:54 ` Anshuman Khandual
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