From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from na01-bn1-obe.outbound.protection.outlook.com (mail-bn1on0095.outbound.protection.outlook.com [157.56.110.95]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 9953C1A04F1 for ; Thu, 18 Feb 2016 12:15:08 +1100 (AEDT) From: Zhao Qiang To: CC: , , , , , Zhao Qiang Subject: [PATCH v2 3/7] QE: Add uqe_serial document to bindings Date: Thu, 18 Feb 2016 09:06:08 +0800 Message-ID: <1455757572-44955-3-git-send-email-qiang.zhao@nxp.com> In-Reply-To: <1455757572-44955-1-git-send-email-qiang.zhao@nxp.com> References: <1455757572-44955-1-git-send-email-qiang.zhao@nxp.com> MIME-Version: 1.0 Content-Type: text/plain List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Add uqe_serial document to Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt Signed-off-by: Zhao Qiang --- Changes for v2 - modify tx/rx-clock-name specification .../bindings/powerpc/fsl/cpm_qe/uqe_serial.txt | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt new file mode 100644 index 0000000..436c71c --- /dev/null +++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt @@ -0,0 +1,19 @@ +* Serial + +Currently defined compatibles: +- ucc_uart + +Properties for ucc_uart: +port-number : port number of UCC-UART +tx/rx-clock-name : should be "brg1"-"brg16" for internal clock source, + should be "clk1"-"clk28" for external clock source. + +Example: + + ucc_serial: ucc@2200 { + device_type = "serial"; + compatible = "ucc_uart"; + port-number = <1>; + rx-clock-name = "brg2"; + tx-clock-name = "brg2"; + }; -- 2.1.0.27.g96db324